📄 251a.cod
字号:
/*
* Copyright (c) 1995, Intel Corporation
*
* $Workfile: 251a.cod $
* $Revision: 1.13 $
* $Modtime: Jun 17 1996 13:24:22 $
*
* Purpose:
*
*
*
*
*
* Compiler:
*
* Ext Packages:
*
*
*
*/
##80C251S? WRITE#
##80C151S? WRITE#
$$IF!STR$ REG_MNEM "CONFIG0"
mov @@REG_MNEM@, #$%aREG_VALUE$
$$END$
##80C251S? READ#
##80C151S? READ#
$$IF!STR$ REG_MNEM "CONFIG0"
mov UserVar, @@REG_MNEM@
$$END$
##80C251S? OR#
##80C151S? OR#
$$IF!STR$ REG_MNEM "CONFIG0"
orl @@REG_MNEM@, #$%aREG_VALUE$
$$END$
##80C251S? AND#
##80C151S? AND#
$$IF!STR$ REG_MNEM "CONFIG0"
anl @@REG_MNEM@, #$%aREG_VALUE$
$$END$
##80C251S? XOR#
##80C151S? XOR#
$$IF!STR$ REG_MNEM "CONFIG0"
xrl @@REG_MNEM@, #$%aREG_VALUE$
$$END$
##80C251S? TESTZ#
##80C151S? TESTZ#
$$IF!STR$ REG_MNEM "CONFIG0"
mov A, @@REG_MNEM@
jz
$$END$
##80C251S? TESTNZ#
##80C151S? TESTNZ#
$$IF!STR$ REG_MNEM "CONFIG0"
mov A, @@REG_MNEM@
jnz
$$END$
##80C251S? IU#
##80C151S? IU#
; Interrupt Control Unit
$$ifn$IE0
; NO INTERRUPTS
$$end$
$$if$IE0
; **** Enabled interrupts in Interrupt Enable Register ****
; **** GLOBAL INTERRUPT MUST BE ENABLED FOR ANY OTHER
; **** INTERRUPT TO WORK!
$$if$IE0.7
; GLOBAL INTERRUPT ENABLED
$$end$
$$ifN$IE0.7
; GLOBAL INTERRUPT DISABLED ALL INTERRUPTS
; ARE DISABLED
$$end$
$$if$IE0.0
; External interrupt 0
$$ifn$IPH0.0 &! IPL0.0
; Priority Level = 0
$$end$
$$ifn$IPH0.0 && IPL0.0
; Priority Level = 1
$$end$
$$if$IPH0.0 &! IPL0.0
; Priority Level = 2
$$end$
$$if$IPH0.0 && IPL0.0
; Priority Level = 3
$$end$
$$end$
$$if$IE0.1
; Timer 0 interrupt
$$ifn$IPH0.1 &! IPL0.1
; Priority Level = 0
$$end$
$$ifn$IPH0.1 && IPL0.1
; Priority Level = 1
$$end$
$$if$IPH0.1 &! IPL0.1
; Priority Level = 2
$$end$
$$if$IPH0.1 && IPL0.1
; Priority Level = 3
$$end$
$$end$
$$if$IE0.2
; External interrupt 1
$$ifn$IPH0.2 &! IPL0.2
; Priority Level = 0
$$end$
$$ifn$IPH0.2 && IPL0.2
; Priority Level = 1
$$end$
$$if$IPH0.2 &! IPL0.2
; Priority Level = 2
$$end$
$$if$IPH0.2 && IPL0.2
; Priority Level = 3
$$end$
$$end$
$$if$IE0.3
; Timer 1 interrupt
$$ifn$IPH0.3 &! IPL0.3
; Priority Level = 0
$$end$
$$ifn$IPH0.3 && IPL0.3
; Priority Level = 1
$$end$
$$if$IPH0.3 &! IPL0.3
; Priority Level = 2
$$end$
$$if$IPH0.3 && IPL0.3
; Priority Level = 3
$$end$
$$end$
$$if$IE0.4
; Serial Port interrupt
$$ifn$IPH0.4 &! IPL0.4
; Priority Level = 0
$$end$
$$ifn$IPH0.4 && IPL0.4
; Priority Level = 1
$$end$
$$if$IPH0.4 &! IPL0.4
; Priority Level = 2
$$end$
$$if$IPH0.4 && IPL0.4
; Priority Level = 3
$$end$
$$end$
$$if$IE0.5
; Timer 2 interrupt
$$ifn$IPH0.5 &! IPL0.5
; Priority Level = 0
$$end$
$$ifn$IPH0.5 && IPL0.5
; Priority Level = 1
$$end$
$$if$IPH0.5 &! IPL0.5
; Priority Level = 2
$$end$
$$if$IPH0.5 && IPL0.5
; Priority Level = 3
$$end$
$$end$
$$if$IE0.6
; PCA interrupt
$$ifn$IPH0.6 &! IPL0.6
; Priority Level = 0
$$end$
$$ifn$IPH0.6 && IPL0.6
; Priority Level = 1
$$end$
$$if$IPH0.6 &! IPL0.6
; Priority Level = 2
$$end$
$$if$IPH0.6 && IPL0.6
; Priority Level = 3
$$end$
$$end$
$$end$
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
init_special_interrupts:
mov IE0, #0$$IE0$h ; Enable interrupts
mov IPL0, #0$$IPL0$h ; Set interrupts priority
mov IPH0, #0$$IPH0$h ; Set interrupts priority
ret
main:
lcall init_special_interrupts
;
; User application codes
;
end
##80C251S? PCATMR#
##80C151S? PCATMR#
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
; PCA Timer/Counter
; Clocking Source: $%4CMOD.1-2$Fosc/12$Fosc/4$Timer 0 Overflow$External input (ECI)$
; Run Control: PCA Timer is $%eCCON.2$
$$if$ CCON.6
$$if$ CMOD.7
; (halts during idle mode)
$$end$
$$end$
; Timer Count: $$CH$$$CL.4-7$$$CL.0-3$H
$$if$ IE0.6
; PCA global interrupt: enabled
$$if$ CMOD.0
; --Enable PCA overflow interrupt
$$end$
$$if$ (IE0.7 == 0)
; NOTE: The global disable bit is clear;
; all interrupts are disabled.
$$end$
$$end$
init_pca_tmr:
clr CR ; Turn off PCA timer to load count
mov CL, #0$$CL$H ; Set PCA count (low byte)
mov CH, #0$$CH$H ; Set PCA count (high byte)
$$if$ IE0.6
setb EC ; Enable PCA global interrupt
$$end$
$$else$
clr EC ; Disable PCA global interrupt
$$end$
$$if$ CMOD.0
orl CMOD, #01H ; Enable PCA overflow interrupt
$$end$
$$else$
anl CMOD, #0FEH ; Disable PCA overflow interrupt
$$end$
anl CMOD, #0F9H ; Set clocking input source
orl CMOD, #$%4CMOD.1-2$00$02$04$06$H
$$if$ CMOD.7
orl CMOD, #80H ; Set counter idle control
$$end$
$$else$
anl CMOD, #7FH ; Clr counter idle control
$$end$
$$if$ CCON.6
setb CR ; Enable PCA Timer/Counter
$$end$
ret
main:
lcall init_pca_tmr
end
##80C251S? PCAMODULE#
##80C151S? PCAMODULE#
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
; PCA module $$PCAMODULE$
$$if$ (PCATYPE == 0)
; Disabled
$$end$
$$if$ (PCATYPE == 1)
; Capture Mode: trigger on a positive transition
$$end$
$$if$ (PCATYPE == 2)
; Capture Mode: trigger on a negative transition
$$end$
$$if$ (PCATYPE == 3)
; Capture Mode: trigger on a positive or negative transition
$$end$
$$if$ (PCATYPE == 4)
; Compare Mode: software timer
$$end$
$$if$ (PCATYPE == 5)
; Compare Mode: high-speed output
$$end$
$$if$ (PCATYPE == 6)
; Compare Mode: pulse width modulation
$$end$
$$if$ (PCATYPE == 7)
; Compare Mode: watchdog timer
$$end$
$$if$ (PCATYPE == 1) || (PCATYPE == 2) || (PCATYPE == 3)
$$if$ CCAPMx.0
; Interrupts: PCA capture enabled
$$ifn$ IE0.6
; NOTE: The PCA global interrupt is disabled
$$end$
$$end$
$$end$
$$if$ (PCATYPE == 4) || (PCATYPE == 5) || (PCATYPE == 7)
$$if$ CCAPMx.0
; Interrupts: PCA compare is enabled
$$ifn$ IE0.6
; NOTE: The PCA global interrupt is disabled
$$end$
$$end$
$$end$
init_pca_module$$PCAMODULE$:
$$if$ (PCATYPE == 7)
anl CMOD, #0BFH ; Disable watchdog mode to load compare value
$$end$
mov CCAPM$$PCAMODULE$, #0$$CCAPMx$H
$$if$ (PCATYPE == 4) || (PCATYPE == 5) || (PCATYPE == 7)
mov CCAP$$PCAMODULE$L, #0$$CCAPxL$H
mov CCAP$$PCAMODULE$H, #0$$CCAPxH$H
$$end$
$$if$ (PCATYPE == 6)
;To change the value in CCAP$$PCAMODULE$L w/o
; glitches write new value into CCAP$$PCAMODULE$H
mov CCAP$$PCAMODULE$H, #0$$CCAPxL$H
$$end$
$$if$ (PCATYPE == 7)
orl CMOD, #40H ; Enable watchdog mode
$$end$
ret
main:
lcall init_pca_module$$PCAMODULE$
end
##80C251S? IO_P0#
##80C151S? IO_P0#
; Initialize the quasi-bidirectional port pins. To use these
; pins as inputs they must be written with a one.
; IO port pins:
; Alternate Functions are Address/Data for External Memory
; p0.0 = $%tP0_DIR.0$IN$OUT$
; p0.1 = $%tP0_DIR.1$IN$OUT$
; p0.2 = $%tP0_DIR.2$IN$OUT$
; p0.3 = $%tP0_DIR.3$IN$OUT$
; p0.4 = $%tP0_DIR.4$IN$OUT$
; p0.5 = $%tP0_DIR.5$IN$OUT$
; p0.6 = $%tP0_DIR.6$IN$OUT$
; p0.7 = $%tP0_DIR.7$IN$OUT$
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
init_io_ports:
mov P0, #0$$P0$h ; Init Port 0
ret
main:
lcall init_io_ports
end
##80C251S? IO_P1#
##80C151S? IO_P1#
; Initialize the quasi-bidirectional port pins. To use these
; pins as inputs they must be written with a one.
; IO port pins:
; p1.0 = $%tP1_DIR.0$IN$OUT$ ;Special Function T2CLK
; p1.1 = $%tP1_DIR.1$IN$OUT$ ;Special Function T2EX
; p1.2 = $%tP1_DIR.2$IN$OUT$ ;
; p1.3 = $%tP1_DIR.3$IN$OUT$ ;
; p1.4 = $%tP1_DIR.4$IN$OUT$ ;
; p1.5 = $%tP1_DIR.5$IN$OUT$ ;
; p1.6 = $%tP1_DIR.6$IN$OUT$ ;
; p1.7 = $%tP1_DIR.7$IN$OUT$ ;
$include (251SB.INC)
CSEG AT FF:0000H ; Use FF:4000H when compiling for 80CX51SB target board
ljmp main
CSEG AT FF:0100H ; Use FF:4100H when compiling for 80CX51SB target board
init_io_ports:
mov P1, #0$$P1$h ; Init Port 1
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -