386exa.cod

mcs51,2051,x86系列MCU

/*
 *  Copyright (c) 1995, Intel Corporation
 *
 *  $Workfile:   386exa.cod  $
 *  $Revision:   1.5  $
 *  $Modtime:   Mar 20 1996 13:51:40  $
 *
 *  Purpose:
 *
 *
 *
 *
 *
 *  Compiler:       
 *
 *  Ext Packages:   
 *
 * 
 *
 */
##COMMENT#
  ************* Register Editor Coding information ************
##80C386EX WRITE#
$$IFSTR$ REG_MNEM "REMAPCFG"
For programming the REMAPCFG
register use the CPU
peripheral editor screen
$$END$
$$ELSE$
MOV   DX, @@REG_MNEM@
MOV   AX, $%aREG_VALUE$
OUT   DX, AX
$$END$
##80C386EX READ#
MOV   DX, @@REG_MNEM@
IN    AX, DX
##80C386EX AND#
$$IFSTR$ REG_MNEM "REMAPCFG"
For programming the REMAPCFG
register use the CPU
peripheral editor screen
$$END$
$$ELSE$
MOV   DX, @@REG_MNEM@
IN    AX, DX
AND   AX, $%aREG_VALUE$
OUT   DX, AX
$$END$
##80C386EX XOR#
$$IFSTR$ REG_MNEM "REMAPCFG"
For programming the REMAPCFG
register use the CPU
peripheral editor screen
$$END$
$$ELSE$
MOV   DX, @@REG_MNEM@
IN    AX, DX
XOR   AX, $%aREG_VALUE$
OUT   DX, AX
$$END$
##80C386EX OR#
$$IFSTR$ REG_MNEM "REMAPCFG"
For programming the REMAPCFG
register use the CPU
peripheral editor screen
$$END$
$$ELSE$
MOV   DX, @@REG_MNEM@
IN    AX, DX
OR    AX, $%aREG_VALUE$
OUT   DX, AX
$$END$
##80C386EX TESTZ#
MOV   DX, @@REG_MNEM@
IN    AX, DX
TEST  AX, $%aREG_VALUE$
JZ    <Dest. Label>
##80C386EX TESTNZ#
MOV   DX, @@REG_MNEM@
IN    AX, DX
TEST  AX, $%aREG_VALUE$
JNZ    <Dest. Label>
##COMMENT#
  ********** Begin Peripheral Editor Coding **************
##80C386EXCLOCK#
##80C386EXPM#
;Initialize the Clock and Power Management Unit for:
;  Clock frequency of @@CPU_FREQ@ MHz.
;  Prescaled clock output of @@PS_FREQUENCY@ MHz.
$$IF$ PWRCON.0
;  Enter Power Down Mode.
$$END$
$$IF$ PWRCON.1
;  Enter Idle Mode.
$$END$
$$IFN$ PWRCON.0-1
;  Normal Halt Instructions.
$$END$
                                    
INCLUDE 80386EX.INC
_TEXT SEGMENT PUBLIC 'CODE'
  ASSUME CS:_TEXT

  Init_ClockPMU Proc Far
$$IFN$ REMAPCFG.15

; Enable expanded I/O space for peripheral initialization.
  MOV   AX, 08000H       ;Enable expanded I/O space
  OUT   REMAPCFGH, AL    ;  and unlock the re-map bits
  XCHG  AL, AH
  OUT   REMAPCFGL, AL
  OUT   REMAPCFG, AX
 

$$END$
     _SetEXRegByte PWRCON, 0$$PWRCON$H
     _SetEXRegWord CLKPRS, 0$$CLKPRS$H
$$IFN$ REMAPCFG.15

; Restore I/O space to original condition.
     _SetEXRegByte REMAPCFGH, 00H  ;Disables expanded I/O space
$$END$
RET
  Init_ClockPMU ENDP
_TEXT ENDS
END

##80C386EXSync#
$$IFN$ REMAPCFG.15
; ******************************************
; * Must have expanded I/O space enabled   *
; * to initialize this peripheral.  The    *
; * expanded I/O space is enabled only in  *
; * the Enhanced Dos Mode and the NonDos   *
; * Mode.                                  *
; ******************************************

$$END$
;Initialize Synchronous Serial Port for:
;  Transmitter operating in $%2SSIOCON2.1$slave$master$ mode.
;    The transmitter is $%ESSIOCON1.4$.
;    The transmitter interrupt is $%ESSIOCON1.5$.
;
;  Receiver operating in $%2SSIOCON2.0$slave$master$ mode.
;    The receiver is $%ESSIOCON1.0$.
;    The receiver interrupt is $%ESSIOCON1.1$.
$$IF$ SSIOCON2.0-1
;
;  The clocking source is $%2SIOCFG.2$PSCLK$SERCLK$.
$$IF$ SIOCFG.2
;  Baud rate of @@SSIO_BAUD_TEXT@(@@SSIOBAUDERROR@%)bps, with an input clock of @@SER_CLK_FREQ@ Mhz.
$$END$
$$IFN$ SIOCFG.2
;  Baud rate of @@SSIO_BAUD_TEXT@(@@SSIOBAUDERROR@%)bps, with an input clock of @@PS_FREQUENCY@ Mhz.
$$END$
$$END$
$$IFN$ SSIOCON2.0 &! SSIOCON2.1

;  Baud rate generator is disabled.
$$END$


INCLUDE 80386EX.INC
_TEXT SEGMENT PUBLIC 'CODE'
  ASSUME CS:_TEXT

Init_SSIO Proc Far
$$IF$ SSIOBAUD.7
  _SetEXRegByte SIOCFG, 0$$SIOCFG$H          ;Set BRG source
$$END$
  _SetEXRegByte SSIOBAUD, 0$$SSIOBAUD$H       ;Configure the BRG
  _SetEXRegByte SSIOCON2, 0$$SSIOCON2$H       ;Set slave/master mode
  MOV  DX, SSIORBUF                 ;Read the receive buffer
  IN   AX, DX                       ;  to clear receive buffer interrupt.
  _SetEXRegByte SSIOCON1, 0$$SSIOCON1$H      ;Configure SSIO
  _SetEXRegByte INTCFG, 0$$INTCFG$H
  _SetEXRegByte PINCFG, 0$$PINCFG$H         ;Set SSIO pin connections
RET
Init_SSIO ENDP

_TEXT ENDS
END

##80C386EX IO1#
$$IFN$ REMAPCFG.15
; ******************************************
; * Must have expanded I/O space enabled   *
; * to initialize this peripheral.  The    *
; * expanded I/O space is enabled only in  *
; * the Enhanced Dos Mode and the NonDos   *
; * Mode.                                  *
; ******************************************

$$END$
;Initialize I/O Port 1 for:
$$IF$ P1CFG.0
;  PIN 0 = DCD0# Peripheral Pin
$$END$
$$IF$ P1DIR.0 && P1LTC.0 &! P1CFG.0
;  PIN 0 = Input
$$END$
$$IFN$ P1DIR.0 &! P1CFG.0
;  PIN 0 = Output
$$END$
$$IF$ P1DIR.0 &! P1LTC.0 &! P1CFG.0
;  PIN 0 = Open Drain
$$END$
$$IF$ P1CFG.1
;  PIN 1 = RTS0# Peripheral Pin
$$END$
$$IF$ P1DIR.1 && P1LTC.1 &! P1CFG.1
;  PIN 1 = Input
$$END$
$$IFN$ P1DIR.1 &! P1CFG.1
;  PIN 1 = Output
$$END$
$$IF$ P1DIR.1 &! P1LTC.1 &! P1CFG.1
;  PIN 1 = Open Drain
$$END$
$$IF$ P1CFG.2
;  PIN 2 = DTR0# Peripheral Pin
$$END$
$$IF$ P1DIR.2 && P1LTC.2 &! P1CFG.2
;  PIN 2 = Input
$$END$
$$IFN$ P1DIR.2 &! P1CFG.2
;  PIN 2 = Output
$$END$
$$IF$ P1DIR.2 &! P1LTC.2 &! P1CFG.2
;  PIN 2 = Open Drain
$$END$
$$IF$ P1CFG.3
;  PIN 3 = DSR0# Peripheral Pin
$$END$
$$IF$ P1DIR.3 && P1LTC.3 &! P1CFG.3
;  PIN 3 = Input
$$END$
$$IFN$ P1DIR.3 &! P1CFG.3
;  PIN 3 = Output
$$END$
$$IF$ P1DIR.3 &! P1LTC.3 &! P1CFG.3
;  PIN 3 = Open Drain
$$END$
$$IF$ P1CFG.4
;  PIN 4 = RI0# Peripheral Pin
$$END$
$$IF$ P1DIR.4 && P1LTC.4 &! P1CFG.4
;  PIN 4 = Input
$$END$
$$IFN$ P1DIR.4 &! P1CFG.4
;  PIN 4 = Output
$$END$
$$IF$ P1DIR.4 &! P1LTC.4 &! P1CFG.4
;  PIN 4 = Open Drain
$$END$
$$IF$ P1CFG.5
;  PIN 5 = LOCK# Peripheral Pin
$$END$
$$IF$ P1DIR.5 && P1LTC.5 &! P1CFG.5
;  PIN 5 = Input
$$END$
$$IFN$ P1DIR.5 &! P1CFG.5
;  PIN 5 = Output
$$END$
$$IF$ P1DIR.5 &! P1LTC.5 &! P1CFG.5
;  PIN 5 = Open Drain
$$END$
$$IF$ P1CFG.6
;  PIN 6 = HOLD Peripheral Pin
$$END$
$$IF$ P1DIR.6 && P1LTC.6 &! P1CFG.6
;  PIN 6 = Input
$$END$
$$IFN$ P1DIR.6 &! P1CFG.6
;  PIN 6 = Output
$$END$
$$IF$ P1DIR.6 &! P1LTC.6 &! P1CFG.6
;  PIN 6 = Open Drain
$$END$
$$IF$ P1CFG.7
;  PIN 7 = HLDA Peripheral Pin
$$END$
$$IF$ P1DIR.7 && P1LTC.7 &! P1CFG.7
;  PIN 7 = Input
$$END$
$$IFN$ P1DIR.7 &! P1CFG.7
;  PIN 7 = Output
$$END$
$$IF$ P1DIR.7 &! P1LTC.7 &! P1CFG.7
;  PIN 7 = Open Drain
$$END$

INCLUDE 80386EX.INC
_TEXT SEGMENT PUBLIC 'CODE'
  ASSUME CS:_TEXT

  Init_IO1 Proc Far
    _SetEXRegByte P1LTC, 0$$P1LTC$H
    _SetEXRegByte P1DIR, 0$$P1DIR$H
    _SetEXRegByte P1CFG, 0$$P1CFG$H
RET
  Init_IO1 ENDP

_TEXT ENDS
END

##80C386EX IO2#
$$IFN$ REMAPCFG.15
; ******************************************
; * Must have expanded I/O space enabled   *
; * to initialize this peripheral.  The    *
; * expanded I/O space is enabled only in  *
; * the Enhanced Dos Mode and the NonDos   *
; * Mode.                                  *
; ******************************************

$$END$
;Initialize I/O Port 2 for:
$$IF$ P2CFG.0
;  PIN 0 = CS0# Peripheral Pin
$$END$
$$IF$ P2DIR.0 && P2LTC.0 &! P2CFG.0
;  PIN 0 = Input
$$END$
$$IFN$ P2DIR.0 &! P2CFG.0
;  PIN 0 = Output
$$END$
$$IF$ P2DIR.0 &! P2LTC.0 &! P2CFG.0
;  PIN 0 = Open Drain
$$END$
$$IF$ P2CFG.1
;  PIN 1 = CS1# Peripheral Pin
$$END$
$$IF$ P2DIR.1 && P2LTC.1 &! P2CFG.1
;  PIN 1 = Input
$$END$
$$IFN$ P2DIR.1 &! P2CFG.1
;  PIN 1 = Output
$$END$
$$IF$ P2DIR.1 &! P2LTC.1 &! P2CFG.1
;  PIN 1 = Open Drain
$$END$
$$IF$ P2CFG.2
;  PIN 2 = CS2# Peripheral Pin
$$END$
$$IF$ P2DIR.2 && P2LTC.2 &! P2CFG.2
;  PIN 2 = Input
$$END$
$$IFN$ P2DIR.2 &! P2CFG.2
;  PIN 2 = Output
$$END$
$$IF$ P2DIR.2 &! P2LTC.2 &! P2CFG.2
;  PIN 2 = Open Drain
$$END$
$$IF$ P2CFG.3
;  PIN 3 = CS3# Peripheral Pin
$$END$
$$IF$ P2DIR.3 && P2LTC.3 &! P2CFG.3
;  PIN 3 = Input
$$END$
$$IFN$ P2DIR.3 &! P2CFG.3
;  PIN 3 = Output
$$END$
$$IF$ P2DIR.3 &! P2LTC.3 &! P2CFG.3
;  PIN 3 = Open Drain
$$END$
$$IF$ P2CFG.4
;  PIN 4 = CS4# Peripheral Pin
$$END$
$$IF$ P2DIR.4 && P2LTC.4 &! P2CFG.4
;  PIN 4 = Input
$$END$
$$IFN$ P2DIR.4 &! P2CFG.4
;  PIN 4 = Output
$$END$
$$IF$ P2DIR.4 &! P2LTC.4 &! P2CFG.4
;  PIN 4 = Open Drain
$$END$
$$IF$ P2CFG.5
;  PIN 5 = RXD0 Peripheral Pin
$$END$
$$IF$ P2DIR.5 && P2LTC.5 &! P2CFG.5
;  PIN 5 = Input
$$END$
$$IFN$ P2DIR.5 &! P2CFG.5
;  PIN 5 = Output
$$END$
$$IF$ P2DIR.5 &! P2LTC.5 &! P2CFG.5
;  PIN 5 = Open Drain
$$END$
$$IF$ P2CFG.6
;  PIN 6 = TXD0 Peripheral Pin
$$END$
$$IF$ P2DIR.6 && P2LTC.6 &! P2CFG.6
;  PIN 6 = Input
$$END$
$$IFN$ P2DIR.6 &! P2CFG.6
;  PIN 6 = Output
$$END$
$$IF$ P2DIR.6 &! P2LTC.6 &! P2CFG.6
;  PIN 6 = Open Drain
$$END$
$$IF$ P2CFG.7
;  PIN 7 = CTS0# Peripheral Pin
$$END$
$$IF$ P2DIR.7 && P2LTC.7 &! P2CFG.7
;  PIN 7 = Input
$$END$