pe386ex.rd1

mcs51,2051,x86系列MCU

#Serial0 80C386EX 142#
#Serial1 80C386EX 142#
Determine which interrupt signals will be enabled. To enable, check the interrupt source, and to disable, clear it.

Receiver Line Status Interrupt Enable: An interrupt is sent when there is an overrun error, parity error, framing error, or break interrupt. 
#Serial0 80C386EX 143#
#Serial1 80C386EX 143#
Determine which interrupt signals will be enabled. To enable, check the interrupt source, and to disable, clear it.

Modem Status Interrupt Enable: An interrupt is sent when there is a change on one or more of the modem input signals. 
#Serial0 80C386EX 150#
#Serial1 80C386EX 150#
This option connects the modem output signals to the modem input signals. In this case, the modem input signals are disconnected from the package pins. 
#Serial0 80C386EX 151#
#Serial1 80C386EX 151#
This option connects the modem input signals to the package pins. 
#Serial0 80C386EX 100#
#Serial1 80C386EX 100#
Specify the desired baud rate. NOTE: The baud rate is a function of the input clock frequency and a 16-bit divisor (real number) and therefore it may not be possible to achieve the exact baud rate desired. 
#Serial0 80C386EX 120#
#Serial1 80C386EX 120#
Specify the clocking frequency for the baud-rate generator. 

If the internal serial clock (SERCLK) is selected as the source, this will be set by the processor clock, CLK2 (2 x CPU Frequency), divided by 4. If the external clocking source (COMCLK) is selected, frequencies up to 12.5 MHz are allowable. 
#Serial0 80C386EX 160#
#Serial1 80C386EX 160#
This option selects the internal serial clock (SERCLK) as the clocking source for the baud-rate generator. This internal signal is the processor's input clock, CLK2, divided by four. 
#Serial0 80C386EX 161#
#Serial1 80C386EX 161#
This option selects an external clocking source, connected to the COMCLK pin, as the clocking source for the baud-rate generator. A clocking frequency up to 12.5 MHz is allowable. 
#Serial0 80C386EX 170#
#Serial1 80C386EX 170#
Specify the number of stop bits transmitted and received in each serial character. 

This option sets the stop bits equal to 1. 
#Serial0 80C386EX 171#
#Serial1 80C386EX 171#
Specify the number of stop bits transmitted and received in each serial character. 

This option sets the stop bits equal to 2. 
#CPU 80C386EX 110#
Determine which addressing mode to enable. 

DOS-Compatible Mode: All PC/AT compatible peripherals are mapped into the DOS I/O space. Accesses to PC/AT-compatible peripherals are valid, while all other internal peripherals are inaccessible. (Expanded I/O space peripherals are not accessible.) Useful for accessing the internal timer, interrupt controller, serial I/O ports, or DMA controller in a DOS-compatible environment. 
#CPU 80C386EX 111#
Determine which addressing mode to enable. 

Non-Intrusive DOS Mode: The peripherals whose remap bits are set will be remapped out of DOS I/O. Useful for connecting an external peripheral instead of using the integrated peripheral. Expanded I/O space peripherals and on-chip DMA are accessible only after the expanded I/O space is enabled. 
#CPU 80C386EX 112#
Determine which addressing mode to enable. 

Enhanced DOS Mode: The expanded I/O space is enabled and the PC/AT-compatible internal peripherals are accessible in either DOS I/O space or expanded I/O space. Useful if an application frequently requires the additional peripherals, but at the same time wants to maintain DOS-compatibility for ease of development. 
#CPU 80C386EX 113#
Determine which addressing mode to enable. 

Non DOS Mode: The expanded I/O space is enabled and all peripherals can be accessed only in expanded I/O space. Useful for applications that don't require DOS compatibility and have other custom peripherals in slot 0 I/O space. 
#CPU 80C386EX 120#
Determine the location of the Asynchronous Serial Channel 1. 

This option maps the peripheral in the expanded I/O space. 
#CPU 80C386EX 121#
#CPU 80C386EX 221#
Determine the location of the Asynchronous Serial Channel 1. 

This option maps the peripheral in the DOS I/O space. 
#CPU 80C386EX 122#
Determine the location of the Asynchronous Serial Channel 0. 

This option maps the peripheral in the expanded I/O space. 
#CPU 80C386EX 123#
#CPU 80C386EX 223#
Determine the location of the Asynchronous Serial Channel 0 . 

This option maps the peripheral in the DOS I/O space. 
#CPU 80C386EX 124#
Determine the location of the Slave Interrupt Controller. 

This option maps the peripheral in the expanded I/O space. 
#CPU 80C386EX 125#
#CPU 80C386EX 225#
Determine the location of the Slave Interrupt Controller. 

This option maps the peripheral in the DOS I/O space. 
#CPU 80C386EX 126#
Determine the location of the Master Interrupt Controller. 

This option maps the peripheral in the expanded I/O space. 
#CPU 80C386EX 127#
#CPU 80C386EX 227#
Determine the location of the Master Interrupt Controller. 

This option maps the peripheral in the DOS I/O space. 
#CPU 80C386EX 128#
Determine the location of the DMA. 

This option maps the peripheral in the expanded I/O space. 
#CPU 80C386EX 129#
#CPU 80C386EX 229#
Determine the location of the DMA. 

This option maps the peripheral in the DOS I/O space. 
#CPU 80C386EX 130#
Determine the location of the Timer. 

This option maps the peripheral in the expanded I/O space. 
#CPU 80C386EX 131#
#CPU 80C386EX 231#
Determine the location of the Timer. 

This option maps the peripheral in the DOS I/O space. 
#CPU 80C386EX 220#
Determine the location of the Asynchronous Serial Channel 1. 

This option remaps the peripheral out of DOS I/O. NOTE: A peripheral mapped out of DOS I/O (mapped into expanded I/O) is accessible only after the expanded I/O space is enabled. 
#CPU 80C386EX 222#
Determine the location of the Asynchronous Serial Channel 0. 

This option remaps the peripheral out of DOS I/O. NOTE: A peripheral mapped out of DOS I/O (mapped into expanded I/O) is accessible only after the expanded I/O space is enabled.
#CPU 80C386EX 224#
Determine the location of the Slave Interrupt Controller. 

This option remaps the peripheral out of DOS I/O. NOTE: A peripheral mapped out of DOS I/O (mapped into expanded I/O) is accessible only after the expanded I/O space is enabled. 
#CPU 80C386EX 226#
Determine the location of the Master Interrupt Controller. 

This option remaps the peripheral out of DOS I/O. NOTE: A peripheral mapped out of DOS I/O (mapped into expanded I/O) is accessible only after the expanded I/O space is enabled.
#CPU 80C386EX 228#
Determine the location of the DMA. 

This option remaps the peripheral out of DOS I/O. NOTE: A peripheral mapped out of DOS I/O (mapped into expanded I/O) is accessible only after the expanded I/O space is enabled. 
#CPU 80C386EX 230#
Determine the location of the Timer. 

This option remaps the peripheral out of DOS I/O. NOTE: A peripheral mapped out of DOS I/O (mapped into expanded I/O) is accessible only after the expanded I/O space is enabled.
#CPU 80C386EX 221#
Determine the location of the Asynchronous Serial Channel 0. 

This option maps the peripheral in DOS I/O.
#CPU 80C386EX IDD_NONINTR_DMA_LO#
This option must NOT be chosen as the DMA must be remapped into expanded I/O space. Select the DMA address location to be High as this remaps it into expanded I/O.
#CSU 80C386EX 110#
#BIU 80C386EX 110#
#CSU 80C386EX 112#
#BIU 80C386EX 112#
#CSU 80C386EX 113#
#BIU 80C386EX 113#
#CSU 80C386EX 114#
#BIU 80C386EX 114#
#CSU 80C386EX 115#
#BIU 80C386EX 115#
#CSU 80C386EX 116#
#BIU 80C386EX 116#
#CSU 80C386EX 117#
#BIU 80C386EX 117#
#CSU 80C386EX 111#
#BIU 80C386EX 111#
Check this option to enable the chip-select channel; clear it to disable the channel. 
#CSU 80C386EX 140#
#BIU 80C386EX 140#
#CSU 80C386EX 142#
#BIU 80C386EX 142#
#CSU 80C386EX 143#
#BIU 80C386EX 143#
#CSU 80C386EX 144#
#BIU 80C386EX 144#
#CSU 80C386EX 145#
#BIU 80C386EX 145#
#CSU 80C386EX 146#
#BIU 80C386EX 146#
#CSU 80C386EX 147#
#BIU 80C386EX 147#
#CSU 80C386EX 141#
#BIU 80C386EX 141#
Determine whether the bus READY signal is necessary to complete a bus cycle.

Checking this option requires that bus READY be active to complete a bus cycle.
Clearing it results in bus READY being ignored.

NOTE: This option must be set (checked) in order to extend the number of wait states beyond 31. 
#CSU 80C386EX 120#
#BIU 80C386EX 120#
#CSU 80C386EX 122#
#BIU 80C386EX 122#
#CSU 80C386EX 123#
#BIU 80C386EX 123#
#CSU 80C386EX 124#
#BIU 80C386EX 124#
#CSU 80C386EX 125#
#BIU 80C386EX 125#
#CSU 80C386EX 126#
#BIU 80C386EX 126#
#CSU 80C386EX 127#
#BIU 80C386EX 127#
#CSU 80C386EX 121#
#BIU 80C386EX 121#
Determine the bus size of the channel.
 
With this bit set (checked), the processor assumes that the currently addressed device requires a 16-bit data bus unless the bus size control pin (BS8#) is asserted. When asserted, BS8# tells the processor that the addressed devices requires an 8-bit data bus.
 
Clearing this bit specifically programs the channel for 8-bit devices. This causes the CSU to automatically assert BS8# each time it activates the channel. 
#CSU 80C386EX 130#
#BIU 80C386EX 130#
#CSU 80C386EX 132#
#BIU 80C386EX 132#
#CSU 80C386EX 133#
#BIU 80C386EX 133#
#CSU 80C386EX 134#
#BIU 80C386EX 134#
#CSU 80C386EX 135#
#BIU 80C386EX 135#
#CSU 80C386EX 136#
#BIU 80C386EX 136#
#CSU 80C386EX 137#
#BIU 80C386EX 137#
#CSU 80C386EX 131#
#BIU 80C386EX 131#
Determine the channel's address location.

Checking this option maps the channel into memory address space. 

Clearing it maps the channel into I/O address space. 
#CSU 80C386EX 190#
#BIU 80C386EX 190#
#CSU 80C386EX 192#
#BIU 80C386EX 192#
#CSU 80C386EX 193#
#BIU 80C386EX 193#
#CSU 80C386EX 194#
#BIU 80C386EX 194#
#CSU 80C386EX 195#
#BIU 80C386EX 195#
#CSU 80C386EX 196#
#BIU 80C386EX 196#
#CSU 80C386EX 197#
#BIU 80C386EX 197#
#CSU 80C386EX 191#
#BIU 80C386EX 191#
Determine when the chip-select channel is activated.

SMI: The CSU activates the chip-select channel only while the processor is in SMM.

Memory: The CSU activates the chip-select channel only while the processor is operating in a mode other than SMM.

Both: An address match activates the chip-select channel, regardless of whether the processor is in SMM. 
#CSU 80C386EX 200#
#BIU 80C386EX 200#
#CSU 80C386EX 202#
#BIU 80C386EX 202#
#CSU 80C386EX 203#
#BIU 80C386EX 203#
#CSU 80C386EX 204#
#BIU 80C386EX 204#
#CSU 80C386EX 205#
#BIU 80C386EX 205#
#CSU 80C386EX 206#
#BIU 80C386EX 206#
#CSU 80C386EX 207#
#BIU 80C386EX 207#
#CSU 80C386EX 201#
#BIU 80C386EX 201#
Determine whether the address specified is the beginning address or the ending address of the channel's active address block. 
#CSU 80C386EX 150#
#BIU 80C386EX 150#
#CSU 80C386EX 152#
#BIU 80C386EX 152#
#CSU 80C386EX 153#
#BIU 80C386EX 153#
#CSU 80C386EX 154#
#BIU 80C386EX 154#
#CSU 80C386EX 155#
#BIU 80C386EX 155#
#CSU 80C386EX 156#
#BIU 80C386EX 156#
#CSU 80C386EX 157#
#BIU 80C386EX 157#
#CSU 80C386EX 151#
#BIU 80C386EX 151#
Specify the boundary address of the channel's active address block. 
#CSU 80C386EX 160#
#BIU 80C386EX 160#
#CSU 80C386EX 162#
#BIU 80C386EX 162#
#CSU 80C386EX 163#
#BIU 80C386EX 163#
#CSU 80C386EX 164#
#BIU 80C386EX 164#
#CSU 80C386EX 165#
#BIU 80C386EX 165#
#CSU 80C386EX 166#
#BIU 80C386EX 166#
#CSU 80C386EX 167#
#BIU 80C386EX 167#
#CSU 80C386EX 161#
#BIU 80C386EX 161#
Specify the block size of the channel's active address block. 
#CSU 80C386EX 170#