296sac.cod

mcs51,2051,x86系列MCU

#define   DEFERRED_MODE_ENAB 0x20
#define   DEFERRED_MODE_DISAB 0x00
$$end$

static const unsigned int CCB[] =
          { 0x2000 |
            CCR0_RESERVED |
            $%4CCR0.4-5$ZERO$ONE$TWO$THREE$_WAIT_STATES |
            POW_DN_$%TCCR0.0$ENABLE$DISABLE$ |
            $%TCCR0.2$WR_BHE$WRL_WRH$ |
            $%TCCR0.3$DEMUXED$MUXED$_MODE |
            BUS_WIDTH_$%TCCR0.1$16$8$,

            0x2000 | 
            CCR0_RESERVED |
$$ifp$80c296sa
            $%TCCR1.5$DEFERRED_MODE_ENAB$DEFERRED_MODE_DISAB$ |
$$end$
            $%TCCR1.1$MODE64$MODE1MEG$ |
            CCR1_RESERVED};

#pragma locate (CCB=0x00FF2018)

$$if$  WSR.7
#define   HOLD_CONTROL   0x80
void init_hold_holda()
{
 /*  init the hold, holda, and breq pins to special function  */

 p2_reg |= 0x68;       /*  init hold#  */
 p2_dir &= 0xB7;       /*  make hlda, breq outputs  */
 setbit(p2_dir, 5)     /*  make hold  input  */
 p2_mode |= 0x68       /*  make special function */
 wsr |= HOLD_CONTROL;
} 
$$end$

$$ifp$80c296sa
$$if$ con_reg0.7
void init_pwm()
{
 setbit(con_reg0,7);    /*  disable PWM counter  */
}

$$end$
$$if$ sp_con.7
void init_serial()
{
 setbit(sp_con,7);    /*  disable Baud-rate Generator  */
}

$$end$
void init_accumulator()
{
   ACC_STAT=0x0$%TACC_STAT.6$ | SAT_MODE_ENAB$$$%TACC_STAT.7$ | FRACT_MODE_ENAB$$;
}

$$ifn$ WSR.7
void main(void)
{
$$end$
$$end$
$$if$ WSR.7
void main(void)
{
   init_hold_holda();
$$end$
   init_accumulator();
$$if$ con_reg0.7
   init_pwm();
$$end$
$$if$ sp_con.7
   init_serial();
$$end$
   
/*   Users code   */

$$if$ WSR.7
/*  To change wsr use:

 wsr = HOLD_CONTROL | WINDOW_VALUE;
*/
$$end$ 
 while(1);
}
##80C296SA ICU#
#pragma model(EX)
$$ifp$80c296sa
#include <80c296sa.h>
$$end$

void init_interrupts(void)
{
 int_mask   = 0x$$INT_MASK$;
 int_mask1  = 0x$$INT_MASK1$;
 int_con0   = 0x$$INT_CON0$;
 int_con1   = 0x$$INT_CON1$;
 int_con2   = 0x$$INT_CON2$;
 int_con3   = 0x$$INT_CON3$;
 vect_addr  = 0x$$VECT_ADDR$;
 extint_con = 0x$$EXTINT_CON$;
}
$$if$ INT_MASK.0

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(timer1_ovr_template = 0)
void timer1_ovr_template(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK.1

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(timer2_ovr_template = 1)
void timer2_ovr_template(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK.2

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(reserved2 = 2)
void reserved2(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK.3

#pragma interrupt(extint0_isr_template = 3)
void extint0_isr_template(void)
{
 ******** user code *******
}
$$end$
$$if$ INT_MASK.4

#pragma interrupt(extint1_isr_template = 4)
void extint1_isr_template(void)
{
 ******** user code *******
}
$$end$
$$if$ INT_MASK.5

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(TXD_isr_template = 5)
void TXD_isr_template(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK.6

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(RXD_isr_template = 6)
void RXD_isr_template(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK.7

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(EPA0_isr_template = 7)
void EPA0_isr_template(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK1.0

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(EPA1_isr_template = 24)
void EAP1_isr_template(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK1.1

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(EPA2_isr_template = 25)
void EPA2_isr_template(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK1.2

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(EPA3_isr_template = 26)
void EPA3_isr_template(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK1.3

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(EPA0_1_OVR_isr_template = 27)
void EPA0_1_OVR_isr_template(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK1.4

/*   Enabling of the this Interrupt should be generated 
     using the peripheral editor.  The following can be used for 
     template. 
#pragma interrupt(EPA2_3_OVR_isr_template = 28)
void EPA2_3_OVR_isr_template(void)
{
 ******** user code *******
}
*/
$$end$
$$if$ INT_MASK1.5
#pragma interrupt(EXTINT2_isr_template = 29)
void EXTINT2_isr_template(void)
{
 ******** user code *******
}
$$end$
$$if$ INT_MASK1.6
#pragma interrupt(EXTINT3_isr_template = 30)
void EXTINT3_isr_template(void)
{
 ******** user code *******
}
$$end$

/*   The following can be used for  template to handle a TRAP 
     interrupt.

#pragma interrupt(TRAP_isr_template = 8)
void TRAP_isr_template(void)
{
 ******** user code *******
}
*/

/*   The following can be used for  template to handle a un-
     implimented opcode.

#pragma interrupt(UN_IMP_OPCODE_isr_template = 9)
void UN_IMP_OPCODE_isr_template(void)
{
 ******** user code *******
}
*/

/*   The following can be used for  template to handle a Non-
     Maskable-Interrupt.

#pragma interrupt(NMI_isr_template = 31)
void NMI_isr_template(void)
{
 ******** user code *******
}
*/

void main(void)
{
 init_interrupts();
$$if$ PSW.1
 enable();
$$end$ 
 while(1);     /*  wait for interrupts to occur   */
}
##80C296SA IO_P1#
#pragma model(EX)
$$ifp$80c296sa
#include <80c296sa.h>
$$end$

#define   IO_EPA0        0x01
#define   IO_EPA1        0x02
#define   IO_EPA2        0x04
#define   IO_EPA3        0x08
#define   IO_T1CLK       0x10
#define   IO_T1DIR       0x20
#define   IO_T2CLK       0x40
#define   IO_T2DIR       0x80

#define   LSIO_0         0x00
#define   LSIO_1         0x00
#define   LSIO_2         0x00
#define   LSIO_3         0x00
#define   LSIO_4         0x00
#define   LSIO_5         0x00
#define   LSIO_6         0x00
#define   LSIO_7         0x00

#define   IO_INPUT0      0x01
#define   IO_INPUT1      0x02
#define   IO_INPUT2      0x04
#define   IO_INPUT3      0x08
#define   IO_INPUT4      0x10
#define   IO_INPUT5      0x20
#define   IO_INPUT6      0x40
#define   IO_INPUT7      0x80
#define   IO_OUTPUT0     0x00
#define   IO_OUTPUT1     0x00
#define   IO_OUTPUT2     0x00
#define   IO_OUTPUT3     0x00
#define   IO_OUTPUT4     0x00
#define   IO_OUTPUT5     0x00
#define   IO_OUTPUT6     0x00
#define   IO_OUTPUT7     0x00

void init_port1(void)
{
 p1_reg = 0x$$P1_REG$;   /*  initial value in p1_reg  */
 p1_dir = $%TP1_DIR.0$IO_INPUT0$IO_OUTPUT0$ | $%TP1_DIR.1$IO_INPUT1$IO_OUTPUT1$  |
          $%TP1_DIR.2$IO_INPUT2$IO_OUTPUT2$ | $%TP1_DIR.3$IO_INPUT3$IO_OUTPUT3$  |
          $%TP1_DIR.4$IO_INPUT4$IO_OUTPUT4$ | $%TP1_DIR.5$IO_INPUT5$IO_OUTPUT5$  |
          $%TP1_DIR.6$IO_INPUT6$IO_OUTPUT6$ | $%TP1_DIR.7$IO_INPUT7$IO_OUTPUT7$;
 p1_mode = $%TP1_MODE.0$IO_EPA0$LSIO_0$ | $%TP1_MODE.1$IO_EPA1$LSIO_1$ |
           $%TP1_MODE.2$IO_EPA2$LSIO_2$ | $%TP1_MODE.3$IO_EPA3$LSIO_3$ |
           $%TP1_MODE.4$IO_T1CLK$LSIO_4$ | $%TP1_MODE.5$T1DIR$LSIO_5$ |
           $%TP1_MODE.6$IO_T2CLK$LSIO_6$ | $%TP1_MODE.7$IO_T2DIR$LSIO_7$;
}
##80C196NT IO_P2#
#pragma model(EX)
$$ifp$80c296sa
#include <80c296sa.h>
$$end$

#define   IO_TXD         0x01
#define   IO_RXD         0x02
#define   IO_EXTINT0     0x04
#define   IO_BREQ        0x08
#define   IO_EXTINT1     0x10
#define   IO_HLD         0x20
#define   IO_HLDA        0x40
#define   IO_CLKOUT      0x80

#define   LSIO_0         0x00
#define   LSIO_1         0x00
#define   LSIO_2         0x00
#define   LSIO_3         0x00
#define   LSIO_4         0x00
#define   LSIO_5         0x00
#define   LSIO_6         0x00
#define   LSIO_7         0x00

#define   IO_INPUT0      0x01
#define   IO_INPUT1      0x02
#define   IO_INPUT2      0x04
#define   IO_INPUT3      0x08
#define   IO_INPUT4      0x10
#define   IO_INPUT5      0x20
#define   IO_INPUT6      0x40
#define   IO_INPUT7      0x80
#define   IO_OUTPUT0     0x00
#define   IO_OUTPUT1     0x00
#define   IO_OUTPUT2     0x00
#define   IO_OUTPUT3     0x00
#define   IO_OUTPUT4     0x00
#define   IO_OUTPUT5     0x00
#define   IO_OUTPUT6     0x00
#define   IO_OUTPUT7     0x00

void init_port2(void)
{
 p2_reg = 0x$$P2_REG$;   /*  initial value in p2_reg  */
 p2_dir = $%TP2_DIR.0$IO_INPUT0$IO_OUTPUT0$ | $%TP2_DIR.1$IO_INPUT1$IO_OUTPUT1$  |
          $%TP2_DIR.2$IO_INPUT2$IO_OUTPUT2$ | $%TP2_DIR.3$IO_INPUT3$IO_OUTPUT3$  |
          $%TP2_DIR.4$IO_INPUT4$IO_OUTPUT4$ | $%TP2_DIR.5$IO_INPUT5$IO_OUTPUT5$  |
          $%TP2_DIR.6$IO_INPUT6$IO_OUTPUT6$ | $%TP2_DIR.7$IO_INPUT7$IO_OUTPUT7$;
 p2_mode = $%TP2_MODE.0$IO_TXD$LSIO_0$ | $%TP2_MODE.1$IO_RXD$LSIO_1$ |
           $%TP2_MODE.2$IO_EXTINT0$LSIO_2$ | $%TP2_MODE.3$IO_BREQ$LSIO_3$ |
           $%TP2_MODE.4$IO_EXTINT1$LSIO_4$ | $%TP2_MODE.5$IO_HLD$LSIO_5$ |
           $%TP2_MODE.6$IO_HLDA$LSIO_6$ | $%TP2_MODE.7$IO_CLKOUT$LSIO_7$;
}
##80C296SA IO_P3#
#pragma model(EX)
$$ifp$80c296sa
#include <80c296sa.h>
$$end$

#define   IO_CS0         0x01
#define   IO_CS1         0x02
#define   IO_CS2         0x04
#define   IO_CS3         0x08
#define   IO_CS4         0x10
#define   IO_CS5         0x20
#define   IO_EXTINT2     0x40
#define   IO_EXTINT3     0x80

#define   LSIO_0         0x00
#define   LSIO_1         0x00
#define   LSIO_2         0x00
#define   LSIO_3         0x00
#define   LSIO_4         0x00
#define   LSIO_5         0x00
#define   LSIO_6         0x00
#define   LSIO_7         0x00

#define   IO_INPUT0      0x01
#define   IO_INPUT1      0x02
#define   IO_INPUT2      0x04
#define   IO_INPUT3      0x08
#define   IO_INPUT4      0x10
#define   IO_INPUT5      0x20
#define   IO_INPUT6      0x40
#define   IO_INPUT7      0x80
#define   IO_OUTPUT0     0x00
#define   IO_OUTPUT1     0x00
#define   IO_OUTPUT2     0x00
#define   IO_OUTPUT3     0x00
#define   IO_OUTPUT4     0x00
#define   IO_OUTPUT5     0x00
#define   IO_OUTPUT6     0x00
#define   IO_OUTPUT7     0x00

void init_port3(void)
{
 p3_reg = 0x$$P3_REG$;   /*  initial value in P3_reg  */
 p3_dir = $%TP3_DIR.0$IO_INPUT0$IO_OUTPUT0$ | $%TP3_DIR.1$IO_INPUT1$IO_OUTPUT1$  |
          $%TP3_DIR.2$IO_INPUT2$IO_OUTPUT2$ | $%TP3_DIR.3$IO_INPUT3$IO_OUTPUT3$  |
          $%TP3_DIR.4$IO_INPUT4$IO_OUTPUT4$ | $%TP3_DIR.5$IO_INPUT5$IO_OUTPUT5$  |
          $%TP3_DIR.6$IO_INPUT6$IO_OUTPUT6$ | $%TP3_DIR.7$IO_INPUT7$IO_OUTPUT7$;
 p3_mode = $%TP3_MODE.0$IO_CS0$LSIO_0$ | $%TP3_MODE.1$IO_CS1$LSIO_1$ |
           $%TP3_MODE.2$IO_CS2$LSIO_2$ | $%TP3_MODE.3$IO_CS3$LSIO_3$ |
           $%TP3_MODE.4$IO_CS4$LSIO_4$ | $%TP3_MODE.5$IO_CS5$LSIO_5$ |
           $%TP3_MODE.6$IO_EXTINT2$LSIO_6$ | $%TP3_MODE.7$IO_EXTINT3$LSIO_7$;
}
##80C296SA IO_P4#
#pragma model(EX)
$$ifp$80c296sa
#include <80c296sa.h>
$$end$

#define   IO_PWM0        0x01
#define   IO_PWM1        0x02
#define   IO_PWM2        0x04
#define   IO_LSIO        0x08
#define   IO_RESERVED    0xF0

#define   LSIO_0         0x00
#define   LSIO_1         0x00
#define   LSIO_2         0x00
#define   LSIO_3         0x00

#define   IO_INPUT0      0x01
#define   IO_INPUT1      0x02
#define   IO_INPUT2      0x04
#define   IO_INPUT3      0x08
#define   IO_OUTPUT0     0x00
#define   IO_OUTPUT1     0x00
#define   IO_OUTPUT2     0x00
#define   IO_OUTPUT3     0x00

void init_port4(void)
{
 p4_reg = 0x$$P4_REG$;   /*  initial value in p3_reg  */
 p4_dir = $%TP4_DIR.0$IO_INPUT0$IO_OUTPUT0$ | $%TP4_DIR.1$IO_INPUT1$IO_OUTPUT1$  |
          $%TP4_DIR.2$IO_INPUT2$IO_OUTPUT2$ | $%TP4_DIR.3$IO_INPUT3$IO_OUTPUT3$;
 p4_mode = $%TP4_MODE.0$IO_PWM0$LSIO_0$ | $%TP4_MODE.1$IO_PWM1$LSIO_1$ |
           $%TP4_MODE.2$IO_PWM2$LSIO_2$;
}