196c.cod

mcs51,2051,x86系列MCU

     $$if$ INT_MASK1.0
#pragma interrupt(transmit=24)
     $$end$
     $$if$ INT_MASK.6
#pragma interrupt(serial_isr=6)
     $$end$     

     $$if$ INT_MASK1.0 || INT_MASK.6
#define TRANSMIT_BUF_SIZE 20
     $$end$
     $$if$ INT_MASK1.1 || INT_MASK.6
#define RECEIVE_BUF_SIZE 20
     $$end$
     $$if$ INT_MASK1.0 || INT_MASK.6

/*   transmit buffer and it's indexes    */
static unsigned char trans_buff[TRANSMIT_BUF_SIZE];
static char begin_trans_buff,end_trans_buff;
     $$end$
     $$if$ INT_MASK1.1 || INT_MASK.6

/*   receive buffer and it's indexes    */
static unsigned char receive_buff[RECEIVE_BUF_SIZE];
static char end_rec_buff,begin_rec_buff;
     $$end$
     $$if$ INT_MASK1.0 || INT_MASK.6

void transmit(void)             /*  serial interrupt routine  */
{
sp_status_image |= sp_stat;       /*  image sp_stat into
                                        sp_status_image  */

/*   transmit a character if there is a character in the buffer
     else leave TI_BIT set in image for putchar to enable interrupts   */
if(begin_trans_buff!=end_trans_buff)
     {
     $$if$ SP_CON.4
/*   If bit 8 needs to be set, then the following line needs to
     be inserted:
     _SetSFR_bit(sp_con, SET_BIT_8);   */
     $$end$
     sbuf=trans_buff[begin_trans_buff];   /*  transmit character  */

/*   The next statement makes the buffer circular by starting over when the
     index reaches the end of the buffer.   */

     if(++begin_trans_buff>TRANSMIT_BUF_SIZE - 1)begin_trans_buff=0;
     clrbit(sp_status_image,TI_BIT);     /*  clear TI bit in status_image.   */
     }
}

int putchar(int c)
{
/*   remain in loop while the buffer is full.  This is done by checking
     the end of buffer index to make sure it does not overrun the
     beginning of buffer index.   The while instruction checks the case
     when the end index is one less then the beginning index and at the
     end of the buffer when the beginning index may be equal to 0 and
     the end buffer index may be at the buffer end.   */

while((end_trans_buff+1==begin_trans_buff)||
      (end_trans_buff==TRANSMIT_BUF_SIZE -1 && !begin_trans_buff));

trans_buff[end_trans_buff]=c;           /*  put character in buffer  */
if(++end_trans_buff>TRANSMIT_BUF_SIZE - 1)   /*  make buffer appear  */
     end_trans_buff=0;                       /*  circular.           */
if(checkbit(sp_status_image, TI_BIT))
     {
     $$if$  INT_MASK1.0
     setbit(int_pend1, TXD_INTERRUPT);  /*     If transmit buffer
     $$end$
     $$ifn$ INT_MASK1.0 && INT_MASK.6
     setbit(int_pend, SERIAL_INT);  /*     If transmit buffer
     $$end$ 
                            was empty, then cause
                            an interrupt to start
                            transmitting.  */
   }
}
     $$end$
     $$if$ INT_MASK1.1 || INT_MASK.6

void receive(void)              /*  serial interrupt routine  */
{
sp_status_image |= sp_stat;       /*  image sp_stat into status_image  */

/*   If the input buffer is full, the last character can be handled
     as desired.  */

 if(end_rec_buff+1==begin_rec_buff || (end_rec_buff==RECEIVE_BUF_SIZE-1 &&
         !begin_rec_buff))
    {
     ;  /*  input overrun code  */
    }
else
    {

/*   The next statement makes the buffer circular by starting over when the
     index reaches the end of the buffer.   */

     if(++end_rec_buff > RECEIVE_BUF_SIZE - 1) end_rec_buff=0;
     receive_buff[end_rec_buff]=sbuf;  /*    place character in
                                              buffer  */
     if(checkbit(sp_status_image, FE_BIT))
          {
          ;    /*  User code for framing error  */
          clrbit(sp_status_image, FE_BIT);
          } 
     if(checkbit(sp_status_image, OE_BIT))
          {
          ;    /*  User code for overrun error  */
          clrbit(sp_status_image, OE_BIT);
          } 
          $$if$ SP_CON.2
     if(checkbit(sp_status_image, RPE_BIT))
          {
          ;    /*  User code for Parity error  */
          clrbit(sp_status_image, RPE_BIT);
          } 
          $$end$
          $$if$ SP_CON.4
     if(checkbit(sp_status_image, RB8_BIT))
          {
          ;    /*  User code for Receiving BIT 8 */
          clrbit(sp_status_image, RB8_BIT);
          } 
          $$end$
    }
 clrbit(sp_status_image,RI_BIT);   /*  clear RI bit in status_image.  */
}

unsigned char getchar()
{
while(begin_rec_buff==end_rec_buff);  /*  remain in loop while there is
                 not a character avaliable. */
if(++begin_rec_buff>RECEIVE_BUF_SIZE - 1)  /*  make buffer appear    */
     begin_rec_buff=0;                     /*  circular.  */
return(receive_buff[begin_rec_buff]);      /*  return the character in
                                     buffer.    */
}
     $$end$
     $$if$  INT_MASK.6
          $$ifn$  INT_MASK1.0-1
/*   The seperate txd and rxd interrupts can more efficiently process
     the interrupts than the generic serial interrupt as this one 
     does.
*/                 

void serial_isr(void)
{
sp_status_image |= sp_stat;       /*  image sp_stat into status_image  */

if(checkbit(sp_status_image, RI_BIT))
     receive();
else if(checkbit(sp_status_image, TI_BIT))
     transmit();
}
          $$end$
          $$if$  INT_MASK1.0-1
/*   The dedicated txd and rxd will service the serial interrupt,
     therefore, this generic serial interrupt routine is not needed
     and should be disabled.
*/
void serial_isr(void)
{
}
          $$end$          
     $$end$          
$$end$

void init_serial()
{

/*
* Serial port configuration:
*   serial mode     = $%4sp_con.0-1$0$1$2$3$
$$if$ sp_con.0
*   even parity     = $%tsp_con.2$enabled$disabled$
$$end$
$$if$ sp_con.1 &! sp_con.0 
*   ninth data bit  = $%tsp_con.4$1$0$
$$end$
$$if$ sp_con.1 && sp_con.0 &! sp_con.2
*   ninth data bit  = $%tsp_con.4$1$0$
$$end$
*   serial receive  = $%tsp_con.3$enabled$disabled$
*   serial transmit = $%tIOC1.5$enabled$disabled$
*/

  _$%tioc1.5$Set$Clr$SFR_bit (ioc1, TXD_ENABLE_BIT);
  _WriteSFR   (sp_con, 0x$$SP_CON$);

/*
* Baud Rate = $$SP_BAUD.0-14$
*/

  _WriteSFR   (baud_rate, 0x@@BAUD_LO@);
  _WriteSFR   (baud_rate, 0x@@BAUD_HI@);

/*
* Interrupts:
*   transmit interrupt = $%tINT_MASK1.0$enabled$disabled$
*   receive interrupt  = $%tINT_MASK1.1$enabled$disabled$
*   serial interrupt   = $%tINT_MASK.6$enabled$disabled$
*/

  _$%tint_mask.6$Set$Clr$SFR_bit (int_mask, SERIAL_INT);
  _$%tint_mask1.0$Set$Clr$SFR_bit (int_mask1, TXD_INTERRUPT);
  _$%tint_mask1.1$Set$Clr$SFR_bit (int_mask1, RXD_INTERRUPT);


$$if$ INT_MASK1.0-1 || INT_MASK.6
     $$if$  INT_MASK1.1 || INT_MASK.6
 end_rec_buff=0;          /* initialize buffer pointers        */
 begin_rec_buff=0;
     $$end$
     $$if$  INT_MASK1.0 || INT_MASK.6
 end_trans_buff=0;
 begin_trans_buff=0;
     $$end$
$$end$
 sp_status_image = 0x20;  /*  Init for initial transmittion  */
}

void main(void)
{
 init_serial();
$$if$ INT_MASK1.0-1 || INT_MASK.6
 enable();
     $$if$ INT_MASK1.1 || INT_MASK.6
/*   The following line will loop until the letter 'Q' is 
     received.   */
 while(getchar() != 'Q');     
     $$end$
     $$if$ INT_MASK1.0 || INT_MASK.6

/*   Example of sending out buffered data.    */
 
 putchar('H');
 putchar('e');
 putchar('l');
 putchar('l');
 putchar('o');
     $$end$   
 while(1);  
$$end$
$$ifn$ INT_MASK1.0-1 &! INT_MASK.6
     $$if$ IOC1.5 && SP_CON.3
 while(1)
     putchar(getchar());  /*  transmitt the character received */
     $$end$
     $$if$ IOC1.5 &! SP_CON.3
 putchar('A');  /*  transmitt a character */
 while(1);
     $$end$
     $$ifn$ IOC1.5 && SP_CON.3
 while(getchar() != 'Q');  /*  wait in loop until byte received
                               is a 'Q' character */
 while(1);
     $$end$
$$end$
}
##80C194 Timer1#
##80C198 Timer1#
##80C196KB Timer1#
##80C196KC Timer1#
##80C196KD Timer1#
##80C194 Timer2#
##80C198 Timer2#
##80C196KB Timer2#
##80C196KC Timer2#
##80C196KD Timer2#
$$ifp$ 80C198 || 80C194 || 80C196KB
#pragma model(kb)
$$end$
$$ifp$ 80C196KC || 80C196KD
#pragma model(kc)
$$end$
#include <80c196kd.h>

#define   T1OVF_DETECTION       2
#define   TOVF_INT_MSK          0
#define   T2OVF_INT_MSK         4
#define   T2CAPTURE_INT_MSK     3
#define   T2OVF_DETECTION       3
#define   T2_CLOCK_INTERNAL     0

void init_timer$$TIMER_NUMBER$(void)
{
/*
* Timer $$TIMER_NUMBER$ configuration:
$$if$ (TIMER_NUMBER == 1)
*   overflow detection         = $%tioc1.2$enabled$disabled$
$$end$
$$if$ (TIMER_NUMBER == 2)
*   overflow detection         = $%tioc1.3$enabled$disabled$
$$if$ ioc3.0
*   clock source               = Internal - Fosc/16
$$end$
$$ifn$ ioc3.0
*   clock source               = External - $%tioc0.7$HSI1 pin$T2CLK pin$
$$end$
*   counting direction         = $%tioc2.1$determined by T2UPDN pin$up$
*   external reset             = $%tioc0.3$enabled$disabled$
    $$if$ ioc0.3
*   reset source               = $%tioc0.5$HSI0 pin$T2RST pin$
    $$end$
*   reset each write           = $%tioc0.1$enabled$disabled$
*   clock speed                = $%tioc2.0$fast increment$normal$ mode
*   overflow boundary          = $%tioc2.5$7fffh/0000h$ffffh/0000h$
$$end$
*/

$$if$ (TIMER_NUMBER == 2)
  $$if$ ioc0.7 || ioc0.5 || ioc0.3 || ioc0.1
  _ReadSFR(tmpreg, ioc0);
    $$ifn$ ioc0.1
  tmpreg &= 0xFD;   /*  clear ioc0.1 since reads as 1 */
    $$end$
  tmpreg |= 0x$%Xioc0 & 0xAA$;
  _WriteSFR(ioc0, tmpreg);
  $$end$
  $$if$ ioc2.5 || ioc2.1 || ioc2.0
  _ReadSFR(tmpreg, ioc2);
  tmpreg &= 0x7F;   /*  clear ioc2.7 since reads as 1 */
  tmpreg |= 0x$%Xioc2 & 0x23$;
  _WriteSFR(ioc2, tmpreg);
  $$end$
  $$if$ ioc3.0
  _SetSFR_bit (ioc3, T2_CLOCK_INTERNAL);
  $$end$
  _$%tioc1.3$Set$Clr$SFR_bit (ioc1, T$$TIMER_NUMBER$OVF_DETECTION);
$$end$
$$if$ (TIMER_NUMBER == 1)
  _$%tioc1.2$Set$Clr$SFR_bit (ioc1, T$$TIMER_NUMBER$OVF_DETECTION);
$$end$

/*
*   timer overflow interrupt   = $%tint_mask.0$enabled$disabled$
$$if$ (TIMER_NUMBER == 2)
*   timer 2 overflow interrupt = $%tint_mask1.4$enabled$disabled$
$$end$
*/

$$if$ (TIMER_NUMBER == 2)
  _$%tint_mask1.4$Set$Clr$SFR_bit (int_mask1, T2OVF_INT_MSK);
  _$%tint_mask1.3$Set$Clr$SFR_bit (int_mask1, T2CAPTURE_INT_MSK);
$$end$
$$if$ (TIMER_NUMBER == 1)
  _$%tint_mask.0$Set$Clr$SFR_bit (int_mask, TOVF_INT_MSK);
$$end$
}
void main(void)
{
  init_timer$$TIMER_NUMBER$();
  while(1);
}  
##80C194 HSI0#
##80C198 HSI0#
##80C196KB HSI0#
##80C196KC HSI0#
##80C196KD HSI0#
##80C194 HSI1#
##80C198 HSI1#
##80C196KB HSI1#
##80C196KC HSI1#
##80C196KD HSI1#
##80C194 HSI2#
##80C198 HSI2#
##80C196KB HSI2#
##80C196KC HSI2#
##80C196KD HSI2#
##80C194 HSI3#
##80C198 HSI3#
##80C196KB HSI3#
##80C196KC HSI3#
##80C196KD HSI3#
$$ifp$ 80C198 || 80C194 || 80C196KB
#pragma model(kb)
$$end$
$$ifp$ 80C196KC || 80C196KD
#pragma model(kc)
$$end$
#include <80c196kd.h>

#define   HSI0_PIN_ENABLE      0
#define   HSI0_EXT_INT         0x10
#define   HSI1_PIN_ENABLE      2
#define   HSI2_PIN_ENABLE      4
#define   HSI3_PIN_ENABLE      6
#define   HSI_DATA_AVAIL_INT   0x4
#define   SELECT_INT_VECTOR    7
#define   HSI_FIFO_FULL_INTMSK 0x40
#define   HSI_FIFO_4_INT       0x4

void init_hsi$$HSI_NUMBER$(void)
{
/*
* HSI $$HSI_NUMBER$ module configuration:
$$if$  (HSI_NUMBER == 0)
*   input capture mode = $%4hsi_mode.0-1$eight positive transitions$each positive transition$each negative transition$every transistion$
*   hsi 0 external pin = $%tioc0.0$enabled$disabled$
*/
  _$%thsi_mode.1$Set$Clr$SFR_bit (hsi_mode, 1);
  _$%thsi_mode.0$Set$Clr$SFR_bit (hsi_mode, 0);
   
  _$%tioc0.0$Set$Clr$SFR_bit (ioc0, HSI$$HSI_NUMBER$_PIN_ENABLE);
$$end$
$$if$  (HSI_NUMBER == 1)
*   input capture mode = $%4hsi_mode.2-3$eight positive transitions$each positive transition$each negative transition$every transistion$
*/
  _$%thsi_mode.3$Set$Clr$SFR_bit (hsi_mode, 3);
  _$%thsi_mode.2$Set$Clr$SFR_bit (hsi_mode, 2);

  _$%tioc0.2$Set$Clr$SFR_bit (ioc0, HSI$$HSI_NUMBER$_PIN_ENABLE);
$$end$
$$if$  (HSI_NUMBER == 2)
*   input capture mode = $%4hsi_mode.4-5$eight positive transitions$each positive transition$each negative transition$every transistion$
*/
  _$%thsi_mode.5$Set$Clr$SFR_bit (hsi_mode, 5);
  _$%thsi_mode.4$Set$Clr$SFR_bit (hsi_mode, 4);

  _$%tioc0.4$Set$Clr$SFR_bit (ioc0, HSI$$HSI_NUMBER$_PIN_ENABLE);
$$end$
$$if$  (HSI_NUMBER == 3)
*   input capture mode = $%4hsi_mode.6-7$eight positive transitions$each positive transition$each negative transition$every transistion$
*/
  _$%thsi_mode.7$Set$Clr$SFR_bit (hsi_mode, 7);
  _$%thsi_mode.6$Set$Clr$SFR_bit (hsi_mode, 6);

  _$%tioc0.6$Set$Clr$SFR_bit (ioc0, HSI$$HSI_NUMBER$_PIN_ENABLE);
$$end$

/*
* Interrupts
*   sixth fifo int vector  = $%tioc1.7$hsi fifo full$hsi data available$
$$if$ (HSI_NUMBER == 0)
*   hsi 0 pin interrupt    = $%tint_mask.4$enabled$disabled$
$$end$
*   hsi data available int = $%tint_mask.2$enabled$disabled$
*   hsi fifo full int      = $%tint_mask1.6$enabled$disabled$  
*   hsi fifo 4 int         = $%tint_mask1.2$enabled$disabled$
*/

  _$%tioc1.7$Set$Clr$SFR_bit (ioc1, SELECT_INT_VECTOR);
$$if$ (hsi_number != 0)
  _$%tint_mask.2$Set$Clr$SFR_bit (int_mask, 2);  /* hsi data available */
$$end$
$$if$ (hsi_number == 0)
  $$if$ int_mask.4 && int_mask.2
  _OrSFR  (int_mask, (HSI0_EXT_INT + HSI_DATA_AVAIL_INT));
  $$end$
  $$ifn$ int_mask.4 &! int_mask.2
  _AndSFR (int_mask, ~(HSI0_EXT_INT + HSI_DATA_AVAIL_INT));
  $$end$
  $$if$ int_mask.4 &! int_mask.2
  _$%tint_mask.2$Set$Clr$SFR_bit (int_mask, 2);  /* hsi data available */
  _$%tint_mask.4$Set$Clr$SFR_bit (int_mask, 4);  /* hsi0 external interrupt */
  $$end$
  $$ifn$ int_mask.4 && int_mask.2
  _$%tint_mask.2$Set$Clr$SFR_bit (int_mask, 2);  /* hsi data available */
  _$%tint_mask.4$Set$Clr$SFR_bit (int_mask, 4);  /* hsi0 external interrupt */
  $$end$
$$end$
$$if$ int_mask1.6 && int_mask1.2
  _OrSFR  (int_mask1, (HSI_FIFO_FULL_INTMSK + HSI_FIFO_4_INT));
$$end$
$$ifn$ int_mask1.6 &! int_mask1.2
  _AndSFR (int_mask1, ~(HSI_FIFO_FULL_INTMSK + HSI_FIFO_4_INT));
$$end$
$$if$ int_mask1.6 ^^ int_mask1.2
  _$%tint_mask1.2$Set$Clr$SFR_bit (int_mask1, 2);  /* hsi 4th fifo entry */
  _$%tint_mask1.6$Set$Clr$SFR_bit (int_mask1, 6);  /* hsi fifo full */
$$end$
}
void main(void)
{
  init_hsi$$HSI_NUMBER$();
  while(1);
}
##80C194 HSO0_INIT#
##80C198 HSO0_INIT#
##80C194 HSO1_INIT#
##80C198 HSO1_INIT#
##80C194 HSO2_INIT#
##80C198 HSO2_INIT#
##80C194 HSO3_INIT#
##80C198 HSO3_INIT#
##80C194 HSO4_INIT#
##80C198 HSO4_INIT#
##80C194 HSO5_INIT#
##80C198 HSO5_INIT#
##80C196KB HSO0_INIT#
##80C196KC HSO0_INIT#
##80C196KD HSO0_INIT#
##80C196KB HSO1_INIT#
##80C196KC HSO1_INIT#
##80C196KD HSO1_INIT#
##80C196KB HSO2_INIT#
##80C196KC HSO2_INIT#
##80C196KD HSO2_INIT#
##80C196KB HSO3_INIT#
##80C196KC HSO3_INIT#
##80C196KD HSO3_INIT#
##80C196KB HSO4_INIT#
##80C196KC HSO4_INIT#
##80C196KD HSO4_INIT#
##80C196KB HSO5_INIT#
##80C196KC HSO5_INIT#
##80C196KD HSO5_INIT#
$$ifp$ 80C198 || 80C194 || 80C196KB
#pragma model(kb)
$$end$
$$ifp$ 80C196KC || 80C196KD
#pragma model(kc)
$$end$
#include <80c196kd.h>

$$if$ (HSO_NUMBER == 4)
#define   HSO4_PIN_ENABLE   4
$$end$
$$if$ (HSO_NUMBER == 5)
#define   HSO5_PIN_ENABLE   6
$$end$
#define   CAM_LOCK_BIT      6
#define   CLEAR_CAM_BIT     7
#define   HSO_INT           5
#define   SW_TIMER_INT      3

void init_hso$$HSO_NUMBER$(void)
{
/*
* HSO $$HSO_NUMBER$ module initialization:
$$if$ (HSO_NUMBER == 4)
*   HSO4 output  = $%tioc1.4$enabled$disabled$
$$end$
$$if$ (HSO_NUMBER == 5)
*   HSO5 output  = $%tioc1.6$enabled$disabled$
$$end$
*   cam locking  = $%tioc2.6$enabled$disabled$
*   clear cam    = $%tioc2.7$yes$no$
*/

$$if$ (HSO_NUMBER == 4) || (HSO_NUMBER == 5)
  _$%tioc1.4$Set$Clr$SFR_bit (ioc1, HSO$$HSO_NUMBER$_PIN_ENABLE);
$$end$
  _$%tioc2.6$Set$Clr$SFR_bit (ioc2, CAM_LOCK_BIT);
  _$%tioc2.7$Set$Clr$SFR_bit (ioc2, CLEAR_CAM_BIT);

/*
* Interrupts:
*   HSO interrupt      = $%tint_mask.3$enabled$disabled$
*   software timer int = $%tint_mask.5$enabled$disabled$
*/

  _$%tint_mask.3$Set$Clr$SFR_bit (int_mask, HSO_INT);
  _$%tint_mask.5$Set$Clr$SFR_bit (int_mask, SW_TIMER_INT);
}
void main(void)
{
  init_hso$$HSO_NUMBER$();