📄 bishe.lss
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cli();
106: f8 94 cli
//硬件自动清除INTF0标志位
PC_COMMAND=ZLG7289_Key() ;
108: 0e 94 0f 01 call 0x21e ; 0x21e <ZLG7289_Key>
10c: 80 93 00 01 sts 0x0100, r24
Delay_Nms(10);
110: 8a e0 ldi r24, 0x0A ; 10
112: 90 e0 ldi r25, 0x00 ; 0
114: 0e 94 bc 00 call 0x178 ; 0x178 <Delay_Nms>
PORTB=PC_COMMAND ;
118: 80 91 00 01 lds r24, 0x0100
11c: 88 bb out 0x18, r24 ; 24
put_c(PC_COMMAND) ;
11e: 80 91 00 01 lds r24, 0x0100
122: 0e 94 61 00 call 0xc2 ; 0xc2 <put_c>
put_c(0x01) ;
126: 81 e0 ldi r24, 0x01 ; 1
128: 0e 94 61 00 call 0xc2 ; 0xc2 <put_c>
Delay_Nms(100);
12c: 84 e6 ldi r24, 0x64 ; 100
12e: 90 e0 ldi r25, 0x00 ; 0
130: 0e 94 bc 00 call 0x178 ; 0x178 <Delay_Nms>
134: ff 91 pop r31
136: ef 91 pop r30
138: bf 91 pop r27
13a: af 91 pop r26
13c: 9f 91 pop r25
13e: 8f 91 pop r24
140: 7f 91 pop r23
142: 6f 91 pop r22
144: 5f 91 pop r21
146: 4f 91 pop r20
148: 3f 91 pop r19
14a: 2f 91 pop r18
14c: 0f 90 pop r0
14e: 0f be out 0x3f, r0 ; 63
150: 0f 90 pop r0
152: 1f 90 pop r1
154: 18 95 reti
00000156 <main>:
156: f8 94 cli
158: 87 b3 in r24, 0x17 ; 23
15a: 83 60 ori r24, 0x03 ; 3
15c: 87 bb out 0x17, r24 ; 23
15e: d0 9a sbi 0x1a, 0 ; 26
160: 0e 94 28 01 call 0x250 ; 0x250 <ZLG7289_Init>
164: 80 e8 ldi r24, 0x80 ; 128
166: 8b bf out 0x3b, r24 ; 59
168: 15 be out 0x35, r1 ; 53
16a: 0e 94 57 00 call 0xae ; 0xae <uart0_init>
16e: 78 94 sei
170: c0 9a sbi 0x18, 0 ; 24
172: c1 9a sbi 0x18, 1 ; 24
174: d8 98 cbi 0x1b, 0 ; 27
176: ff cf rjmp .-2 ; 0x176 <main+0x20>
00000178 <Delay_Nms>:
#include "zlg7289.h"
//------------------------------------------------------------
void Delay_Nms(unsigned int ms)
{
178: 9c 01 movw r18, r24
17a: e3 e3 ldi r30, 0x33 ; 51
17c: f7 e0 ldi r31, 0x07 ; 7
17e: 03 c0 rjmp .+6 ; 0x186 <Delay_Nms+0xe>
*/
void
_delay_loop_2(uint16_t __count)
{
__asm__ volatile (
180: cf 01 movw r24, r30
182: 01 97 sbiw r24, 0x01 ; 1
184: f1 f7 brne .-4 ; 0x182 <Delay_Nms+0xa>
while (ms--)
186: 21 50 subi r18, 0x01 ; 1
188: 30 40 sbci r19, 0x00 ; 0
18a: 8f ef ldi r24, 0xFF ; 255
18c: 2f 3f cpi r18, 0xFF ; 255
18e: 38 07 cpc r19, r24
190: b9 f7 brne .-18 ; 0x180 <Delay_Nms+0x8>
192: 08 95 ret
00000194 <Delay_Nus>:
_delay_ms(1);
}
void Delay_Nus(unsigned int us)
{
194: 9c 01 movw r18, r24
196: 92 e0 ldi r25, 0x02 ; 2
198: 03 c0 rjmp .+6 ; 0x1a0 <Delay_Nus+0xc>
*/
void
_delay_loop_1(uint8_t __count)
{
__asm__ volatile (
19a: 89 2f mov r24, r25
19c: 8a 95 dec r24
19e: f1 f7 brne .-4 ; 0x19c <Delay_Nus+0x8>
while (us--)
1a0: 21 50 subi r18, 0x01 ; 1
1a2: 30 40 sbci r19, 0x00 ; 0
1a4: 8f ef ldi r24, 0xFF ; 255
1a6: 2f 3f cpi r18, 0xFF ; 255
1a8: 38 07 cpc r19, r24
1aa: b9 f7 brne .-18 ; 0x19a <Delay_Nus+0x6>
1ac: 08 95 ret
000001ae <ZLG7289_SPI_Write>:
_delay_us(1);
}
//-------------------------------------------------------------
void ZLG7289_SPI_Write(uchar dat)
{
1ae: 0f 93 push r16
1b0: 1f 93 push r17
1b2: 18 2f mov r17, r24
unsigned char i;
ZLG7289_DATA_PORT_H ;
1b4: 94 9a sbi 0x12, 4 ; 18
ZLG7289_DATA_DDR_OUT ;
1b6: 8c 9a sbi 0x11, 4 ; 17
1b8: 00 e0 ldi r16, 0x00 ; 0
for (i=0;i<8;i++)
{
ZLG7289_CLK_PORT_L ;
1ba: 95 98 cbi 0x12, 5 ; 18
Delay_Nus(5);
1bc: 85 e0 ldi r24, 0x05 ; 5
1be: 90 e0 ldi r25, 0x00 ; 0
1c0: 0e 94 ca 00 call 0x194 ; 0x194 <Delay_Nus>
if(dat & 0x80)
1c4: 17 ff sbrs r17, 7
1c6: 02 c0 rjmp .+4 ; 0x1cc <ZLG7289_SPI_Write+0x1e>
ZLG7289_DATA_PORT_H ;
1c8: 94 9a sbi 0x12, 4 ; 18
1ca: 01 c0 rjmp .+2 ; 0x1ce <ZLG7289_SPI_Write+0x20>
else
ZLG7289_DATA_PORT_L ;
1cc: 94 98 cbi 0x12, 4 ; 18
ZLG7289_CLK_PORT_H ;
1ce: 95 9a sbi 0x12, 5 ; 18
Delay_Nus(5);
1d0: 85 e0 ldi r24, 0x05 ; 5
1d2: 90 e0 ldi r25, 0x00 ; 0
1d4: 0e 94 ca 00 call 0x194 ; 0x194 <Delay_Nus>
1d8: 0f 5f subi r16, 0xFF ; 255
1da: 08 30 cpi r16, 0x08 ; 8
1dc: 11 f0 breq .+4 ; 0x1e2 <ZLG7289_SPI_Write+0x34>
dat <<= 1;
1de: 11 0f add r17, r17
1e0: ec cf rjmp .-40 ; 0x1ba <ZLG7289_SPI_Write+0xc>
1e2: 1f 91 pop r17
1e4: 0f 91 pop r16
1e6: 08 95 ret
000001e8 <ZLG7289_SPI_Read>:
}
}
////////////////////////////////////////////////////
/*
函数:ZLG7289_SPI_Read()
功能:从SPI 总线读取1 个字节的数据
返回:
读取到的数据
*/
uchar ZLG7289_SPI_Read(void)
{
1e8: 0f 93 push r16
1ea: 1f 93 push r17
unsigned char i;
uchar dat=0 ;
ZLG7289_DATA_PORT_H ;
1ec: 94 9a sbi 0x12, 4 ; 18
ZLG7289_DATA_DDR_IN ;//需要有一个上升沿作为输入输出的转变
1ee: 8c 98 cbi 0x11, 4 ; 17
1f0: 00 e0 ldi r16, 0x00 ; 0
1f2: 10 e0 ldi r17, 0x00 ; 0
for (i=0;i<9;i++)
{
ZLG7289_CLK_PORT_H;
1f4: 95 9a sbi 0x12, 5 ; 18
Delay_Nus(5);
1f6: 85 e0 ldi r24, 0x05 ; 5
1f8: 90 e0 ldi r25, 0x00 ; 0
1fa: 0e 94 ca 00 call 0x194 ; 0x194 <Delay_Nus>
dat = dat<<1;
1fe: 11 0f add r17, r17
if(ZLG7289_DATA_PINA)dat++;
200: 84 99 sbic 0x10, 4 ; 16
202: 1f 5f subi r17, 0xFF ; 255
ZLG7289_CLK_PORT_L;
204: 95 98 cbi 0x12, 5 ; 18
Delay_Nus(5);
206: 85 e0 ldi r24, 0x05 ; 5
208: 90 e0 ldi r25, 0x00 ; 0
20a: 0e 94 ca 00 call 0x194 ; 0x194 <Delay_Nus>
20e: 0f 5f subi r16, 0xFF ; 255
210: 09 30 cpi r16, 0x09 ; 9
212: 81 f7 brne .-32 ; 0x1f4 <ZLG7289_SPI_Read+0xc>
}
return(dat);
}
214: 81 2f mov r24, r17
216: 99 27 eor r25, r25
218: 1f 91 pop r17
21a: 0f 91 pop r16
21c: 08 95 ret
0000021e <ZLG7289_Key>:
/*
功能:执行ZLG7289 键盘命令
返回:
返回读到的按键值:0~63
如果返回0xFF 则表示没有键按下
*/
uchar ZLG7289_Key(void)
{
21e: 1f 93 push r17
uchar key=0;
ZLG7289_CS_PORT_L ;
220: 96 98 cbi 0x12, 6 ; 18
Delay_Nus(25);
222: 89 e1 ldi r24, 0x19 ; 25
224: 90 e0 ldi r25, 0x00 ; 0
226: 0e 94 ca 00 call 0x194 ; 0x194 <Delay_Nus>
ZLG7289_SPI_Write(0x15);
22a: 85 e1 ldi r24, 0x15 ; 21
22c: 0e 94 d7 00 call 0x1ae ; 0x1ae <ZLG7289_SPI_Write>
Delay_Nus(25);
230: 89 e1 ldi r24, 0x19 ; 25
232: 90 e0 ldi r25, 0x00 ; 0
234: 0e 94 ca 00 call 0x194 ; 0x194 <Delay_Nus>
key = ZLG7289_SPI_Read();
238: 0e 94 f4 00 call 0x1e8 ; 0x1e8 <ZLG7289_SPI_Read>
23c: 18 2f mov r17, r24
ZLG7289_CS_PORT_H ;
23e: 96 9a sbi 0x12, 6 ; 18
Delay_Nus(25);
240: 89 e1 ldi r24, 0x19 ; 25
242: 90 e0 ldi r25, 0x00 ; 0
244: 0e 94 ca 00 call 0x194 ; 0x194 <Delay_Nus>
return key;
}
248: 81 2f mov r24, r17
24a: 99 27 eor r25, r25
24c: 1f 91 pop r17
24e: 08 95 ret
00000250 <ZLG7289_Init>:
/*
函数:ZLG7289_Init()
功能:ZLG7289 初始化
参数:
t:SPI 总线的延时值设置,取值1-40(超出范围可能导致错误)
说明:
t的取值可以参照以下公式:t >= 5 * f1 / f2,其中f1 表示80C51 的
晶振频率,f2 表示ZLG7289 的晶振频率
*/
void ZLG7289_Init(void)
{
250: 8e 9a sbi 0x11, 6 ; 17
ZLG7289_CS_DDR_OUT ;
ZLG7289_CLK_DDR_OUT ;
252: 8d 9a sbi 0x11, 5 ; 17
ZLG7289_DATA_DDR_OUT ;
254: 8c 9a sbi 0x11, 4 ; 17
ZLG7289_KEY_DDR_IN ;
256: 8b 98 cbi 0x11, 3 ; 17
ZLG7289_CS_PORT_H ;
258: 96 9a sbi 0x12, 6 ; 18
ZLG7289_KEY_PORT_R ;
25a: 93 9a sbi 0x12, 3 ; 18
ZLG7289_CLK_PORT_L ;
25c: 95 98 cbi 0x12, 5 ; 18
ZLG7289_DATA_PORT_H ;
25e: 94 9a sbi 0x12, 4 ; 18
Delay_Nus(25);
260: 89 e1 ldi r24, 0x19 ; 25
262: 90 e0 ldi r25, 0x00 ; 0
264: 0e 94 ca 00 call 0x194 ; 0x194 <Delay_Nus>
268: 08 95 ret
0000026a <_exit>:
26a: ff cf rjmp .-2 ; 0x26a <_exit>
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