base_timer.asm

富士通芯片 32位MCU各项机能应用实例的C语言例程

//					FR Family SOFTUNE cpcom V65L04
	.program	"base_timer"
	.library	"lib911.lib"
	._LANGUAGE	C_FR20, N, U, F
	._FILE	"D:\kongou\MAE\soft\sample_soft\200803_Sample\MB91635\BaseTimer\base_timer.c", 0
	._FILE	"D:\kongou\MAE\soft\sample_soft\200803_Sample\MB91635\BaseTimer\base_timer.h", 1
	._FILE	"..\IOH_MB91635_V01L02\mb91635.h", 2
	._FILE	"..\IOH_MB91635_V01L02\_fr.h", 3
	._BTYPE	0x80000001, 1
	._BTYPE	0x80000002, 1
	._BTYPE	0x80000003, 2
	._BTYPE	0x80000004, 2
	._BTYPE	0x80000005, 4
	._BTYPE	0x80000006, 4
	._BTYPE	0x80000007, 4
	._BTYPE	0x80000008, 4
	._BTYPE	0x80000009, 1
	._BTYPE	0x8000000a, 2
	._BTYPE	0x8000000b, 4
	._BTYPE	0x8000000c, 8
	._BTYPE	0x8000000d, 8
	._BTYPE	0x8000000e, 1
	._BTYPE	0x8000000f, 0
	._BTYPE	0x80000010, 8
	._BTYPE	0x80000011, 8
	.global	_IO_PDR0
	.global	_IO_PDR1
	.global	_IO_PDR2
	.global	_IO_PDR3
	.global	_IO_PDR4
	.global	_IO_PDR5
	.global	_IO_PDR6
	.global	_IO_PDR7
	.global	_IO_PDR8
	.global	_IO_PDR9
	.global	_IO_PDRA
	.global	_IO_PDRB
	.global	_IO_PDRC
	.global	_IO_PDRG
	.global	_IO_PDRH
	.global	_IO_PDRI
	.global	_IO_PDRK
	.global	_IO_WDTCR0
	.global	_IO_WDTCPR0
	.global	_IO_EIRR0
	.global	_IO_ENIR0
	.global	_IO_ELVR0
	.global	_IO_DICR
	.global	_IO_TMRLRA0
	.global	_IO_TMR0
	.global	_IO_TMCSR0
	.global	_IO_TMRLRA1
	.global	_IO_TMR1
	.global	_IO_TMCSR1
	.global	_IO_TMRLRA2
	.global	_IO_TMR2
	.global	_IO_TMCSR2
	.global	_IO_UART0
	.global	_IO_UART1
	.global	_IO_UART2
	.global	_IO_UART3
	.global	_IO_UART4
	.global	_IO_UART5
	.global	_IO_UART6
	.global	_IO_UART7
	.global	_IO_UART0_I2C0
	.global	_IO_RDRM0123
	.global	_IO_RDRM4567
	.global	_IO_SSEL0123
	.global	_IO_SSEL4567
	.global	_IO_UART8
	.global	_IO_UART9
	.global	_IO_UART10
	.global	_IO_UART11
	.global	_IO_EIRR1
	.global	_IO_ENIR1
	.global	_IO_ELVR1
	.global	_IO_EIRR2
	.global	_IO_ENIR2
	.global	_IO_ELVR2
	.global	_IO_EIRR3
	.global	_IO_ENIR3
	.global	_IO_ELVR3
	.global	_IO_AD0
	.global	_IO_BT0
	.global	_IO_BT1
	.global	_IO_BT2
	.global	_IO_BT3
	.global	_IO_BTSEL0123
	.global	_IO_DAC
	.global	_IO_AD1
	.global	_IO_ADCHE
	.global	_IO_IRPR
	.global	_IO_UD0
	.global	_IO_UD1
	.global	_IO_UD2
	.global	_IO_UD3
	.global	_IO_CPCLR0
	.global	_IO_TCDT0
	.global	_IO_TCCSH0
	.global	_IO_TCCSL0
	.global	_IO_IPCP0
	.global	_IO_IPCP1
	.global	_IO_IPCP2
	.global	_IO_IPCP3
	.global	_IO_ICS01
	.global	_IO_ICS23
	.global	_IO_IPCP4
	.global	_IO_IPCP5
	.global	_IO_IPCP6
	.global	_IO_IPCP7
	.global	_IO_ICS45
	.global	_IO_ICS67
	.global	_IO_OCCP0
	.global	_IO_OCCP1
	.global	_IO_OCCP2
	.global	_IO_OCCP3
	.global	_IO_OCS01
	.global	_IO_OCS23
	.global	_IO_OCCP4
	.global	_IO_OCCP5
	.global	_IO_OCCP6
	.global	_IO_OCCP7
	.global	_IO_OCS45
	.global	_IO_OCS67
	.global	_IO_FRTSEL
	.global	_IO_CPCLR1
	.global	_IO_TCDT1
	.global	_IO_TCCSH1
	.global	_IO_TCCSL1
	.global	_IO_FCTLR
	.global	_IO_FSTR
	.global	_IO_WREN
	.global	_IO_WRAR00
	.global	_IO_WRDR00
	.global	_IO_WRAR01
	.global	_IO_WRDR01
	.global	_IO_WRAR02
	.global	_IO_WRDR02
	.global	_IO_WRAR03
	.global	_IO_WRDR03
	.global	_IO_WRAR04
	.global	_IO_WRDR04
	.global	_IO_WRAR05
	.global	_IO_WRDR05
	.global	_IO_WRAR06
	.global	_IO_WRDR06
	.global	_IO_WRAR07
	.global	_IO_WRDR07
	.global	_IO_WRAR08
	.global	_IO_WRDR08
	.global	_IO_WRAR09
	.global	_IO_WRDR09
	.global	_IO_WRAR10
	.global	_IO_WRDR10
	.global	_IO_WRAR11
	.global	_IO_WRDR11
	.global	_IO_WRAR12
	.global	_IO_WRDR12
	.global	_IO_WRAR13
	.global	_IO_WRDR13
	.global	_IO_WRAR14
	.global	_IO_WRDR14
	.global	_IO_WRAR15
	.global	_IO_WRDR15
	.global	_IO_PORT1
	.global	_IO_ICR
	.global	_IO_CLK
	.global	_IO_IORR
	.global	_IO_PORT2
	.global	_IO_PORT3
	.global	_IO_ICSEL
	.global	_IO_CLKG
	.global	_IO_WTC
	.global	_IO_EBUS
	.global	_IO_DMAC
	.global	_IO_DNMIR
	.global	_IO_DILVR
	.global	_IO_DMACR
	.global	_IO_BT4
	.global	_IO_BT5
	.global	_IO_BT6
	.global	_IO_BT7
	.global	_IO_BTSEL4567
	.global	_IO_BT8
	.global	_IO_BT9
	.global	_IO_BTA
	.global	_IO_BTB
	.global	_IO_BTSEL89AB
	.global	_IO_BTC
	.global	_IO_BTD
	.global	_IO_BTE
	.global	_IO_BTF
	.global	_IO_BTSELCDEF
	.global	_IO_BTSSSR
	.section	DATA, DATA, align=4
	.global	_pwm_duty
	.align	4
_pwm_duty:
	.res.b	4
	.global	_timer_ovf_cnt
_timer_ovf_cnt:
	.res.b	4
	.global	_timer_cnt
_timer_cnt:
	.res.b	4
	.global	_pwm_duty_dir
	.align	1
_pwm_duty_dir:
	.res.b	1
	.global	_timer_mode
_timer_mode:
	.res.b	1
	.section	CODE, CODE, align=2
	.global	_BaseTimer_init
	._SYMBOL	"BaseTimer_init", F, 0x8000000f, E, "_BaseTimer_init", F
	._FPARAM	S, 1, F
	._SYMBOL	"mode", P, 0x80000002, A, 11
	._FPARAM	E
	._CONFIG	S, F, 1
	._LINE	0, 27
_BaseTimer_init:
L_20:
	ST	R4,@-SP
	ST	RP,@-SP
	ENTER	#4
;-------end_of_no_optimize_block
	._FUNCTION	"fp", "fp", 40
	._CONFIG	S, B
L_21:				// Pred: L_20
	._LINE	0, 29
	LDI:32	#_IO_ICR+30,R0
	LDI	#16,R3
	STB	R3,@R0
	._LINE	0, 32
	LDI:32	#_IO_PORT3+4,R1
	LDI	#0,R0
	STB	R0,@R1	; _IO_PORT3
	._LINE	0, 33
	LDI:32	#_IO_PORT3+6,R1
	STB	R0,@R1	; _IO_PORT3
	._LINE	0, 34
	LDI:32	#_IO_PORT3+20,R1
	LDI	#2,R2
	STB	R2,@R1	; _IO_PORT3
	._LINE	0, 38
	LDI:32	#_IO_PORT2,R2
	LDI	#1,R1
	STB	R1,@R2	; _IO_PORT2
	._LINE	0, 39
	LDI:32	#_IO_PORT2+1,R2
	STB	R0,@R2	; _IO_PORT2
	._LINE	0, 40
	LDI:32	#_IO_PORT2+2,R2
	STB	R0,@R2	; _IO_PORT2
	._LINE	0, 44
	LDI:32	#_IO_PORT1,R2
	STB	R1,@R2	; _IO_PORT1
	._LINE	0, 45
	LDI:32	#_IO_PORT1+1,R2
	LDI	#255,R1
	STB	R1,@R2	; _IO_PORT1
	._LINE	0, 46
	LDI:32	#_IO_PORT1+2,R2
	STB	R1,@R2	; _IO_PORT1
	._LINE	0, 50
	LDI:32	#_IO_BTSEL0123,R1
	STB	R0,@R1	; _IO_BTSEL0123
	._LINE	0, 51
	LDI:32	#_IO_BTSEL4567,R1
	STB	R0,@R1	; _IO_BTSEL4567
	._LINE	0, 52
	LDI:32	#_IO_BTSEL89AB,R1
	STB	R0,@R1	; _IO_BTSEL89AB
	._LINE	0, 53
	LDI:32	#_IO_BTSELCDEF,R1
	STB	R0,@R1	; _IO_BTSELCDEF
	._LINE	0, 57
	LDI:32	#_IO_BT0+2,R1
	LDI	#0,R2
	STH	R2,@R1	; _IO_BT0
	._LINE	0, 58
	LDUB	@(FP,11),R4	; _mode
	LDI:32	#_timer_mode,R2
	STB	R4,@R2	; _timer_mode
	._LINE	0, 59
	LDI:32	#_timer_cnt,R2
	LDI	#0,R12
	ST	R12,@R2	; _timer_cnt
	._LINE	0, 60
	LDI:32	#_timer_ovf_cnt,R2
	ST	R12,@R2	; _timer_ovf_cnt
	._LINE	0, 61
	LDI:32	#_pwm_duty,R4
	LDI	#187,R12
	ST	R12,@R4	; _pwm_duty
	._LINE	0, 62
	LDI:32	#_pwm_duty_dir,R2
	STB	R0,@R2	; _pwm_duty_dir
	._LINE	0, 64
	LDUB	@(FP,11),R2	; _mode
	ADDN	#-1,R2
	CMP	#4,R2
	BNC32	L_28,R12
L_87:				// Pred: L_21
	._LINE	0, 64
	LDI:32	#L_50091,R13
	LSL	#2,R2
	LD	@(R13,R2),R12
;-------table_branch
	JMP	@R12
	.section	CONST, CONST, align=4
	.align	4
L_50091:
	.word	L_23
	.word	L_24
	.word	L_25
	.word	L_26
	.section	CODE, CODE, align=2
	.align	2
L_23:				// Pred: L_87
	._LINE	0, 66
	LDI	#4114,R0
	STH	R0,@R1	; _IO_BT0
	._LINE	0, 67
	LDI:32	#_IO_BT0+5,R0
	STB	R3,@R0	; _IO_BT0
	._LINE	0, 68
	LDI:32	#_IO_BT0+8,R0
	LDI	#37499,R1
	STH	R1,@R0	; _IO_BT0
	._LINE	0, 69
	LD	@R4,R1	; _pwm_duty
	LDI:32	#_IO_BT0+10,R0
	STH	R1,@R0	; _IO_BT0
	BRA32	L_28,R12
L_24:				// Pred: L_87
	._LINE	0, 73
	LDI	#8226,R2
	STH	R2,@R1	; _IO_BT0
	._LINE	0, 74
	LDI:32	#_IO_BT0+5,R1
	STB	R0,@R1	; _IO_BT0
	._LINE	0, 75
	LDI:32	#_IO_BT0+8,R1
	LDI	#2999,R0
	STH	R0,@R1	; _IO_BT0
	._LINE	0, 76
	LDI:32	#_IO_BT0+10,R1
	STH	R0,@R1	; _IO_BT0
	BRA32	L_28,R12
L_25:				// Pred: L_87
	._LINE	0, 80
	LDI	#16434,R0
	STH	R0,@R1	; _IO_BT0
	._LINE	0, 81
	LDI:32	#_IO_BT0+5,R0
	STB	R3,@R0	; _IO_BT0
	._LINE	0, 82
	LDI:32	#_IO_BT0+8,R0
	LDI	#5999,R1
	STH	R1,@R0	; _IO_BT0
	BRA32	L_28,R12
L_26:				// Pred: L_87
	._LINE	0, 86
	LDI	#4160,R0
	STH	R0,@R1	; _IO_BT0
	._LINE	0, 87
	LDI:32	#_IO_BT0+5,R0
	LDI	#80,R1
;-------volatile_access
	STB	R1,@R0	; _IO_BT0
L_28:				// Pred: L_26 L_25 L_24 L_23
				//	 L_87 L_21
	._LINE	0, 92
	._CONFIG	E
	._LINE	0, 94
	LEAVE
	LD	@SP+,RP
	ADDSP	#4
	RET
	._CONFIG	E
	.global	_BaseTimer_start
	._SYMBOL	"BaseTimer_start", F, 0x8000000f, E, "_BaseTimer_start", F
	._FPARAM	S, 0, F
	._FPARAM	E
	._CONFIG	S, F, 1
	._LINE	0, 101
_BaseTimer_start:
L_29:
	ST	RP,@-SP
	ENTER	#4
;-------end_of_no_optimize_block
	._FUNCTION	"fp", "fp", 16
	._CONFIG	S, B
L_30:				// Pred: L_29
	._LINE	0, 103
	LDI:32	#_timer_mode,R12
	LDUB	@R12,R0	; _timer_mode
	ADDN	#-1,R0
	CMP	#4,R0
	BNC32	L_37,R12
L_88:				// Pred: L_30
	._LINE	0, 103
	LDI:32	#L_50092,R13
	LSL	#2,R0
	LD	@(R13,R0),R12
;-------table_branch
	JMP	@R12
	.section	CONST, CONST, align=4
	.align	4
L_50092:
	.word	L_32
	.word	L_33
	.word	L_34
	.word	L_35
	.section	CODE, CODE, align=2
	.align	2
L_32:				// Pred: L_88
	._LINE	0, 105
	LDI:32	#_IO_BT0+3,R12
	BOR	#0x1,@R12
	BRA32	L_37,R12
L_33:				// Pred: L_88
	._LINE	0, 109
	LDI:32	#_IO_BT0+3,R12
	BOR	#0x1,@R12
	BRA32	L_37,R12
L_34:				// Pred: L_88
	._LINE	0, 113
	LDI:32	#_IO_BT0+3,R12
	BOR	#0x1,@R12
	BRA32	L_37,R12
L_35:				// Pred: L_88
	._LINE	0, 117
	LDI:32	#_IO_BT0+3,R12
;-------volatile_access
	BOR	#0x2,@R12
L_37:				// Pred: L_35 L_34 L_33 L_32
				//	 L_88 L_30
	._LINE	0, 122
	._CONFIG	E
	._LINE	0, 123
	LEAVE
	LD	@SP+,RP
	RET
	._CONFIG	E
	.global	_BaseTimer_int0
	._SYMBOL	"BaseTimer_int0", F, 0x8000000f, E, "_BaseTimer_int0", I
	._FPARAM	S, 0, F
	._FPARAM	E
	._CONFIG	S, F, 1
	._LINE	0, 130
_BaseTimer_int0:
L_38:
	STM	(R0,R1,R2,R3,R12,R13)
	ST	RP,@-SP
	ENTER	#4
;-------end_of_no_optimize_block
	._FUNCTION	"fp", "fp", 16
	._CONFIG	S, B
L_39:				// Pred: L_38
	._LINE	0, 132
	LDI:32	#_timer_mode,R12
	LDUB	@R12,R2	; _timer_mode
	ADDN	#-1,R2
	CMP	#4,R2
	BNC32	L_76,R12
L_89:				// Pred: L_39
	._LINE	0, 132
	LDI:32	#L_50093,R13
	LSL	#2,R2
	LD	@(R13,R2),R12
;-------table_branch
	JMP	@R12
	.section	CONST, CONST, align=4
	.align	4
L_50093:
	.word	L_41
	.word	L_42
	.word	L_43
	.word	L_44
	.section	CODE, CODE, align=2
	.align	2
L_41:				// Pred: L_89
	._LINE	0, 134
	LDI:32	#_IO_BT0+5,R0
	BTSTL	#0x1,@R0
	BEQ32	L_47,R12
L_46:				// Pred: L_41
	._LINE	0, 134
;-------volatile_access
	BAND	#0xFE,@R0
L_47:				// Pred: L_46 L_41
	._LINE	0, 135
	BTSTL	#0x2,@R0
	BEQ32	L_49,R12
L_48:				// Pred: L_47
	._LINE	0, 135
;-------volatile_access
	BAND	#0xFD,@R0
L_49:				// Pred: L_48 L_47
	._LINE	0, 136
	BTSTL	#0x4,@R0
	BEQ32	L_51,R12
L_50:				// Pred: L_49
	._LINE	0, 136
;-------volatile_access
	BAND	#0xFB,@R0
L_51:				// Pred: L_50 L_49
	._LINE	0, 137
	LDI:32	#_pwm_duty_dir,R3
	LDUB	@R3,R0	; _pwm_duty_dir
	CMP	#0,R0
	BNE32	L_53,R12
L_52:				// Pred: L_51
	._LINE	0, 137
	._LINE	0, 138
	LDI:32	#_pwm_duty,R0
	LD	@R0,R1	; _pwm_duty
	LDI	#187,R2
	ADDN	R2,R1
	ST	R1,@R0	; _pwm_duty
	._LINE	0, 139
	BRA32	L_54,R12
L_53:				// Pred: L_51
	._LINE	0, 139
	._LINE	0, 140
	LDI:32	#_pwm_duty,R12
	LD	@R12,R0	; _pwm_duty
	LDI	#187,R1
	SUBN	R1,R0
	ST	R0,@R12	; _pwm_duty
	._LINE	0, 141
L_54:				// Pred: L_53 L_52
	._LINE	0, 142
	LDI:32	#_pwm_duty,R0
	LD	@R0,R2	; _pwm_duty
	LDI:32	#_IO_BT0+10,R1
	STH	R2,@R1	; _IO_BT0
	._LINE	0, 143
	LD	@R0,R1	; _pwm_duty
	LDI	#37307,R12
	CMP	R12,R1
	BLS32	L_56,R12
L_55:				// Pred: L_54
	._LINE	0, 143
	LDI	#1,R1
;-------volatile_access
	STB	R1,@R3	; _pwm_duty_dir
L_56:				// Pred: L_55 L_54
	._LINE	0, 144
	LD	@R0,R0	; _pwm_duty
	LDI	#192,R12
	CMP	R12,R0
	BNC32	L_76,R12
L_57:				// Pred: L_56
	._LINE	0, 144
	LDI	#0,R0
	STB	R0,@R3	; _pwm_duty_dir
	._LINE	0, 144
	BRA32	L_76,R12
L_42:				// Pred: L_89
	._LINE	0, 148
	LDI:32	#_IO_BT0+5,R1
	BTSTL	#0x1,@R1
	BEQ32	L_60,R12
L_59:				// Pred: L_42
	._LINE	0, 148
;-------volatile_access
	BAND	#0xFE,@R1
L_60:				// Pred: L_59 L_42
	._LINE	0, 149
	BTSTL	#0x4,@R1
	BEQ32	L_76,R12
L_61:				// Pred: L_60
	._LINE	0, 149
	BAND	#0xFB,@R1
	._LINE	0, 149
	BRA32	L_76,R12
L_43:				// Pred: L_89
	._LINE	0, 153
	LDI:32	#_IO_BT0+5,R0
	BTSTL	#0x1,@R0
	BEQ32	L_64,R12
L_63:				// Pred: L_43
	._LINE	0, 153
;-------volatile_access
	BAND	#0xFE,@R0
L_64:				// Pred: L_63 L_43
	._LINE	0, 154
	BTSTL	#0x4,@R0
	BEQ32	L_66,R12
L_65:				// Pred: L_64
	._LINE	0, 154
;-------volatile_access
	BAND	#0xFB,@R0
L_66:				// Pred: L_65 L_64
	._LINE	0, 155
	LDI:32	#_timer_cnt,R2
	LD	@R2,R12	; _timer_cnt
	ADDN	#1,R12
	ST	R12,@R2	; _timer_cnt
	._LINE	0, 156
	LD	@R2,R0	; _timer_cnt
	LDI	#20,R12
	CMP	R12,R0
	BLS32	L_76,R12
L_67:				// Pred: L_66
	._LINE	0, 156
	._LINE	0, 157
	DMOVB	@_IO_PDR1,R13	; _IO_PDR1
	LDI:8	#-1,R1
	EXTSB	R1
	EOR	R1, R13
	DMOVB	R13,@_IO_PDR1	; _IO_PDR1
	._LINE	0, 158
	LDI	#0,R0
	ST	R0,@R2	; _timer_cnt
	._LINE	0, 159
	._LINE	0, 159
	BRA32	L_76,R12
L_44:				// Pred: L_89
	._LINE	0, 163
	LDI:32	#_IO_BT0+5,R1
	BTSTL	#0x4,@R1
	BEQ32	L_70,R12
L_69:				// Pred: L_44
	._LINE	0, 163
	._LINE	0, 164
	LDI:32	#_IO_BT0+10,R12
	LDUH	@R12,R0	; _IO_BT0
	LDI:32	#_timer_cnt,R12
	ST	R0,@R12	; _timer_cnt
	._LINE	0, 170
L_70:				// Pred: L_69 L_44
	._LINE	0, 171
	BTSTL	#0x1,@R1
	BEQ32	L_76,R12
L_71:				// Pred: L_70
	._LINE	0, 171
	._LINE	0, 172
	BAND	#0xFE,@R1
	._LINE	0, 173
	LDI:32	#_timer_ovf_cnt,R0
	LD	@R0,R1	; _timer_ovf_cnt
	LDI	#65535,R12
	CMP	R12,R1
	BHI32	L_74,R12
L_73:				// Pred: L_71
	._LINE	0, 173
	._LINE	0, 174
	LD	@R0,R12	; _timer_ovf_cnt
	ADDN	#1,R12
	ST	R12,@R0	; _timer_ovf_cnt
	._LINE	0, 175
	BRA32	L_76,R12
L_74:				// Pred: L_71
	._LINE	0, 176
	._LINE	0, 177
	LDI	#0,R12
	ST	R12,@R0	; _timer_ovf_cnt
	._LINE	0, 178
L_76:				// Pred: L_74 L_73 L_70 L_67
				//	 L_66 L_61 L_60 L_57
				//	 L_56 L_89 L_39
	._LINE	0, 184
	._CONFIG	E
	._LINE	0, 186
	LEAVE
	LD	@SP+,RP
	LDM	(R0,R1,R2,R3,R12,R13)
	RETI
	._CONFIG	E
	.global	_dummy
	._SYMBOL	"dummy", F, 0x8000000f, E, "_dummy", I
	._FPARAM	S, 0, F
	._FPARAM	E
	._CONFIG	S, F, 1
	._LINE	0, 191
_dummy:
L_83:
	ST	R12,@-SP
	ST	RP,@-SP
	ENTER	#4
;-------end_of_no_optimize_block
	._FUNCTION	"fp", "fp", 16
	._CONFIG	S, B
L_84:				// Pred: L_83
	._LINE	0, 193
L_85:				// Pred: L_85 L_84
	._LINE	0, 193
	._LINE	0, 193
	._LINE	0, 194
	BRA32	L_85,R12
L_86:
	._LINE	0, 194
	._CONFIG	E
	._LINE	0, 194
	._CONFIG	E
	._SYMBOL	"pwm_duty_dir", V, 0x80000002, E, "_pwm_duty_dir"
	._SYMBOL	"pwm_duty", V, 0x80000006, E, "_pwm_duty"
	._SYMBOL	"timer_ovf_cnt", V, 0x80000006, E, "_timer_ovf_cnt"
	._SYMBOL	"timer_cnt", V, 0x80000006, E, "_timer_cnt"
	._SYMBOL	"timer_mode", V, 0x80000002, E, "_timer_mode"
	.end