smdk2440.h

SMDK2440 boot code, base on vivi

/*
 *  vivi/include/arch-s3c2410/smkdtk.h:
 *    Specific definitions for SMDK2410TK by MeriTech.
 *
 *  Author:     Janghoon Lyu
 *  Created:    October 22, 2003
 *  Copyright:  MIZI Research, Inc. All rights reserved.
 *
 *  Last modified: $Date: 2004/01/30 05:50:11 $
 *                 $Revision: 1.4 $
 *
 *  2003-10-22  To support 2.4.19-rmk7 kernel.
 *              By Janghoon Lyu.
 *
 *  2003-10-22  Change core clock values.
 *              By Janghoon Lyu.
 */  

#ifndef _SMDK2440_H_
#define _SMDK2440_H_

#include <config.h>
#include <arch/s3c2410.h>

/*
 * Architecture magic and machine type
 * NOTE: Below 'MACH_TYPE' does not _real_ mach type. 
 *       If you want to change mach type, you should be 
 *       modify the variable of 'default_vivi_parameters' 
 *       in the 'vivi/arch/s3c2410/smdktk.c'
 */
#define MACH_TYPE		395	
#define VIVI_MAGIC		(0x43090000 | MACH_TYPE)

/*
 * Miscellaneous
 */
#if defined(CONFIG_S3C2440_SMDK2440) //phoenix20090212:SMDK input clock 16.9344MHz
#define FIN			16934400
#else
#define FIN			12000000
#endif
#define FCLK			399651840
#define UART_REF_CLK		(FCLK/6) //PCLK

/*
 * Default values for processor's control register
 */

#define vLOCKTIME		0x00ffffff	/* Hardware reset value */
#define vCLKCON			0x0000fff8	/* Hardware reset value */	

/* 
 * 202.80 MHz, 101.40 MHz, 50.7 MHz. 
 * Above values are recommended by SOC.
 */
#if defined(CONFIG_S3C2440_SMDK2440) //phoenix20090212:SMDK input clock 16.9344MHz
#define vCLKDIVN		0x7		/* FCLK:HCLK:PCLK = 1:3:6 */
#define MDIV			0x6e
#define PDIV			0x3
#define SDIV			0x1
#else
#define vCLKDIVN		0x3		/* FCLK:HCLK:PCLK = 1:2:4 */
#define MDIV			0xa1
#define PDIV			0x3
#define SDIV			0x1
#endif
#define vMPLLCON		((MDIV << 12) | (PDIV << 4) | (SDIV))

/* Initial values for memory */
#define vBWSCON			0x2211d110
#define vBANKCON0		0x00000700
#define vBANKCON1		0x00000700
#define vBANKCON2		0x00000700
#define vBANKCON3		0x00001f7c /* CS8900A 10M Ethernet, 16bit I/O */
#define vBANKCON4		0x00000700
#define vBANKCON5		0x00000700
#define vBANKCON6		0x00018005
#define vBANKCON7		0x00018005
#define vREFRESH		0x008e0459
#define vBANKSIZE		0xb2
#define vMRSRB6			0x30
#define vMRSRB7			0x30


/* initial values for serial */
#define vULCON			0x3	/* UART, no parity, one stop bit, 8 bits */
#define vUCON			0x245
#define vUFCON			0x0
#define vUMCON			0x0

/* inital values for GPIOs */
#define vGPACON			0x007fffff
#define vGPADAT			0x00000000
#define vGPBCON			0x00044555
#define vGPBDAT			0x00000000
#define vGPBUP			0x000007ff
#define vGPCCON			0xaaaaaaaa
#define vGPCDAT			0x00000000
#define vGPCUP			0x0000ffff
#define vGPDCON			0xaaaaaaaa
#define vGPDDAT			0x00000000
#define vGPDUP			0x0000ffff
#define vGPECON			0xaaaaaaaa
#define vGPEDAT			0x00000000
#define vGPEUP			0x0000ffff
#define vGPFCON			0x000055aa
#define vGPFDAT			0x00000000
#define vGPFUP			0x000000ff
#define vGPGCON			0xff95ffba
#define vGPGDAT			0x00000000
#define vGPGUP			0x0000ffff
#define vGPHCON			0x0016faaa
#define vGPHDAT			0x00000000
#define vGPHUP			0x000007ff

#endif /* _SMDK2440_H_ */