head.s

SMDK2440 boot code, base on vivi

/*
 * vivi/arch/s3c2410/head.S:
 *   Initialise hardware
 * 
 * Author:	Janghoon Lyu
 * Created:	December 18, 2001
 * Copyright:	MIZI Research, Inc. 2001-2004
 *              All rights reserved.
 *
 * Last modified: $Date: 2004/02/02 06:46:47 $
 *                $Revision: 1.30 $
 */

#include <config.h>
#include <linkage.h>
#include <machine.h>
#include <memory.h>

@ Start of executable code 

ENTRY(_start)
ENTRY(ResetEntryPoint)

@
@ Exception vector table (physical address = 0x00000000)
@

@ 0x00: Reset
	b	Reset

@ 0x04: Undefined instruction exception
UndefEntryPoint:
	b	HandleUndef

@ 0x08: Software interrupt exception
SWIEntryPoint:
	b	HandleSWI

@ 0x0c: Prefetch Abort (Instruction Fetch Memory Abort)
PrefetchAbortEnteryPoint:
	b	HandlePrefetchAbort

@ 0x10: Data Access Memory Abort
DataAbortEntryPoint:
	b	HandleDataAbort

@ 0x14: Not used
NotUsedEntryPoint:
	b	HandleNotUsed

@ 0x18: IRQ(Interrupt Request) exception
IRQEntryPoint:
	b	HandleIRQ

@ 0x1c: FIQ(Fast Interrupt Request) exception
FIQEntryPoint:
	b	HandleFIQ

@
@ VIVI magics
@

@ 0x20: magic number so we can verify that we only put 
	.long	VIVI_MAGIC
#ifdef CONFIG_PM
@ 0x24:
	b	SleepRamProc
#endif
#ifdef CONFIG_TEST
@ 0x28:
	b	hmi
#endif


@
@ Start VIVI head
@
Reset:
	bl	PreInit
	bl	InitGPIO
	bl	InitClk
	bl	InitMemCtrl

#ifdef CONFIG_PM
	@ Check if this is a wake-up from sleep
	ldr	r1, PMST_ADDR
	ldr	r0, [r1]
	tst	r0, #(PMST_SMR)
	bne	WakeupStart
#endif

#ifdef CONFIG_DEBUG_LL
	bl	inituart
#endif

#ifdef CONFIG_BOOTUP_MEMTEST
	@ simple memory test to find some DRAM faults.
	bl	memtest
#endif

	bl	copy_myself

	@ get ready to call C functions
	ldr	sp, vivi_stack_pointer	@ setup stack pointer
	mov	fp, #0			@ no previous frame, so fp=0
	mov	a2, #0			@ set argv to NULL 

	bl	main			@ call main 

1:	b	1b			@ for safety

@
@ End VIVI head
@

/*
 * subroutines
 */
@
@ Eearly initialization 
@
PreInit:
	@ disable watch dog timer
	mov	r0, #0x53000000
	mov	r1, #0x0
	str	r1, [r0]

	@ disable all interrupts
	mov	r0, #INT_CTL_BASE
	mov	r1, #0xffffffff
	str	r1, [r0, #oINTMSK]
	mov	r1, #0x700
	orr	r1, r1, #0x0ff
	str	r1, [r0, #oINTSUBMSK]	

	mov	pc, lr

@
@ Initialze core and bus clocks
@
InitClk:
	@ initialise system clocks
	mov	r1, #CLK_CTL_BASE
	ldr	r2, clock_clkdivn
	str	r2, [r1, #oCLKDIVN]

	mov	r1, #CLK_CTL_BASE
	mvn	r2, #0xff000000
	str	r2, [r1, #oLOCKTIME]

	mov	r1, #CLK_CTL_BASE
	ldr	r2, clock_mpll
	str	r2, [r1, #oMPLLCON]

	mov	pc, lr

/*
 * Initialize memory controller
 */
InitMemCtrl:
	@ initialise the static memory 
	mrc	p15, 0, r1, c1, c0, 0		@ read ctrl register 
	orr	r1, r1, #0xc0000000		@ Asynchronous  
	mcr	p15, 0, r1, c1, c0, 0		@ write ctrl register

	@ set memory control registers
	mov	r1, #MEM_CTL_BASE
	adrl	r2, mem_cfg_val
	add	r3, r1, #52
1:	ldr	r4, [r2], #4
	str	r4, [r1], #4
	cmp	r1, r3
	bne	1b

	mov	pc, lr

/*
 * Initialize GPIOs
 */
InitGPIO:
	mov	r0, #0x56000000
	adrl	r1, gpio_cfg_val
	mov	r2, #4
1:	ldmia	r1!, {r3-r10}
	stmia	r0!, {r3-r10}
	subs	r2, r2, #1
	bne	1b

	mov	pc, lr


@
@ Wake-up codes
@
#ifdef CONFIG_PM
WakeupStart:
	@ Clear sleep reset bit
	ldr	r0, PMST_ADDR
	mov	r1, #PMST_SMR
	str	r1, [r0]

	@ Release the SDRAM signal protections
	ldr	r0, PMCTL1_ADDR
	ldr	r1, [r0]
	bic	r1, r1, #(SCLKE | SCLK1 | SCLK0)
	str	r1, [r0]

	@ Go...
	ldr	r0, PMSR0_ADDR	@ read a return address
	ldr	r1, [r0]
	mov	pc, r1
	nop
	nop
1:	b	1b		@ infinite loop

SleepRamProc:
	@ SDRAM is in the self-refresh mode */
	ldr	r0, REFR_ADDR
	ldr	r1, [r0]
	orr	r1, r1, #SELF_REFRESH
	str	r1, [r0]

	@ wait until SDRAM into self-refresh
	mov	r1, #16
1:	subs	r1, r1, #1	
	bne	1b

	@ Set the SDRAM singal protections
	ldr	r0, PMCTL1_ADDR
	ldr	r1, [r0]
	orr	r1, r1, #(SCLKE | SCLK1 | SCLK0)
	str	r1, [r0]

	/* Sleep... Now */
	ldr	r0, PMCTL0_ADDR
	ldr	r1, [r0]
	orr	r1, r1, #SLEEP_ON
	str	r1, [r0]	
1:	b	1b

#ifdef CONFIG_TEST
hmi:
	ldr	r0, PMCTL0_ADDR
	ldr	r1, =0x7fff0
	str	r1, [r0]
	
	@ All LED on
	mov	r1, #GPIO_CTL_BASE
	add	r1, r1, #oGPIO_F
	ldr	r2,=0x55aa
	str	r2, [r1, #oGPIO_CON]
	mov	r2, #0xff
	str	r2, [r1, #oGPIO_UP]
	mov	r2, #0xe0
	str	r2, [r1, #oGPIO_DAT]
1:	b	1b
#endif

#endif

@
@ copy_myself: copy vivi to ram
@
copy_myself:
	mov	r10, lr		@ save return address

#ifdef CONFIG_DEBUG_LL
	adr	r0, str_copy
	bl	printascii
#endif

	@ get read to call C functions 
	ldr	sp, vivi_stack_pointer	@ setup stack pointer
	mov	fp, #0			@ no previous frame, so fp=0


	bl	copy_vivi_to_ram

	tst	r0, #0x0
	bne	copy_myself_failed
	
#ifdef CONFIG_DEBUG_LL
	adr	r0, str_ok
	bl	printascii
#endif

	@ verify
#ifdef CONFIG_DEBUG_LL
	adr	r0, str_verify
	bl	printascii
#endif

	ldr	r0, vivi_rom_base_addr
	ldr	r1, vivi_ram_base_addr
	mov	r2, #0x400		@ compare first 4-K byte
1001:	ldr	r3, [r0], #4
	ldr	r4, [r1], #4
	teq	r3, r4
	bne	copy_myself_failed	@ not matched	
	subs	r2, r2, #4
	bne	1001b

#ifdef CONFIG_DEBUG_LL
	adr	r0, str_ok
	bl	printascii
#endif

	@ jump to ram
	ldr	r0, vivi_ram_base_addr
	ldr	r1, vivi_rom_base_addr
	sub	r0, r0, r1
	add	pc, r10, r0	/* fake ^^; */

copy_myself_failed:
#ifdef CONFIG_DEBUG_LL
	adr	r0, str_fail
	bl	printascii
#endif
1:	b	1b


@
@ Exception handling functions
@
HandleUndef:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	adr	r0, STR_UNDEF
	bl	printascii
#endif
	b	InfiniteLoop

HandleSWI:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	adr	r0, STR_SWI
	bl	printascii
#endif
	b	InfiniteLoop

HandlePrefetchAbort:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	adr	r0, STR_PRE_ABORT
	bl	printascii
#endif
	b	InfiniteLoop

HandleDataAbort:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	adr	r0, STR_DATA_ABORT
	bl	printascii
#endif
	b	InfiniteLoop

HandleIRQ:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	adr	r0, STR_IRQ
	bl	printascii
#endif
	b	InfiniteLoop

HandleFIQ:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	adr	r0, STR_FIQ
	bl	printascii
#endif
	b	InfiniteLoop

HandleNotUsed:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	adr	r0, STR_NOT_USED
	bl	printascii
#endif
	b	InfiniteLoop

watchdog_ctrl_value:
	.long	0x00008021
InfiniteLoop:
	mov	r1, #0x53000000
	@ Enable watch dog timer
	ldr	r2, watchdog_ctrl_value
	str	r2, [r1]
	mov	r2, #0x100
	str	r2, [r1, #0x4]
	str	r2, [r1, #0x8]

1:	b	1b

@
@ Data Area
@
	.ltorg
	.align 2

@ Memory configuration values
mem_cfg_val:		.long	vBWSCON
			.long	vBANKCON0
			.long	vBANKCON1
			.long	vBANKCON2
			.long	vBANKCON3
			.long	vBANKCON4
			.long	vBANKCON5
			.long	vBANKCON6
			.long	vBANKCON7
			.long	vREFRESH
			.long	vBANKSIZE
			.long	vMRSRB6
			.long	vMRSRB7

@ GPIO configuration values
gpio_cfg_val:		.long	vGPACON
			.long	vGPADAT
			.long	0x00000000	/* dummy */
			.long	0x00000000	/* dummy */
			.long	vGPBCON
			.long	vGPBDAT
			.long	vGPBUP
			.long	0x00000000	/* dummy */
			.long	vGPCCON
			.long	vGPCDAT
			.long	vGPCUP
			.long	0x00000000	/* dummy */
			.long	vGPDCON
			.long	vGPDDAT
			.long	vGPDUP
			.long	0x00000000	/* dummy */
			.long	vGPECON
			.long	vGPEDAT
			.long	vGPEUP
			.long	0x00000000	/* dummy */
			.long	vGPFCON
			.long	vGPFDAT
			.long	vGPFUP
			.long	0x00000000	/* dummy */
			.long	vGPGCON
			.long	vGPGDAT
			.long	vGPGUP
			.long	0x00000000	/* dummy */
			.long	vGPHCON
			.long	vGPHDAT
			.long	vGPHUP
			.long	0x00000000	/* dummy */


@ Processor clock values
clock_locktime:		.long	vLOCKTIME
clock_mpll:		.long	vMPLLCON
clock_clkcon:		.long	vCLKCON
clock_clkdivn:		.long	vCLKDIVN

vivi_stack_pointer:	.long	(STACK_BASE + STACK_SIZE - 4)
vivi_ram_base_addr:	.long	VIVI_BASE
vivi_rom_base_addr:	.long	VIVI_ROM_BASE

#ifdef CONFIG_DEBUG_LL
		.align	2
STR_UNDEF:	.asciz	"UNDF\n"
		.align	2
STR_SWI:	.asciz	"SWI\n"
		.align	2
STR_PRE_ABORT:	.asciz	"PABT\n"
		.align	2
STR_DATA_ABORT:	.asciz	"DABT\n"
		.align 2
STR_IRQ:	.asciz	"IRQ\n"
		.align 2
STR_FIQ:	.asciz	"FIQ\n"
		.align 2
STR_NOT_USED:	.asciz	"NUSD\n"
		.align 2
str_fail:	.asciz	"fail\n"
		.align 2
str_ok:		.asciz	"ok\n"
		.align 2
str_copy:	.asciz	"copying... "
		.align 2
str_verify:	.asciz	"verifying... "

#endif

#ifdef CONFIG_PM
.align 2
PMCTL0_ADDR:
	.long 0x4c00000c
PMCTL1_ADDR:
	.long 0x56000080
PMST_ADDR:
	.long 0x560000B4
PMSR0_ADDR:
	.long 0x560000B8
REFR_ADDR:
	.long 0x48000024
#endif