cstartup_sam7.lst

MMC/SD on Olimex Sam7-EX256

   1              		.file	"Cstartup_SAM7.c"
   9              	.Ltext0:
  10              		.align	2
  11              		.global	AT91F_LowLevelInit
  13              	AT91F_LowLevelInit:
  14              	.LFB2:
  15              		.file 1 "init/Cstartup_SAM7.c"
   1:init/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
   2:init/Cstartup_SAM7.c **** //*         ATMEL Microcontroller Software Support  -  ROUSSET  -
   3:init/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
   4:init/Cstartup_SAM7.c **** //* The software is delivered "AS IS" without warranty or condition of any
   5:init/Cstartup_SAM7.c **** //* kind, either express, implied or statutory. This includes without
   6:init/Cstartup_SAM7.c **** //* limitation any warranty or condition with respect to merchantability or
   7:init/Cstartup_SAM7.c **** //* fitness for any particular purpose, or against the infringements of
   8:init/Cstartup_SAM7.c **** //* intellectual property rights of others.
   9:init/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
  10:init/Cstartup_SAM7.c **** //* File Name           : Cstartup_SAM7.c
  11:init/Cstartup_SAM7.c **** //* Object              : Low level initializations written in C for Tools
  12:init/Cstartup_SAM7.c **** //* Creation            : 12/Jun/04
  13:init/Cstartup_SAM7.c **** //* 1.2   28/Feb/05 JPP : LIB change AT91C_WDTC_WDDIS & PLL
  14:init/Cstartup_SAM7.c **** //* 1.3   21/Mar/05 JPP : Change PLL Wait time
  15:init/Cstartup_SAM7.c **** //* 1.4   21/Aug/05 JPP : Change MC_FMR Setting
  16:init/Cstartup_SAM7.c **** //* 1.5   29/Aug/05 JPP : Change PLL error
  17:init/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
  18:init/Cstartup_SAM7.c **** 
  19:init/Cstartup_SAM7.c **** // Include the board file description
  20:init/Cstartup_SAM7.c **** #include "../include/include.h"
  21:init/Cstartup_SAM7.c **** 
  22:init/Cstartup_SAM7.c **** // The following functions must be write in ARM mode this function called directly
  23:init/Cstartup_SAM7.c **** // by exception vector
  24:init/Cstartup_SAM7.c **** extern void AT91F_Spurious_handler(void);
  25:init/Cstartup_SAM7.c **** extern void AT91F_Default_IRQ_handler(void);
  26:init/Cstartup_SAM7.c **** extern void AT91F_Default_FIQ_handler(void);
  27:init/Cstartup_SAM7.c **** 
  28:init/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
  29:init/Cstartup_SAM7.c **** //* \fn    AT91F_LowLevelInit
  30:init/Cstartup_SAM7.c **** //* \brief This function performs very low level HW initialization
  31:init/Cstartup_SAM7.c **** //*        this function can be use a Stack, depending the compilation
  32:init/Cstartup_SAM7.c **** //*        optimization mode
  33:init/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
  34:init/Cstartup_SAM7.c **** void AT91F_LowLevelInit( void)
  35:init/Cstartup_SAM7.c **** {
  16              		.loc 1 35 0
  17              		@ Function supports interworking.
  18              		@ args = 0, pretend = 0, frame = 0
  19              		@ frame_needed = 0, uses_anonymous_args = 0
  20              		@ link register save eliminated.
  21              	.LVL0:
  36:init/Cstartup_SAM7.c ****  int            i;
  37:init/Cstartup_SAM7.c ****  AT91PS_PMC     pPMC = AT91C_BASE_PMC;
  38:init/Cstartup_SAM7.c ****     //* Set Flash Waite sate
  39:init/Cstartup_SAM7.c **** 	//  Single Cycle Access at Up to 30 MHz, or 40
  40:init/Cstartup_SAM7.c **** 	    AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS ;
  22              		.loc 1 40 0
  23 0000 012CA0E3 		mov	r2, #256
  24 0004 FF30E0E3 		mvn	r3, #255
  25 0008 602083E5 		str	r2, [r3, #96]
  41:init/Cstartup_SAM7.c **** 
  42:init/Cstartup_SAM7.c ****     //* Watchdog Disable
  43:init/Cstartup_SAM7.c ****         AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;
  26              		.loc 1 43 0
  27 000c 7F2C82E2 		add	r2, r2, #32512
  28 0010 073D43E2 		sub	r3, r3, #448
  29 0014 042083E5 		str	r2, [r3, #4]
  44:init/Cstartup_SAM7.c **** 
  45:init/Cstartup_SAM7.c **** 	//* Set MCK at 47 923 200
  46:init/Cstartup_SAM7.c ****     // 1 Enabling the Main Oscillator:
  47:init/Cstartup_SAM7.c ****         // SCK = 1/32768 = 30.51 uSecond
  48:init/Cstartup_SAM7.c ****     	// Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
  49:init/Cstartup_SAM7.c ****        //// mt pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) | AT91C_CKGR_MOSCEN ));
  50:init/Cstartup_SAM7.c **** 	   pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) ) | AT91C_CKGR_MOSCEN );
  30              		.loc 1 50 0
  31 0018 A8209FE5 		ldr	r2, .L26
  32 001c 053D43E2 		sub	r3, r3, #320
  33 0020 202083E5 		str	r2, [r3, #32]
  34              		.loc 1 35 0
  35              		@ lr needed for prologue
  36              	.L2:
  51:init/Cstartup_SAM7.c ****         // Wait the startup time
  52:init/Cstartup_SAM7.c ****         while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS));
  37              		.loc 1 52 0
  38 0024 A0209FE5 		ldr	r2, .L26+4
  39 0028 683092E5 		ldr	r3, [r2, #104]
  40 002c 010013E3 		tst	r3, #1
  41 0030 0700000A 		beq	.L2
  53:init/Cstartup_SAM7.c **** 	// 2 Checking the Main Oscillator Frequency (Optional)
  54:init/Cstartup_SAM7.c **** 	// 3 Setting PLL and divider:
  55:init/Cstartup_SAM7.c **** 		// - div by 14 Fin = 1.3165 =(18,432 / 14)
  56:init/Cstartup_SAM7.c **** 		// - Mul 72+1: Fout =	96.1097 =(3,6864 *73)
  57:init/Cstartup_SAM7.c **** 		// for 96 MHz the erroe is 0.11%
  58:init/Cstartup_SAM7.c **** 		// Field out NOT USED = 0
  59:init/Cstartup_SAM7.c **** 		// PLLCOUNT pll startup time estimate at : 0.844 ms
  60:init/Cstartup_SAM7.c **** 		// PLLCOUNT 28 = 0.000844 /(1/32768)
  61:init/Cstartup_SAM7.c ****        pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 14 ) |
  42              		.loc 1 61 0
  43 0034 94309FE5 		ldr	r3, .L26+8
  44 0038 2C3082E5 		str	r3, [r2, #44]
  45              	.L4:
  62:init/Cstartup_SAM7.c ****                          (AT91C_CKGR_PLLCOUNT & (28<<8)) |
  63:init/Cstartup_SAM7.c ****                          (AT91C_CKGR_MUL & (72<<16)));
  64:init/Cstartup_SAM7.c **** 
  65:init/Cstartup_SAM7.c **** 
  66:init/Cstartup_SAM7.c ****         // Wait the startup time
  67:init/Cstartup_SAM7.c ****         while(!(pPMC->PMC_SR & AT91C_PMC_LOCK));
  46              		.loc 1 67 0
  47 003c 88309FE5 		ldr	r3, .L26+4
  48 0040 683093E5 		ldr	r3, [r3, #104]
  49 0044 040013E3 		tst	r3, #4
  50 0048 0D00000A 		beq	.L4
  51              	.L14:
  68:init/Cstartup_SAM7.c ****         while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
  52              		.loc 1 68 0
  53 004c 78209FE5 		ldr	r2, .L26+4
  54 0050 683092E5 		ldr	r3, [r2, #104]
  55 0054 080013E3 		tst	r3, #8
  56 0058 1100000A 		beq	.L14
  69:init/Cstartup_SAM7.c ****  	// 4. Selection of Master Clock and Processor Clock
  70:init/Cstartup_SAM7.c ****  	// select the PLL clock divided by 2
  71:init/Cstartup_SAM7.c ****  	    pPMC->PMC_MCKR =  AT91C_PMC_PRES_CLK_2 ;
  57              		.loc 1 71 0
  58 005c 0430A0E3 		mov	r3, #4
  59 0060 303082E5 		str	r3, [r2, #48]
  60              	.L7:
  72:init/Cstartup_SAM7.c ****  	    while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
  61              		.loc 1 72 0
  62 0064 60209FE5 		ldr	r2, .L26+4
  63 0068 683092E5 		ldr	r3, [r2, #104]
  64 006c 080013E3 		tst	r3, #8
  65 0070 1700000A 		beq	.L7
  73:init/Cstartup_SAM7.c **** 
  74:init/Cstartup_SAM7.c ****  	    pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK  ;
  66              		.loc 1 74 0
  67 0074 303092E5 		ldr	r3, [r2, #48]
  68 0078 033083E3 		orr	r3, r3, #3
  69 007c 303082E5 		str	r3, [r2, #48]
  70              	.L9:
  75:init/Cstartup_SAM7.c ****  	    while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
  71              		.loc 1 75 0
  72 0080 44309FE5 		ldr	r3, .L26+4
  73 0084 683093E5 		ldr	r3, [r3, #104]
  74 0088 080013E3 		tst	r3, #8
  75 008c 1E00000A 		beq	.L9
  76:init/Cstartup_SAM7.c **** 
  77:init/Cstartup_SAM7.c **** 	// Set up the default interrupts handler vectors
  78:init/Cstartup_SAM7.c **** 	AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
  76              		.loc 1 78 0
  77 0090 3C209FE5 		ldr	r2, .L26+12
  78 0094 3C309FE5 		ldr	r3, .L26+16
  79 0098 802083E5 		str	r2, [r3, #128]
  80 009c 0110A0E3 		mov	r1, #1
  81              	.LVL1:
  82              	.L11:
  79:init/Cstartup_SAM7.c **** 	for (i=1;i < 31; i++)
  80:init/Cstartup_SAM7.c **** 	{
  81:init/Cstartup_SAM7.c **** 	    AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
  83              		.loc 1 81 0
  84 00a0 0121A0E1 		mov	r2, r1, asl #2
  85 00a4 30309FE5 		ldr	r3, .L26+20
  86              		.loc 1 79 0
  87 00a8 011081E2 		add	r1, r1, #1
  88 00ac 1F0051E3 		cmp	r1, #31
  89              		.loc 1 81 0
  90 00b0 803F02E5 		str	r3, [r2, #-3968]
  91              		.loc 1 79 0
  92 00b4 2600001A 		bne	.L11
  82:init/Cstartup_SAM7.c **** 	}
  83:init/Cstartup_SAM7.c **** 	AT91C_BASE_AIC->AIC_SPU  = (int) AT91F_Spurious_handler ;
  93              		.loc 1 83 0
  94 00b8 20209FE5 		ldr	r2, .L26+24
  95 00bc 14309FE5 		ldr	r3, .L26+16
  96 00c0 342183E5 		str	r2, [r3, #308]
  84:init/Cstartup_SAM7.c **** 
  85:init/Cstartup_SAM7.c **** }
  97              		.loc 1 85 0
  98 00c4 1EFF2FE1 		bx	lr
  99              	.L27:
 100              		.align	2
 101              	.L26:
 102 00c8 01060000 		.word	1537
 103 00cc 00FCFFFF 		.word	-1024
 104 00d0 0E1C4800 		.word	4725774
 105 00d4 00000000 		.word	AT91F_Default_FIQ_handler
 106 00d8 00F0FFFF 		.word	-4096
 107 00dc 00000000 		.word	AT91F_Default_IRQ_handler
 108 00e0 00000000 		.word	AT91F_Spurious_handler
 109              	.LFE2:
 136              	.Letext0:
DEFINED SYMBOLS
                            *ABS*:00000000 Cstartup_SAM7.c
/cygdrive/c/DOCUME~1/Dima/LOCALS~1/Temp/cc1uJj5g.s:13     .text:00000000 AT91F_LowLevelInit
/cygdrive/c/DOCUME~1/Dima/LOCALS~1/Temp/cc1uJj5g.s:23     .text:00000000 $a
/cygdrive/c/DOCUME~1/Dima/LOCALS~1/Temp/cc1uJj5g.s:102    .text:000000c8 $d

UNDEFINED SYMBOLS
AT91F_Default_FIQ_handler
AT91F_Default_IRQ_handler
AT91F_Spurious_handler