📄 desc.h
字号:
/*
* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
* All rights reserved.
*
* This software is copyrighted by and is the sole property of
* VIA Networking Technologies, Inc. This software may only be used
* in accordance with the corresponding license agreement. Any unauthorized
* use, duplication, transmission, distribution, or disclosure of this
* software is expressly forbidden.
*
* This software is provided by VIA Networking Technologies, Inc. "as is"
* and any express or implied warranties, including, but not limited to, the
* implied warranties of merchantability and fitness for a particular purpose
* are disclaimed. In no event shall VIA Networking Technologies, Inc.
* be liable for any direct, indirect, incidental, special, exemplary, or
* consequential damages.
*
* File: desc.h
*
* Purpose:The header file of descriptor
*
* Revision History:
*
* Author: Tevin Chen
*
* Date: May 21, 1996
*
*/
#ifndef __DESC_H__
#define __DESC_H__
#include <linux/types.h>
#include <linux/mm.h>
#if !defined(__TTYPE_H__)
#include "ttype.h"
#endif
#if !defined(__TETHER_H__)
#include "tether.h"
#endif
// #ifdef PRIVATE_OBJ
//#if !defined(__DEVICE_MODULE_H)
//#include "device_module.h"
//#endif
/*--------------------- Export Definitions -------------------------*/
#define B_OWNED_BY_CHIP 1 //
#define B_OWNED_BY_HOST 0 //
//
// Bits in the RSR register
//
#define RSR_ADDRBROAD 0x80 // 1000 0000
#define RSR_ADDRMULTI 0x40 // 0100 0000
#define RSR_ADDRUNI 0x00 // 0000 0000
#define RSR_IVLDTYP 0x20 // 0010 0000 , invalid packet type
#define RSR_IVLDLEN 0x10 // 0001 0000 , invalid len (> 2312 byte)
#define RSR_BSSIDOK 0x08 // 0000 1000
#define RSR_CRCOK 0x04 // 0000 0100
#define RSR_BCNSSIDOK 0x02 // 0000 0010
#define RSR_ADDROK 0x01 // 0000 0001
//
// Bits in the new RSR register
//
#define NEWRSR_DECRYPTOK 0x10 // 0001 0000
#define NEWRSR_CFPIND 0x08 // 0000 1000
#define NEWRSR_HWUTSF 0x04 // 0000 0100
#define NEWRSR_BCNHITAID 0x02 // 0000 0010
#define NEWRSR_BCNHITAID0 0x01 // 0000 0001
//
// Bits in the TSR0 register
//
#define TSR0_PWRSTS1_2 0xC0 // 1100 0000
#define TSR0_PWRSTS7 0x20 // 0010 0000
#define TSR0_NCR 0x1F // 0001 1111
//
// Bits in the TSR1 register
//
#define TSR1_TERR 0x80 // 1000 0000
#define TSR1_PWRSTS4_6 0x70 // 0111 0000
#define TSR1_RETRYTMO 0x08 // 0000 1000
#define TSR1_TMO 0x04 // 0000 0100
#define TSR1_PWRSTS3 0x02 // 0000 0010
#define ACK_DATA 0x01 // 0000 0000
//
// Bits in the TCR register
//
#define EDMSDU 0x04 // 0000 0100 end of sdu
#define TCR_EDP 0x02 // 0000 0010 end of packet
#define TCR_STP 0x01 // 0000 0001 start of packet
// max transmit or receive buffer size
#define CB_MAX_BUF_SIZE 2900U // max buffer size
// NOTE: must be multiple of 4
#define CB_MAX_TX_BUF_SIZE CB_MAX_BUF_SIZE // max Tx buffer size
#define CB_MAX_RX_BUF_SIZE_NORMAL CB_MAX_BUF_SIZE // max Rx buffer size when not use Multi-RD
#define CB_BEACON_BUF_SIZE 512U // default beacon buffer size
#define CB_MAX_RX_DESC 128 // max # of descriptor
#define CB_MIN_RX_DESC 16 // min # of rx descriptor
#define CB_MAX_TX_DESC 64 // max # of descriptor
#define CB_MIN_TX_DESC 16 // min # of tx descriptor
#define CB_MAX_RECEIVED_PACKETS 16 // max # of received packets at one time
// limit our receive routine to indicating
// this many at a time for 2 reasons:
// 1. driver flow control to protocol layer
// 2. limit the time used in ISR routine
#define CB_EXTRA_RD_NUM 32 // default # of Extra RD
#define CB_RD_NUM 32 // default # of RD
#define CB_TD_NUM 32 // default # of TD
// max number of physical segments
// in a single NDIS packet. Above this threshold, the packet
// is copied into a single physically contiguous buffer
#define CB_MAX_SEGMENT 4
#define CB_MIN_MAP_REG_NUM 4
#define CB_MAX_MAP_REG_NUM CB_MAX_TX_DESC
#define CB_PROTOCOL_RESERVED_SECTION 16
// if retrys excess 15 times , tx will abort, and
// if tx fifo underflow, tx will fail
// we should try to resend it
#define CB_MAX_TX_ABORT_RETRY 3
#ifdef __BIG_ENDIAN
// WMAC definition FIFO Control
#define FIFOCTL_AUTO_FB_1 0x0010 // 0001 0000 0000 0000
#define FIFOCTL_AUTO_FB_0 0x0008 // 0000 1000 0000 0000
#define FIFOCTL_GRPACK 0x0004 // 0000 0100 0000 0000
#define FIFOCTL_11GA 0x0003 // 0000 0011 0000 0000
#define FIFOCTL_11GB 0x0002 // 0000 0010 0000 0000
#define FIFOCTL_11B 0x0001 // 0000 0001 0000 0000
#define FIFOCTL_11A 0x0000 // 0000 0000 0000 0000
#define FIFOCTL_RTS 0x8000 // 0000 0000 1000 0000
#define FIFOCTL_ISDMA0 0x4000 // 0000 0000 0100 0000
#define FIFOCTL_GENINT 0x2000 // 0000 0000 0010 0000
#define FIFOCTL_TMOEN 0x1000 // 0000 0000 0001 0000
#define FIFOCTL_LRETRY 0x0800 // 0000 0000 0000 1000
#define FIFOCTL_CRCDIS 0x0400 // 0000 0000 0000 0100
#define FIFOCTL_NEEDACK 0x0200 // 0000 0000 0000 0010
#define FIFOCTL_LHEAD 0x0100 // 0000 0000 0000 0001
//WMAC definition Frag Control
#define FRAGCTL_AES 0x0003 // 0000 0011 0000 0000
#define FRAGCTL_TKIP 0x0002 // 0000 0010 0000 0000
#define FRAGCTL_LEGACY 0x0001 // 0000 0001 0000 0000
#define FRAGCTL_NONENCRYPT 0x0000 // 0000 0000 0000 0000
//#define FRAGCTL_AC3 0x0C00 // 0000 0000 0000 1100
//#define FRAGCTL_AC2 0x0800 // 0000 0000 0000 1000
//#define FRAGCTL_AC1 0x0400 // 0000 0000 0000 0100
//#define FRAGCTL_AC0 0x0000 // 0000 0000 0000 0000
#define FRAGCTL_ENDFRAG 0x0300 // 0000 0000 0000 0011
#define FRAGCTL_MIDFRAG 0x0200 // 0000 0000 0000 0010
#define FRAGCTL_STAFRAG 0x0100 // 0000 0000 0000 0001
#define FRAGCTL_NONFRAG 0x0000 // 0000 0000 0000 0000
#else
#define FIFOCTL_AUTO_FB_1 0x1000 // 0001 0000 0000 0000
#define FIFOCTL_AUTO_FB_0 0x0800 // 0000 1000 0000 0000
#define FIFOCTL_GRPACK 0x0400 // 0000 0100 0000 0000
#define FIFOCTL_11GA 0x0300 // 0000 0011 0000 0000
#define FIFOCTL_11GB 0x0200 // 0000 0010 0000 0000
#define FIFOCTL_11B 0x0100 // 0000 0001 0000 0000
#define FIFOCTL_11A 0x0000 // 0000 0000 0000 0000
#define FIFOCTL_RTS 0x0080 // 0000 0000 1000 0000
#define FIFOCTL_ISDMA0 0x0040 // 0000 0000 0100 0000
#define FIFOCTL_GENINT 0x0020 // 0000 0000 0010 0000
#define FIFOCTL_TMOEN 0x0010 // 0000 0000 0001 0000
#define FIFOCTL_LRETRY 0x0008 // 0000 0000 0000 1000
#define FIFOCTL_CRCDIS 0x0004 // 0000 0000 0000 0100
#define FIFOCTL_NEEDACK 0x0002 // 0000 0000 0000 0010
#define FIFOCTL_LHEAD 0x0001 // 0000 0000 0000 0001
//WMAC definition Frag Control
#define FRAGCTL_AES 0x0300 // 0000 0011 0000 0000
#define FRAGCTL_TKIP 0x0200 // 0000 0010 0000 0000
#define FRAGCTL_LEGACY 0x0100 // 0000 0001 0000 0000
#define FRAGCTL_NONENCRYPT 0x0000 // 0000 0000 0000 0000
//#define FRAGCTL_AC3 0x000C // 0000 0000 0000 1100
//#define FRAGCTL_AC2 0x0008 // 0000 0000 0000 1000
//#define FRAGCTL_AC1 0x0004 // 0000 0000 0000 0100
//#define FRAGCTL_AC0 0x0000 // 0000 0000 0000 0000
#define FRAGCTL_ENDFRAG 0x0003 // 0000 0000 0000 0011
#define FRAGCTL_MIDFRAG 0x0002 // 0000 0000 0000 0010
#define FRAGCTL_STAFRAG 0x0001 // 0000 0000 0000 0001
#define FRAGCTL_NONFRAG 0x0000 // 0000 0000 0000 0000
#endif // #ifdef __BIG_ENDIAN
//#define TYPE_AC0DMA 0
//#define TYPE_TXDMA0 1
#define TYPE_TXDMA0 0
#define TYPE_AC0DMA 1
#define TYPE_ATIMDMA 2
#define TYPE_SYNCDMA 3
#define TYPE_MAXTD 2
#define TYPE_BEACONDMA 4
#define TYPE_RXDMA0 0
#define TYPE_RXDMA1 1
#define TYPE_MAXRD 2
// TD_INFO flags control bit
#define TD_FLAGS_NETIF_SKB 0x01 // check if need release skb
#define TD_FLAGS_PRIV_SKB 0x02 // check if called from private skb(hostap)
#define TD_FLAGS_PS_RETRY 0x04 // check if PS STA frame re-transmit
//#define TD_FLAGS_NETIF_SKB 0x04
/*--------------------- Export Types ------------------------------*/
// ref_sk_buff is used for mapping the skb structure between pre-built driver-obj & running kernel.
// Since different kernel version (2.4x) may change skb structure, i.e. pre-built driver-obj
// may link to older skb that leads error.
typedef struct tagDEVICE_RD_INFO {
struct sk_buff* skb;
#ifdef PRIVATE_OBJ
ref_sk_buff ref_skb;
#endif
dma_addr_t skb_dma;
dma_addr_t curr_desc;
} DEVICE_RD_INFO, *PDEVICE_RD_INFO;
/*
static inline PDEVICE_RD_INFO alloc_rd_info(void) {
PDEVICE_RD_INFO ptr;
if ((ptr = kmalloc(sizeof(DEVICE_RD_INFO), GFP_ATOMIC)) == NULL)
return NULL;
else {
memset(ptr,0,sizeof(DEVICE_RD_INFO));
return ptr;
}
}
*/
/*
typedef struct tagRDES0 {
WORD wResCount;
WORD wf1Owner ;
// WORD f15Reserved : 15;
// WORD f1Owner : 1;
} __attribute__ ((__packed__))
SRDES0;
*/
#ifdef __BIG_ENDIAN
typedef struct tagRDES0 {
volatile WORD wResCount;
union {
volatile U16 f15Reserved;
struct {
volatile U8 f8Reserved1;
volatile U8 f1Owner:1;
volatile U8 f7Reserved:7;
} __attribute__ ((__packed__));
} __attribute__ ((__packed__));
} __attribute__ ((__packed__))
SRDES0, *PSRDES0;
#else
typedef struct tagRDES0 {
WORD wResCount;
WORD f15Reserved : 15;
WORD f1Owner : 1;
} __attribute__ ((__packed__))
SRDES0;
#endif
typedef struct tagRDES1 {
WORD wReqCount;
WORD wReserved;
} __attribute__ ((__packed__))
SRDES1;
//
// Rx descriptor
//
typedef struct tagSRxDesc {
volatile SRDES0 m_rd0RD0;
volatile SRDES1 m_rd1RD1;
volatile U32 buff_addr;
volatile U32 next_desc;
struct tagSRxDesc *next;//4 bytes
volatile PDEVICE_RD_INFO pRDInfo;//4 bytes
volatile U32 Reserved[2];//8 bytes
} __attribute__ ((__packed__))
SRxDesc, DEF* PSRxDesc;
typedef const SRxDesc DEF* PCSRxDesc;
#ifdef __BIG_ENDIAN
/*
typedef struct tagTDES0 {
volatile BYTE byTSR0;
volatile BYTE byTSR1;
volatile WORD wOwner_Txtime;
// volatile WORD f15Txtime : 15;
// volatile WORD f1Owner:1;
} __attribute__ ((__packed__))
STDES0;
*/
typedef struct tagTDES0 {
volatile BYTE byTSR0;
volatile BYTE byTSR1;
union {
volatile U16 f15Txtime;
struct {
volatile U8 f8Reserved1;
volatile U8 f1Owner:1;
volatile U8 f7Reserved:7;
} __attribute__ ((__packed__));
} __attribute__ ((__packed__));
} __attribute__ ((__packed__))
STDES0, PSTDES0;
#else
typedef struct tagTDES0 {
volatile BYTE byTSR0;
volatile BYTE byTSR1;
volatile WORD f15Txtime : 15;
volatile WORD f1Owner:1;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -