prev_cmp_uarttest.map.qmsg

FPGA模拟UART

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74164 74164:inst70 " "Info: Elaborating entity \"74164\" for hierarchy \"74164:inst70\"" {  } { { "UartTest.bdf" "inst70" { Schematic "D:/TMP/UartTest/UartTest.bdf" { { 1448 616 736 1624 "inst70" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WGDFX_PROCESSING_LEGACY_SCHEMATIC_WITH_MAXPLUS_II_NAMING" "74164 " "Warning: Processing legacy GDF or BDF entity \"74164\" with Max+Plus II bus and instance naming rules" {  } { { "74164.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74164.bdf" { } } }  } 0 0 "Processing legacy GDF or BDF entity \"%1!s!\" with Max+Plus II bus and instance naming rules" 0 0 "" 0}
{ "Warning" "WGDFX_MIXED_DESIGN_FILE_NAMING" "" "Warning: The design contains mutiple Block Design Files, and some design file(s) are using a naming scheme which is different from other design file(s)." {  } { { "74164.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74164.bdf" { } } }  } 0 0 "The design contains mutiple Block Design Files, and some design file(s) are using a naming scheme which is different from other design file(s)." 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "74164:inst70 " "Info: Elaborated megafunction instantiation \"74164:inst70\"" {  } { { "UartTest.bdf" "" { Schematic "D:/TMP/UartTest/UartTest.bdf" { { 1448 616 736 1624 "inst70" "" } } } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/others/maxplus2/74377.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/others/maxplus2/74377.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 74377 " "Info: Found entity 1: 74377" {  } { { "74377.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74377.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74377 74377:inst54 " "Info: Elaborating entity \"74377\" for hierarchy \"74377:inst54\"" {  } { { "UartTest.bdf" "inst54" { Schematic "D:/TMP/UartTest/UartTest.bdf" { { 1736 656 760 1928 "inst54" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WGDFX_PROCESSING_LEGACY_SCHEMATIC_WITH_MAXPLUS_II_NAMING" "74377 " "Warning: Processing legacy GDF or BDF entity \"74377\" with Max+Plus II bus and instance naming rules" {  } { { "74377.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74377.bdf" { } } }  } 0 0 "Processing legacy GDF or BDF entity \"%1!s!\" with Max+Plus II bus and instance naming rules" 0 0 "" 0}
{ "Warning" "WGDFX_MIXED_DESIGN_FILE_NAMING" "" "Warning: The design contains mutiple Block Design Files, and some design file(s) are using a naming scheme which is different from other design file(s)." {  } { { "74377.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74377.bdf" { } } }  } 0 0 "The design contains mutiple Block Design Files, and some design file(s) are using a naming scheme which is different from other design file(s)." 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "74377:inst54 " "Info: Elaborated megafunction instantiation \"74377:inst54\"" {  } { { "UartTest.bdf" "" { Schematic "D:/TMP/UartTest/UartTest.bdf" { { 1736 656 760 1928 "inst54" "" } } } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "74165:inst7\|38 data_in GND " "Warning (14130): Reduced register \"74165:inst7\|38\" with stuck data_in port to stuck value GND" {  } { { "74165.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74165.bdf" { { 56 704 768 136 "38" "" } } } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "74165:inst7\|37 data_in GND " "Warning (14130): Reduced register \"74165:inst7\|37\" with stuck data_in port to stuck value GND" {  } { { "74165.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74165.bdf" { { 232 704 768 312 "37" "" } } } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "74165:inst7\|65 data_in GND " "Warning (14130): Reduced register \"74165:inst7\|65\" with stuck data_in port to stuck value GND" {  } { { "74165.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74165.bdf" { { 408 704 768 488 "65" "" } } } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "74165:inst7\|70 data_in GND " "Warning (14130): Reduced register \"74165:inst7\|70\" with stuck data_in port to stuck value GND" {  } { { "74165.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74165.bdf" { { 584 704 768 664 "70" "" } } } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "74165:inst7\|79 data_in GND " "Warning (14130): Reduced register \"74165:inst7\|79\" with stuck data_in port to stuck value GND" {  } { { "74165.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74165.bdf" { { 760 704 768 840 "79" "" } } } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "74165:inst7\|84 data_in GND " "Warning (14130): Reduced register \"74165:inst7\|84\" with stuck data_in port to stuck value GND" {  } { { "74165.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74165.bdf" { { 936 704 768 1016 "84" "" } } } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "74165:inst7\|93 data_in GND " "Warning (14130): Reduced register \"74165:inst7\|93\" with stuck data_in port to stuck value GND" {  } { { "74165.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74165.bdf" { { 1112 704 768 1192 "93" "" } } } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "IOPT_MLS_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "74165.bdf" "" { Schematic "c:/altera/72/quartus/libraries/others/maxplus2/74165.bdf" { { 1288 704 768 1368 "98" "" } } } }  } 0 0 "Registers with preset signals will power-up high" 0 0 "" 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "BaudRateMul4 " "Info: Promoted clock signal driven by pin \"BaudRateMul4\" to global clock signal" {  } {  } 0 0 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0 "" 0} { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLEAR" "nRecBegin " "Info: Promoted clear signal driven by pin \"nRecBegin\" to global clear signal" {  } {  } 0 0 "Promoted clear signal driven by pin \"%1!s!\" to global clear signal" 0 0 "" 0}  } {  } 0 0 "Promoted pin-driven signal(s) to global signal" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "66 " "Info: Implemented 66 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "13 " "Info: Implemented 13 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "11 " "Info: Implemented 11 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_MCELLS" "38 " "Info: Implemented 38 macrocells" {  } {  } 0 0 "Implemented %1!d! macrocells" 0 0 "" 0} { "Info" "ICUT_CUT_TM_SEXPS" "4 " "Info: Implemented 4 shareable expanders" {  } {  } 0 0 "Implemented %1!d! shareable expanders" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 24 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 24 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "162 " "Info: Allocated 162 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon Dec 08 12:27:52 2008 " "Info: Processing ended: Mon Dec 08 12:27:52 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}