📄 buck_fb.mdl
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PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
}
PropName "Components"
}
}
PropName "Components"
}
Name "Configuration"
SimulationMode "normal"
CurrentDlgPage "Solver"
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 1
}
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
BlockParameterDefaults {
Block {
BlockType BusCreator
Inputs "4"
DisplayOption "none"
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Clock
DisplayTime off
}
Block {
BlockType Constant
Value "1"
VectorParams1D on
OutDataTypeMode "Inherit from 'Constant value'"
OutDataType "sfix(16)"
ConRadixGroup "Use specified scaling"
OutScaling "2^0"
SampleTime "inf"
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Block {
BlockType Demux
Outputs "4"
DisplayOption "none"
BusSelectionMode off
}
Block {
BlockType From
IconDisplay "Tag"
}
Block {
BlockType Fcn
Expr "sin(u[1])"
SampleTime "-1"
}
Block {
BlockType Gain
Gain "1"
Multiplication "Element-wise(K.*u)"
ParameterDataTypeMode "Same as input"
ParameterDataType "sfix(16)"
ParameterScalingMode "Best Precision: Matrix-wise"
ParameterScaling "2^0"
OutDataTypeMode "Same as input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
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Block {
BlockType Goto
IconDisplay "Tag"
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Block {
BlockType SignalConversion
OverrideOpt off
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Block {
BlockType Inport
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
Interpolate on
}
Block {
BlockType Lookup
InputValues "[-4:5]"
OutputValues " rand(1,10)-0.5"
LookUpMeth "Interpolation-Extrapolation"
OutDataTypeMode "Same as input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
LUTDesignTableMode "Redesign Table"
LUTDesignDataSource "Block Dialog"
LUTDesignFunctionName "sqrt(x)"
LUTDesignUseExistingBP on
LUTDesignRelError "0.01"
LUTDesignAbsError "1e-6"
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType PMComponent
SubClassName "unknown"
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Block {
BlockType PMIOPort
}
Block {
BlockType Scope
Floating off
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "0"
}
Block {
BlockType "S-Function"
FunctionName "system"
PortCounts "[]"
SFunctionModules "''"
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
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Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
InputSameDT on
OutDataTypeMode "Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Terminator
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "buck_fb"
Location [2, 82, 1270, 977]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "94"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "C"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [731, 435, 759, 505]
Orientation "up"
NamePlacement "alternate"
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
Resistance "0"
Inductance "0"
Capacitance "5e-5"
Measurements "None"
}
Block {
BlockType Constant
Name "Constant"
Position [705, 625, 735, 655]
Orientation "left"
NamePlacement "alternate"
Value "8"
}
Block {
BlockType Constant
Name "Constant1"
Position [295, 210, 325, 240]
Orientation "left"
NamePlacement "alternate"
}
Block {
BlockType Constant
Name "Constant2"
Position [295, 340, 325, 370]
Orientation "left"
NamePlacement "alternate"
Value "0"
}
Block {
BlockType Reference
Name "Current Measurement"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [680, 358, 705, 382]
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "DC Voltage Source"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [420, 425, 440, 460]
Orientation "up"
SourceBlock "powerlib/Electrical\nSources/DC Voltage Source"
SourceType "DC Voltage Source"
ShowPortLabels on
Amplitude "20"
Measurements "None"
}
Block {
BlockType Reference
Name "Diode"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [545, 410, 585, 465]
Orientation "up"
SourceBlock "powerlib/Power\nElectronics/Diode"
SourceType "Diode"
ShowPortLabels on
Ron "0.001"
Lon "0"
Vf "0.8"
IC "0"
Rs "500"
Cs "250e-9"
Measurements off
}
Block {
BlockType Gain
Name "Gain"
Position [555, 625, 585, 655]
Orientation "left"
NamePlacement "alternate"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "Ground"
Ports [0, 0, 0, 0, 0, 1]
Position [639, 560, 661, 585]
Orientation "down"
ShowName off
SourceBlock "powerlib/Elements/Ground"
SourceType "Ground"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "a"
}
Block {
BlockType Reference
Name "Ideal Switch"
Ports [1, 1, 0, 0, 0, 1, 1]
Position [455, 275, 510, 315]
SourceBlock "powerlib/Power\nElectronics/Ideal Switch"
SourceType "Ideal Switch"
ShowPortLabels on
Ron "0.001"
Lon "0"
IC "0"
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