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📄 stb0899_init.c~

📁 DVB-S STB0899 source code
💻 C~
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			ChipAddField(hChip,RSTB0899_GPIO0CFG,FSTB0899_GPIO0_CONFIG,"GPIO0_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO0CFG,FSTB0899_GPIO0_XOR,"GPIO0_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO1CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO1CFG,"GPIO1CFG",0xf141,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO1CFG,FSTB0899_GPIO1_OPDRAIN,"GPIO1_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO1CFG,FSTB0899_GPIO1_CONFIG,"GPIO1_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO1CFG,FSTB0899_GPIO1_XOR,"GPIO1_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO2CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO2CFG,"GPIO2CFG",0xf142,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO2CFG,FSTB0899_GPIO2_OPDRAIN,"GPIO2_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO2CFG,FSTB0899_GPIO2_CONFIG,"GPIO2_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO2CFG,FSTB0899_GPIO2_XOR,"GPIO2_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO3CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO3CFG,"GPIO3CFG",0xf143,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO3CFG,FSTB0899_GPIO3_OPDRAIN,"GPIO3_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO3CFG,FSTB0899_GPIO3_CONFIG,"GPIO3_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO3CFG,FSTB0899_GPIO3_XOR,"GPIO3_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO4CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO4CFG,"GPIO4CFG",0xf144,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO4CFG,FSTB0899_GPIO4_OPDRAIN,"GPIO4_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO4CFG,FSTB0899_GPIO4_CONFIG,"GPIO4_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO4CFG,FSTB0899_GPIO4_XOR,"GPIO4_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO5CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO5CFG,"GPIO5CFG",0xf145,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO5CFG,FSTB0899_GPIO5_OPDRAIN,"GPIO5_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO5CFG,FSTB0899_GPIO5_CONFIG,"GPIO5_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO5CFG,FSTB0899_GPIO5_XOR,"GPIO5_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO6CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO6CFG,"GPIO6CFG",0xf146,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO6CFG,FSTB0899_GPIO6_OPDRAIN,"GPIO6_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO6CFG,FSTB0899_GPIO6_CONFIG,"GPIO6_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO6CFG,FSTB0899_GPIO6_XOR,"GPIO6_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO7CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO7CFG,"GPIO7CFG",0xf147,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO7CFG,FSTB0899_GPIO7_OPDRAIN,"GPIO7_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO7CFG,FSTB0899_GPIO7_CONFIG,"GPIO7_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO7CFG,FSTB0899_GPIO7_XOR,"GPIO7_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO8CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO8CFG,"GPIO8CFG",0xf148,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO8CFG,FSTB0899_GPIO8_OPDRAIN,"GPIO8_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO8CFG,FSTB0899_GPIO8_CONFIG,"GPIO8_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO8CFG,FSTB0899_GPIO8_XOR,"GPIO8_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO9CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO9CFG,"GPIO9CFG",0xf149,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO9CFG,FSTB0899_GPIO9_OPDRAIN,"GPIO9_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO9CFG,FSTB0899_GPIO9_CONFIG,"GPIO9_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO9CFG,FSTB0899_GPIO9_XOR,"GPIO9_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO10CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO10CFG,"GPIO10CFG",0xf14a,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO10CFG,FSTB0899_GPIO10_OPDRAIN,"GPIO10_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO10CFG,FSTB0899_GPIO10_CONFIG,"GPIO10_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO10CFG,FSTB0899_GPIO10_XOR,"GPIO10_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO11CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO11CFG,"GPIO11CFG",0xf14b,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO11CFG,FSTB0899_GPIO11_OPDRAIN,"GPIO11_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO11CFG,FSTB0899_GPIO11_CONFIG,"GPIO11_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO11CFG,FSTB0899_GPIO11_XOR,"GPIO11_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO12CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO12CFG,"GPIO12CFG",0xf14c,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO12CFG,FSTB0899_GPIO12_OPDRAIN,"GPIO12_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO12CFG,FSTB0899_GPIO12_CONFIG,"GPIO12_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO12CFG,FSTB0899_GPIO12_XOR,"GPIO12_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO13CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO13CFG,"GPIO13CFG",0xf14d,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO13CFG,FSTB0899_GPIO13_OPDRAIN,"GPIO13_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO13CFG,FSTB0899_GPIO13_CONFIG,"GPIO13_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO13CFG,FSTB0899_GPIO13_XOR,"GPIO13_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO14CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO14CFG,"GPIO14CFG",0xf14e,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO14CFG,FSTB0899_GPIO14_OPDRAIN,"GPIO14_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO14CFG,FSTB0899_GPIO14_CONFIG,"GPIO14_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO14CFG,FSTB0899_GPIO14_XOR,"GPIO14_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO15CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO15CFG,"GPIO15CFG",0xf14f,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO15CFG,FSTB0899_GPIO15_OPDRAIN,"GPIO15_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO15CFG,FSTB0899_GPIO15_CONFIG,"GPIO15_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO15CFG,FSTB0899_GPIO15_XOR,"GPIO15_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO16CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO16CFG,"GPIO16CFG",0xf150,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO16CFG,FSTB0899_GPIO16_OPDRAIN,"GPIO16_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO16CFG,FSTB0899_GPIO16_CONFIG,"GPIO16_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO16CFG,FSTB0899_GPIO16_XOR,"GPIO16_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO17CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO17CFG,"GPIO17CFG",0xf151,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO17CFG,FSTB0899_GPIO17_OPDRAIN,"GPIO17_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO17CFG,FSTB0899_GPIO17_CONFIG,"GPIO17_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO17CFG,FSTB0899_GPIO17_XOR,"GPIO17_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO18CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO18CFG,"GPIO18CFG",0xf152,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO18CFG,FSTB0899_GPIO18_OPDRAIN,"GPIO18_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO18CFG,FSTB0899_GPIO18_CONFIG,"GPIO18_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO18CFG,FSTB0899_GPIO18_XOR,"GPIO18_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO19CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO19CFG,"GPIO19CFG",0xf153,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO19CFG,FSTB0899_GPIO19_OPDRAIN,"GPIO19_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO19CFG,FSTB0899_GPIO19_CONFIG,"GPIO19_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO19CFG,FSTB0899_GPIO19_XOR,"GPIO19_XOR",0,1,CHIP_UNSIGNED);

			/*	GPIO20CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_GPIO20CFG,"GPIO20CFG",0xf154,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_GPIO20CFG,FSTB0899_GPIO20_OPDRAIN,"GPIO20_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO20CFG,FSTB0899_GPIO20_CONFIG,"GPIO20_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_GPIO20CFG,FSTB0899_GPIO20_XOR,"GPIO20_XOR",0,1,CHIP_UNSIGNED);

			/*	SDATCFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_SDATCFG,"SDATCFG",0xf155,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_SDATCFG,FSTB0899_SDAT_OPDRAIN,"SDAT_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_SDATCFG,FSTB0899_SDAT_CONFIG,"SDAT_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_SDATCFG,FSTB0899_SDAT_XOR,"SDAT_XOR",0,1,CHIP_UNSIGNED);

			/*	SCLTCFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_SCLTCFG,"SCLTCFG",0xf156,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_SCLTCFG,FSTB0899_SCLT_OPDRAIN,"SCLT_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_SCLTCFG,FSTB0899_SCLT_CONFIG,"SCLT_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_SCLTCFG,FSTB0899_SCLT_XOR,"SCLT_XOR",0,1,CHIP_UNSIGNED);

			/*	AGCRFCFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_AGCRFCFG,"AGCRFCFG",0xf157,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_AGCRFCFG,FSTB0899_AGCRF_OPDRAIN,"AGCRF_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_AGCRFCFG,FSTB0899_AGCRF_CONFIG,"AGCRF_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_AGCRFCFG,FSTB0899_AGCRF_XOR,"AGCRF_XOR",0,1,CHIP_UNSIGNED);

			/*	AGCBB2CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_AGCBB2CFG,"AGCBB2CFG",0xf158,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_AGCBB2CFG,FSTB0899_AGCBB2_OPDRAIN,"AGCBB2_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_AGCBB2CFG,FSTB0899_AGCBB2_CONFIG,"AGCBB2_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_AGCBB2CFG,FSTB0899_AGCBB2_XOR,"AGCBB2_XOR",0,1,CHIP_UNSIGNED);

			/*	AGCBB1CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_AGCBB1CFG,"AGCBB1CFG",0xf159,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_AGCBB1CFG,FSTB0899_AGCBB1_OPDRAIN,"AGCBB1_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_AGCBB1CFG,FSTB0899_AGCBB1_CONFIG,"AGCBB1_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_AGCBB1CFG,FSTB0899_AGCBB1_XOR,"AGCBB1_XOR",0,1,CHIP_UNSIGNED);

			/*	DIRCLKCFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_DIRCLKCFG,"DIRCLKCFG",0xf15a,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_DIRCLKCFG,FSTB0899_DIRCLK_OPDRAIN,"DIRCLK_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_DIRCLKCFG,FSTB0899_DIRCLK_CONFIG,"DIRCLK_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_DIRCLKCFG,FSTB0899_DIRCLK_XOR,"DIRCLK_XOR",0,1,CHIP_UNSIGNED);

			/*	CKOUT27CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_CKOUT27CFG,"CKOUT27CFG",0xf15b,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_CKOUT27CFG,FSTB0899_CKOUT27_OPDRAIN,"CKOUT27_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_CKOUT27CFG,FSTB0899_CKOUT27_CONFIG,"CKOUT27_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_CKOUT27CFG,FSTB0899_CKOUT27_XOR,"CKOUT27_XOR",0,1,CHIP_UNSIGNED);

			/*	STDBYCFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_STDBYCFG,"STDBYCFG",0xf15c,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_STDBYCFG,FSTB0899_STDBY_OPDRAIN,"STDBY_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_STDBYCFG,FSTB0899_STDBY_CONFIG,"STDBY_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_STDBYCFG,FSTB0899_STDBY_XOR,"STDBY_XOR",0,1,CHIP_UNSIGNED);

			/*	CS0CFG	*/
			ChipAddReg(hChip,STCHIP_REG_8,RSTB0899_CS0CFG,"CS0CFG",0xf15d,*DefVal++,STCHIP_ACCESS_WR,STCHIP_NOT_POINTED,0x0000,0x0);
			ChipAddField(hChip,RSTB0899_CS0CFG,FSTB0899_CS0_OPDRAIN,"CS0_OPDRAIN",7,1,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_CS0CFG,FSTB0899_CS0_CONFIG,"CS0_CONFIG",1,6,CHIP_UNSIGNED);
			ChipAddField(hChip,RSTB0899_CS0CFG,FSTB0899_CS0_XOR,"CS0_XOR",0,1,CHIP_UNSIGNED);
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