mpc8360erdk.h

uboot详细解读可用启动引导LINUX2.6内核

#define CFG_PCI1_IO_PHYS	0xE0300000
#define CFG_PCI1_IO_SIZE	0x100000 /* 1M */

#ifdef CONFIG_PCI

#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP		/* do pci plug-and-play */

#undef CONFIG_EEPRO100
#undef CONFIG_PCI_SCAN_SHOW	/* show pci devices on startup */
#define CFG_PCI_SUBSYS_VENDORID 0x1957	/* Freescale */

#endif	/* CONFIG_PCI */


#ifndef CONFIG_NET_MULTI
#define CONFIG_NET_MULTI	1
#endif

/*
 * QE UEC ethernet configuration
 */
#define CONFIG_UEC_ETH
#define CONFIG_ETHPRIME		"FSL UEC0"

#define CONFIG_UEC_ETH1		/* GETH1 */

#ifdef CONFIG_UEC_ETH1
#define CFG_UEC1_UCC_NUM	0	/* UCC1 */
#define CFG_UEC1_RX_CLK		QE_CLK_NONE
#define CFG_UEC1_TX_CLK		QE_CLK9
#define CFG_UEC1_ETH_TYPE	GIGA_ETH
#define CFG_UEC1_PHY_ADDR	2
#define CFG_UEC1_INTERFACE_MODE ENET_1000_RGMII_RXID
#endif

#define CONFIG_UEC_ETH2		/* GETH2 */

#ifdef CONFIG_UEC_ETH2
#define CFG_UEC2_UCC_NUM	1	/* UCC2 */
#define CFG_UEC2_RX_CLK		QE_CLK_NONE
#define CFG_UEC2_TX_CLK		QE_CLK4
#define CFG_UEC2_ETH_TYPE	GIGA_ETH
#define CFG_UEC2_PHY_ADDR	4
#define CFG_UEC2_INTERFACE_MODE ENET_1000_RGMII_RXID
#endif

/*
 * Environment
 */

#ifndef CFG_RAMBOOT
#define CFG_ENV_IS_IN_FLASH	1
#define CFG_ENV_ADDR		(CFG_MONITOR_BASE + 0x40000)
#define CFG_ENV_SECT_SIZE	0x20000 /* 128K(one sector) for env */
#define CFG_ENV_SIZE		0x20000
#else /* CFG_RAMBOOT */
#define CFG_NO_FLASH		1	/* Flash is not usable now */
#define CFG_ENV_IS_NOWHERE	1	/* Store ENV in memory only */
#define CFG_ENV_ADDR		(CFG_MONITOR_BASE - 0x1000)
#define CFG_ENV_SIZE		0x2000
#endif /* CFG_RAMBOOT */

#define CONFIG_LOADS_ECHO	1	/* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change */

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_PING
#define CONFIG_CMD_I2C
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP

#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
#endif

#if defined(CFG_RAMBOOT)
#undef CONFIG_CMD_ENV
#undef CONFIG_CMD_LOADS
#endif

#undef CONFIG_WATCHDOG		/* watchdog disabled */

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP		/* undef to save memory */
#define CFG_LOAD_ADDR		0x2000000 /* default load address */
#define CFG_PROMPT		"=> "	/* Monitor Command Prompt */

#if defined(CONFIG_CMD_KGDB)
	#define CFG_CBSIZE	1024 /* Console I/O Buffer Size */
#else
	#define CFG_CBSIZE	256 /* Console I/O Buffer Size */
#endif

#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS	16		/* max number of command args */
#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size */
#define CFG_HZ		1000		/* decrementer freq: 1ms ticks */

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CFG_BOOTMAPSZ		(8 << 20) /* Initial Memory map for Linux */

/*
 * Core HID Setup
 */
#define CFG_HID0_INIT		0x000000000
#define CFG_HID0_FINAL		HID0_ENABLE_MACHINE_CHECK
#define CFG_HID2		HID2_HBE

/*
 * MMU Setup
 */

#define CONFIG_HIGH_BATS	1	/* High BATs supported */

/* DDR: cache cacheable */
#define CFG_IBAT0L	(CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
#define CFG_IBAT0U	(CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
#define CFG_DBAT0L	CFG_IBAT0L
#define CFG_DBAT0U	CFG_IBAT0U

/* IMMRBAR & PCI IO: cache-inhibit and guarded */
#define CFG_IBAT1L	(CFG_IMMR | BATL_PP_10 | \
			BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
#define CFG_IBAT1U	(CFG_IMMR | BATU_BL_4M | BATU_VS | BATU_VP)
#define CFG_DBAT1L	CFG_IBAT1L
#define CFG_DBAT1U	CFG_IBAT1U

/* NAND: cache-inhibit and guarded */
#define CFG_IBAT2L	(CFG_NAND_BASE | BATL_PP_10 | BATL_CACHEINHIBIT |\
			 BATL_GUARDEDSTORAGE)
#define CFG_IBAT2U	(CFG_NAND_BASE | BATU_BL_64M | BATU_VS | BATU_VP)
#define CFG_DBAT2L	CFG_IBAT2L
#define CFG_DBAT2U	CFG_IBAT2U

/* FLASH: icache cacheable, but dcache-inhibit and guarded */
#define CFG_IBAT3L	(CFG_FLASH_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
#define CFG_IBAT3U	(CFG_FLASH_BASE | BATU_BL_32M | BATU_VS | BATU_VP)
#define CFG_DBAT3L	(CFG_FLASH_BASE | BATL_PP_10 | \
			 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
#define CFG_DBAT3U	CFG_IBAT3U

/* Stack in dcache: cacheable, no memory coherence */
#define CFG_IBAT4L	(CFG_INIT_RAM_ADDR | BATL_PP_10)
#define CFG_IBAT4U	(CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
#define CFG_DBAT4L	CFG_IBAT4L
#define CFG_DBAT4U	CFG_IBAT4U

#define CFG_IBAT5L	(CFG_VIDEO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | \
			 BATL_GUARDEDSTORAGE)
#define CFG_IBAT5U	(CFG_VIDEO_BASE | BATU_BL_64M | BATU_VS | BATU_VP)
#define CFG_DBAT5L	CFG_IBAT5L
#define CFG_DBAT5U	CFG_IBAT5U

#ifdef CONFIG_PCI
/* PCI MEM space: cacheable */
#define CFG_IBAT6L	(CFG_PCI1_MEM_PHYS | BATL_PP_10 | BATL_MEMCOHERENCE)
#define CFG_IBAT6U	(CFG_PCI1_MEM_PHYS | BATU_BL_256M | BATU_VS | BATU_VP)
#define CFG_DBAT6L	CFG_IBAT6L
#define CFG_DBAT6U	CFG_IBAT6U
/* PCI MMIO space: cache-inhibit and guarded */
#define CFG_IBAT7L	(CFG_PCI1_MMIO_PHYS | BATL_PP_10 | \
			 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
#define CFG_IBAT7U	(CFG_PCI1_MMIO_PHYS | BATU_BL_256M | BATU_VS | BATU_VP)
#define CFG_DBAT7L	CFG_IBAT7L
#define CFG_DBAT7U	CFG_IBAT7U
#else /* CONFIG_PCI */
#define CFG_IBAT6L	(0)
#define CFG_IBAT6U	(0)
#define CFG_IBAT7L	(0)
#define CFG_IBAT7U	(0)
#define CFG_DBAT6L	CFG_IBAT6L
#define CFG_DBAT6U	CFG_IBAT6U
#define CFG_DBAT7L	CFG_IBAT7L
#define CFG_DBAT7U	CFG_IBAT7U
#endif /* CONFIG_PCI */

/*
 * Internal Definitions
 *
 * Boot Flags
 */
#define BOOTFLAG_COLD	0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM	0x02 /* Software reboot */

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	230400	/* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
#endif

/*
 * Environment Configuration
 */
#define CONFIG_ENV_OVERWRITE

#if defined(CONFIG_UEC_ETH)
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
#define CONFIG_HAS_ETH2
#define CONFIG_HAS_ETH3
#define CONFIG_ETHADDR	00:04:9f:ef:01:01
#define CONFIG_ETH1ADDR	00:04:9f:ef:01:02
#define CONFIG_ETH2ADDR	00:04:9f:ef:01:03
#define CONFIG_ETH3ADDR	00:04:9f:ef:01:04
#endif

#define CONFIG_BAUDRATE 115200

#define CONFIG_LOADADDR	a00000
#define CONFIG_HOSTNAME	mpc8360erdk
#define CONFIG_BOOTFILE	uImage

#define CONFIG_IPADDR		10.0.0.99
#define CONFIG_SERVERIP		10.0.0.2
#define CONFIG_GATEWAYIP	10.0.0.2
#define CONFIG_NETMASK		255.255.255.0
#define CONFIG_ROOTPATH		/nfsroot/

#define	CONFIG_BOOTDELAY 2	/* -1 disables auto-boot */
#undef	CONFIG_BOOTARGS		/* the boot command will set bootargs */

#define CONFIG_EXTRA_ENV_SETTINGS \
   "netdev=eth0\0"\
   "consoledev=ttyS0\0"\
   "loadaddr=a00000\0"\
   "fdtaddr=900000\0"\
   "fdtfile=dtb\0"\
   "fsfile=fs\0"\
   "ubootfile=u-boot.bin\0"\
   "mtdparts=mtdparts=60000000.nand-flash:4096k(kernel),128k(dtb),-(rootfs)\0"\
   "setbootargs=setenv bootargs console=$consoledev,$baudrate "\
		"$mtdparts panic=1\0"\
   "adddhcpargs=setenv bootargs $bootargs ip=on\0"\
   "addnfsargs=setenv bootargs $bootargs ip=$ipaddr:$serverip:"\
		"$gatewayip:$netmask:$hostname:$netdev:off "\
		"root=/dev/nfs rw nfsroot=$serverip:$rootpath\0"\
   "addnandargs=setenv bootargs $bootargs root=/dev/mtdblock3 "\
		"rootfstype=jffs2 rw\0"\
   "tftp_get_uboot=tftp 100000 $ubootfile\0"\
   "tftp_get_kernel=tftp $loadaddr $bootfile\0"\
   "tftp_get_dtb=tftp $fdtaddr $fdtfile\0"\
   "tftp_get_fs=tftp c00000 $fsfile\0"\
   "nand_erase_kernel=nand erase 0 400000\0"\
   "nand_erase_dtb=nand erase 400000 20000\0"\
   "nand_erase_fs=nand erase 420000 3be0000\0"\
   "nand_write_kernel=nand write.jffs2 $loadaddr 0 400000\0"\
   "nand_write_dtb=nand write.jffs2 $fdtaddr 400000 20000\0"\
   "nand_write_fs=nand write.jffs2 c00000 420000 $filesize\0"\
   "nand_read_kernel=nand read.jffs2 $loadaddr 0 400000\0"\
   "nand_read_dtb=nand read.jffs2 $fdtaddr 400000 20000\0"\
   "nor_reflash=protect off ff800000 ff87ffff ; erase ff800000 ff87ffff ; "\
		"cp.b 100000 ff800000 $filesize\0"\
   "nand_reflash_kernel=run tftp_get_kernel nand_erase_kernel "\
		"nand_write_kernel\0"\
   "nand_reflash_dtb=run tftp_get_dtb nand_erase_dtb nand_write_dtb\0"\
   "nand_reflash_fs=run tftp_get_fs nand_erase_fs nand_write_fs\0"\
   "nand_reflash=run nand_reflash_kernel nand_reflash_dtb "\
		"nand_reflash_fs\0"\
   "boot_m=bootm $loadaddr - $fdtaddr\0"\
   "dhcpboot=dhcp ; run setbootargs adddhcpargs tftp_get_dtb boot_m\0"\
   "nfsboot=run setbootargs addnfsargs tftp_get_kernel tftp_get_dtb "\
		"boot_m\0"\
   "nandboot=run setbootargs addnandargs nand_read_kernel nand_read_dtb "\
		"boot_m\0"\
   ""

#define CONFIG_BOOTCOMMAND "run dhcpboot"

#endif /* __CONFIG_H */