readme.m54455evb

uboot详细解读可用启动引导LINUX2.6内核

Freescale MCF54455EVB ColdFire Development Board
================================================

TsiChung Liew([e-mail])
Created 4/08/07
===========================================


Changed files:
==============

- board/freescale/m54455evb/m54455evb.c	Dram setup, IDE pre init, and PCI init
- board/freescale/m54455evb/flash.c		Atmel and INTEL flash support
- board/freescale/m54455evb/Makefile		Makefile
- board/freescale/m54455evb/config.mk	config make
- board/freescale/m54455evb/u-boot.lds	Linker description

- common/cmd_bdinfo.c		Clock frequencies output
- common/cmd_mii.c		mii support

- cpu/mcf5445x/cpu.c		cpu specific code
- cpu/mcf5445x/cpu_init.c	Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
- cpu/mcf5445x/interrupts.c	cpu specific interrupt support
- cpu/mcf5445x/speed.c		system, pci, flexbus, and cpu clock
- cpu/mcf5445x/Makefile		Makefile
- cpu/mcf5445x/config.mk	config make
- cpu/mcf5445x/start.S		start up assembly code

- doc/README.m54455evb	This readme file

- drivers/net/mcffec.c		ColdFire common FEC driver
- drivers/serial/mcfuart.c	ColdFire common UART driver

- include/asm-m68k/bitops.h		Bit operation function export
- include/asm-m68k/byteorder.h		Byte order functions
- include/asm-m68k/fec.h		FEC structure and definition
- include/asm-m68k/fsl_i2c.h		I2C structure and definition
- include/asm-m68k/global_data.h	Global data structure
- include/asm-m68k/immap.h		ColdFire specific header file and driver macros
- include/asm-m68k/immap_5445x.h	mcf5445x specific header file
- include/asm-m68k/io.h			io functions
- include/asm-m68k/m5445x.h		mcf5445x specific header file
- include/asm-m68k/posix_types.h	Posix
- include/asm-m68k/processor.h		header file
- include/asm-m68k/ptrace.h		Exception structure
- include/asm-m68k/rtc.h		Realtime clock header file
- include/asm-m68k/string.h		String function export
- include/asm-m68k/timer.h		Timer structure and definition
- include/asm-m68k/types.h		Data types definition
- include/asm-m68k/uart.h		Uart structure and definition
- include/asm-m68k/u-boot.h		u-boot structure

- include/configs/M54455EVB.h	Board specific configuration file

- lib_m68k/board.c			board init function
- lib_m68k/cache.c
- lib_m68k/interrupts			Coldfire common interrupt functions
- lib_m68k/m68k_linux.c
- lib_m68k/time.c			Timer functions (Dma timer and PIT)
- lib_m68k/traps.c			Exception init code

- rtc/mcfrtc.c				Realtime clock Driver

1 MCF5445x specific Options/Settings
====================================
1.1 pre-loader is no longer suppoer in thie coldfire family

1.2 Configuration settings for M54455EVB Development Board
CONFIG_MCF5445x		-- define for all MCF5445x CPUs
CONFIG_M54455		-- define for all Freescale MCF54455 CPUs
CONFIG_M54455EVB	-- define for M54455EVB board

CONFIG_MCFUART		-- define to use common CF Uart driver
CFG_UART_PORT		-- define UART port number, start with 0, 1 and 2
CONFIG_BAUDRATE		-- define UART baudrate

CONFIG_MCFRTC		-- define to use common CF RTC driver
CFG_MCFRTC_BASE		-- provide base address for RTC in immap.h
CFG_RTC_OSCILLATOR	-- define RTC clock frequency
RTC_DEBUG		-- define to show RTC debug message
CONFIG_CMD_DATE		-- enable to use date feature in u-boot

CONFIG_MCFFEC		-- define to use common CF FEC driver
CONFIG_NET_MULTI	-- define to use multi FEC in u-boot
CONFIG_MII		-- enable to use MII driver
CONFIG_CF_DOMII		-- enable to use MII feature in cmd_mii.c
CFG_DISCOVER_PHY	-- enable PHY discovery
CFG_RX_ETH_BUFFER	-- Set FEC Receive buffer
CFG_FAULT_ECHO_LINK_DOWN--
CFG_FEC0_PINMUX		-- Set FEC0 Pin configuration
CFG_FEC1_PINMUX		-- Set FEC1 Pin configuration
CFG_FEC0_MIIBASE	-- Set FEC0 MII base register
CFG_FEC1_MIIBASE	-- Set FEC0 MII base register
MCFFEC_TOUT_LOOP	-- set FEC timeout loop
CONFIG_HAS_ETH1		-- define to enable second FEC in u-boot

CONFIG_ISO_PARTITION	-- enable ISO read/write
CONFIG_DOS_PARTITION	-- enable DOS read/write
CONFIG_IDE_RESET	-- define ide_reset()
CONFIG_IDE_PREINIT	-- define ide_preinit()
CONFIG_ATAPI		-- define ATAPI support
CONFIG_LBA48		-- define LBA48 (larger than 120GB) support
CFG_IDE_MAXBUS		-- define max channel
CFG_IDE_MAXDEVICE	-- define max devices per channel
CFG_ATA_BASE_ADDR	-- define ATA base address
CFG_ATA_IDE0_OFFSET	-- define ATA IDE0 offset
CFG_ATA_DATA_OFFSET	-- define ATA data IO
CFG_ATA_REG_OFFSET	-- define for normal register accesses
CFG_ATA_ALT_OFFSET	-- define for alternate registers
CFG_ATA_STRIDE		-- define for Interval between registers
_IO_BASE		-- define for IO base address

CONFIG_MCFTMR		-- define to use DMA timer
CONFIG_MCFPIT		-- define to use PIT timer

CONFIG_FSL_I2C		-- define to use FSL common I2C driver
CONFIG_HARD_I2C		-- define for I2C hardware support
CONFIG_SOFT_I2C		-- define for I2C bit-banged
CFG_I2C_SPEED		-- define for I2C speed
CFG_I2C_SLAVE		-- define for I2C slave address
CFG_I2C_OFFSET		-- define for I2C base address offset
CFG_IMMR		-- define for MBAR offset

CONFIG_PCI              -- define for PCI support
CONFIG_PCI_PNP          -- define for Plug n play support
CFG_PCI_MEM_BUS		-- PCI memory logical offset
CFG_PCI_MEM_PHYS	-- PCI memory physical offset
CFG_PCI_MEM_SIZE	-- PCI memory size
CFG_PCI_IO_BUS		-- PCI IO logical offset
CFG_PCI_IO_PHYS		-- PCI IO physical offset
CFG_PCI_IO_SIZE		-- PCI IO size
CFG_PCI_CFG_BUS		-- PCI Configuration logical offset
CFG_PCI_CFG_PHYS	-- PCI Configuration physical offset
CFG_PCI_CFG_SIZE	-- PCI Configuration size

CONFIG_EXTRA_CLOCK	-- Enable extra clock such as vco, flexbus, pci, etc

CFG_MBAR		-- define MBAR offset

CFG_ATMEL_BOOT		-- To determine the u-boot is booted from Atmel or Intel

CONFIG_MONITOR_IS_IN_RAM -- Not support

CFG_INIT_RAM_ADDR	-- defines the base address of the MCF54455 internal SRAM

CFG_CSn_BASE	-- defines the Chip Select Base register
CFG_CSn_MASK	-- defines the Chip Select Mask register
CFG_CSn_CTRL	-- defines the Chip Select Control register

CFG_ATMEL_BASE	-- defines the Atmel Flash base
CFG_INTEL_BASE	-- defines the Intel Flash base

CFG_SDRAM_BASE	-- defines the DRAM Base
CFG_SDRAM_BASE1	-- defines the DRAM Base 1

2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
===========================================
2.1. System memory map:
	Flash:		0x00000000-0x3FFFFFFF (1024MB)
	DDR:		0x40000000-0x7FFFFFFF (1024MB)
	SRAM:		0x80000000-0x8FFFFFFF (256MB)
	ATA:		0x90000000-0x9FFFFFFF (256MB)
	PCI:		0xA0000000-0xBFFFFFFF (512MB)
	FlexBus:	0xC0000000-0xDFFFFFFF (512MB)
	IP:		0xF0000000-0xFFFFFFFF (256MB)

2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and
	linux kernel, you can customize it based on your system requirements:
	Atmel boot:
	Flash0:		0x00000000-0x0007FFFF (512KB)
	Flash1:		0x04000000-0x05FFFFFF (32MB)
	Intel boot:
	Flash0:		0x00000000-0x01FFFFFF (32MB)
	Flash1:		0x04000000-0x0407FFFF (512KB)

	CPLD:		0x08000000-0x08FFFFFF (16MB)
	FPGA:		0x09000000-0x09FFFFFF (16MB)
	DDR:		0x40000000-0x4FFFFFFF (256MB)
	SRAM:		0x80000000-0x80007FFF (32KB)
	IP:		0xFC000000-0xFC0FFFFF (64KB)

3. SWITCH SETTINGS
==================
3.1 SW1 Pin3: 0 - Boot from Atmel or 1 - INTEL
	SW1 Pin4: 0 - ULPI chip not in reset state or 1 - ULPI chip in reset state
	SW1 Pin5: 0 - Full ATA Bus enabled, FEC Phy1 powered down
			  1 - Upper 8 bits ATA data bus disabled, FEC PHY1 active
	SW1 Pin6: 0 - FEC Phy0 active or 1 - FEC Phy0 powered down
	SW1 Pin3: 0 - Boot from Atmel or 1 - INTEL

4. COMPILATION
==============
4.1	To create U-Boot the gcc-4.1-32 compiler set (ColdFire ELF version)
from codesourcery.com was used. Download it from:
http://www.codesourcery.com/gnu_toolchains/coldfire/download.html

4.2 Compilation
   export CROSS_COMPILE=cross-compile-prefix
   cd u-boot-1.x.x
   make distclean
   make M54455EVB_config, or		- default to atmel 33Mhz input clock
   make M54455EVB_atmel_config, or	- default to atmel 33Mhz input clock
   make M54455EVB_a33_config, or	- default to atmel 33Mhz input clock
   make M54455EVB_a66_config, or	- default to atmel 66Mhz input clock
   make M54455EVB_intel_config, or	- default to intel 33Mhz input clock
   make M54455EVB_i33_config, or	- default to intel 33Mhz input clock
   make M54455EVB_i66_config, or	- default to intel 66Mhz input clock
   make