cpu_a.lst

keil编译器下uocs在lpc2214上的移植

ARM Macro Assembler    Page 1 


    1 00000000         ;*******************************************************
                       *************************************************
    2 00000000         ;                                               uC/CPU
    3 00000000         ;                                    CPU CONFIGURATION &
                        PORT LAYER
    4 00000000         ;
    5 00000000         ;                          (c) Copyright 2004-2007; Micr
                       ium, Inc.; Weston, FL
    6 00000000         ;
    7 00000000         ;               All rights reserved.  Protected by inter
                       national copyright laws.
    8 00000000         ;
    9 00000000         ;               uC/CPU is provided in source form for FR
                       EE evaluation, for educational
   10 00000000         ;               use or peaceful research.  If you plan o
                       n using uC/CPU in a commercial
   11 00000000         ;               product you need to contact Micrium to p
                       roperly license its use in your
   12 00000000         ;               product.  We provide ALL the source code
                        for your convenience and to
   13 00000000         ;               help you experience uC/CPU.  The fact th
                       at the source code is provided
   14 00000000         ;               does NOT mean that you can use it withou
                       t paying a licensing fee.
   15 00000000         ;
   16 00000000         ;               Knowledge of the source code may NOT be 
                       used to develop a similar product.
   17 00000000         ;
   18 00000000         ;               Please help us continue to provide the E
                       mbedded community with the finest
   19 00000000         ;               software available.  Your honesty is gre
                       atly appreciated.
   20 00000000         ;*******************************************************
                       *************************************************
   21 00000000         
   22 00000000         ;*******************************************************
                       *************************************************
   23 00000000         ;
   24 00000000         ;                                            CPU PORT FI
                       LE
   25 00000000         ;
   26 00000000         ;                                                ARM
   27 00000000         ;                                      RealView Developm
                       ent Suite
   28 00000000         ;                            RealView Microcontroller De
                       velopment Kit (MDK)
   29 00000000         ;                                       ARM Developer Su
                       ite (ADS)
   30 00000000         ;                                            Keil uVisio
                       n
   31 00000000         ;
   32 00000000         ; Filename      : cpu_a.s
   33 00000000         ; Version       : V1.17
   34 00000000         ; Programmer(s) : BAN
   35 00000000         ;*******************************************************
                       *************************************************
   36 00000000         
   37 00000000         
   38 00000000         ;*******************************************************



ARM Macro Assembler    Page 2 


                       *************************************************
   39 00000000         ;                                           PUBLIC FUNCT
                       IONS
   40 00000000         ;*******************************************************
                       *************************************************
   41 00000000         
   42 00000000                 EXPORT           CPU_SR_Save
   43 00000000                 EXPORT           CPU_SR_Restore
   44 00000000         
   45 00000000         
   46 00000000         ;*******************************************************
                       *************************************************
   47 00000000         ;                                                EQUATES
                       
   48 00000000         ;*******************************************************
                       *************************************************
   49 00000000         
   50 00000000 000000C0 
                       CPU_ARM_CTRL_INT_DIS
                               EQU              0xC0        ; Disable both FIQ 
                                                            & IRQ
   51 00000000         
   52 00000000         
   53 00000000         ;*******************************************************
                       *************************************************
   54 00000000         ;                                      CODE GENERATION D
                       IRECTIVES
   55 00000000         ;*******************************************************
                       *************************************************
   56 00000000         
   57 00000000                 AREA             _CPU_A_CODE_, CODE, READONLY
   58 00000000                 ARM
   59 00000000         
   60 00000000         
   61 00000000         ;$PAGE
   62 00000000         ;*******************************************************
                       *************************************************
   63 00000000         ;                                      CRITICAL SECTION 
                       FUNCTIONS
   64 00000000         ;
   65 00000000         ; Description : Disable/Enable interrupts by preserving 
                       the state of interrupts.  Generally speaking, the 
   66 00000000         ;               state of the interrupt disable flag is s
                       tored in the local variable 'cpu_sr' & interrupts
   67 00000000         ;               are then disabled ('cpu_sr' is allocated
                        in all functions that need to disable interrupts).
   68 00000000         ;               The previous interrupt state is restored
                        by copying 'cpu_sr' into the CPU's status register.
   69 00000000         ;    开关中断要保留中断的状态，一般的说开关中断的标志位