ocdprogtck.vhd

AVR IP core writen in VHDL. It is beta version, working even with AVR studio

begin
 if(TCK='1' and TCK'event)  then  -- Clock(rising edge) ???
  if(CurrentTAPState=CaptureDR)then -- Clear
   VFPCnt <= (others => '0');
  elsif(CurrentTAPState=ShiftDR and
	   (InstructionRg=C_PROG_PAGELOAD or InstructionRg=C_PROG_PAGEREAD)and 
	   (FlashWr_St='1' or FlashRd_St='1')) then  -- Was : FlashWr_St='1' only
   VFPCnt <= VFPCnt+1; -- Increment
  end if;
 end if;
end process;	


VFPWrControl:process(TCK)
begin
if(TCK='1' and TCK'event)  then  -- Clock(rising edge) ???
 if(CurrentTAPState=CaptureDR)then -- Clear
  LdDataLow  <= '0';
  LdDataHigh <= '0';
  FlashAdrIncrEn <= '0';
 elsif(CurrentTAPState=ShiftDR and InstructionRg=C_PROG_PAGELOAD and FlashWr_St='1') then  -- Page Load
	   
  if(VFPCnt=x"7") then  
   LdDataLow  <= '1';
  else 
   LdDataLow  <= '0';
  end if;
  
  if(VFPCnt=x"F") then  
   LdDataHigh  <= '1';
  else 
   LdDataHigh  <= '0';
  end if;
  
  if(LdDataHigh='1') then -- !!!TBD!!!
   FlashAdrIncrEn <= '1';
  end if;
  
 end if;
end if;
end process;	


VFPRdControl:process(TCK)
begin
if(TCK='1' and TCK'event)  then  -- Clock(rising edge)
 if(CurrentTAPState=CaptureDR)then -- Clear
  FlRdMStart <= '0';
 elsif(CurrentTAPState=ShiftDR and InstructionRg=C_PROG_PAGEREAD and FlashRd_St='1') then  -- Page Read
  if(VFPCnt=x"1") then
   FlRdMStart <= '1';
  else  
   FlRdMStart <= '0';	  
  end if; 
 end if;
end if;
end process;	


LatchWriteData:process(TCK)
begin
if(TCK='0' and TCK'event)  then  -- Clock(falling edge) ???
 if(CurrentTAPState=UpdateDR and InstructionRg=C_PROG_COMMANDS and 
	FlashWr_St='1' and PCRSh=C_Prg_2F_2) then 
  LatchWrData <= '1';
 else 
  LatchWrData  <= '0'; 
 end if;
end if;
end process;	

-- EEPROM
EEPROMWrRdCtrl:process(TCK)
begin
if(TCK='1' and TCK'event)  then  -- Clock(rising edge) ???
 if(CurrentTAPState=CaptureDR)then -- Clear
  EEWrStart_Int <= '0';
 elsif(CurrentTAPState=UpdateDR and InstructionRg=C_PROG_COMMANDS and EEPROMWr_St='1' and PCRSh=C_Prg_4E_2) then  -- EEPROM Write
  EEWrStart_Int <= '1';
 else  
  EEWrStart_Int <= '0';	 
 end if;

 if(CurrentTAPState=CaptureDR)then -- Clear
  EERdStart_Int <= '0';
 elsif(CurrentTAPState=UpdateDR and InstructionRg=C_PROG_COMMANDS and EEPROMRd_St='1' and PCRSh(14 downto 8)=C_Prg_5D_1) then  -- EEPROM Read ! was C_Prg_5D_2
  EERdStart_Int <= '1';
 else  
  EERdStart_Int <= '0';	 
 end if; 
 
end if;
end process;	


-- Flash single beat operations (Write/Read)
FlashSingleWrRdCtrl:process(TCK)
begin
if(TCK='1' and TCK'event)  then  -- Clock(rising edge) ???
 if(CurrentTAPState=CaptureDR)then 
  FlWrSStart <= '0';
 elsif(CurrentTAPState=UpdateDR and InstructionRg=C_PROG_COMMANDS and FlashWr_St='1' and PCRSh=C_Prg_2F_2) then  -- Flash write (single)
  FlWrSStart <= '1';
 else  
  FlWrSStart <= '0';	 
 end if;

 if(CurrentTAPState=CaptureDR)then
  FlRdSStart <= '0';
 elsif(CurrentTAPState=UpdateDR and InstructionRg=C_PROG_COMMANDS and FlashRd_St='1' and PCRSh=C_Prg_3D_1) then  -- Flash read (single)
  FlRdSStart <= '1';
 else  
  FlRdSStart <= '0';	 
 end if; 
 
end if;
end process;	


-- Address register
FlashProgrammerAdrReg:process(TCK)
begin
if(TCK='0' and TCK'event)  then  -- Clock(falling edge) like udate reg ???
 if(CurrentTAPState=UpdateDR and InstructionRg=C_PROG_COMMANDS) then 
  if(PCRSh(14 downto 8)="0000011") then -- Load Address Low Byte(2c,3c,4c,5c,9b,10b)	   
   FlEEPrgAdr_Int(7 downto 0) <= PCRSh(7 downto 0); 
  elsif(PCRSh(14 downto 8)="0000111")then -- Load Address High Byte(2b,3b,4b,5b)
   FlEEPrgAdr_Int(15 downto 8) <= PCRSh(7 downto 0);
  end if;
 elsif(((CurrentTAPState=ShiftDR or CurrentTAPState=Exit1DR)and 
	   InstructionRg=C_PROG_PAGELOAD and LdDataHigh='1' and FlashAdrIncrEn='1')or  -- Write "Flash"
       (CurrentTAPState=ShiftDR and InstructionRg=C_PROG_PAGEREAD and FlashRd_St='1' and VFPCnt=x"E")) then  -- Read "Flash"
  -- Increment address counter
  FlEEPrgAdr_Int(CPageAdrCntLength-1 downto 0)<=FlEEPrgAdr_Int(CPageAdrCntLength-1 downto 0)+1;  
 end if;
end if;
end process;	


-- Data register
FlashProgrammerDataReg:process(TCK)
begin
if(TCK='0' and TCK'event)  then  -- Clock(falling edge) like udate reg ???
 if(CurrentTAPState=UpdateDR and InstructionRg=C_PROG_COMMANDS) then 
  if(PCRSh(14 downto 8)="0010011") then -- Load Data Low Byte(2d,4d,6b,6e,6h,7b) 
   FlEEPrgWrData(7 downto 0) <= PCRSh(7 downto 0); 
  elsif(PCRSh(14 downto 8)="0010111") then -- Load Data High Byte(2e) 
   FlEEPrgWrData(15 downto 8) <= PCRSh(7 downto 0); 
  end if;  
 elsif((CurrentTAPState=ShiftDR or CurrentTAPState=Exit1DR)and (InstructionRg=C_PROG_PAGELOAD)) then
  if(LdDataLow='1') then -- Load Data Low Byte(from the Virtual Flash Page Load Register) 
   FlEEPrgWrData(7 downto 0) <= VFPLSh; 
  elsif(LdDataHigh='1') then -- Load Data High Byte(from the Virtual Flash Page Load Register) 
   FlEEPrgWrData(15 downto 8) <= VFPLSh; 
  end if;  
 end if; 
end if;
end process;	


-- Programmer State Machines
EraseSMRg:process(TCK,TRSTn)
begin
if(TRSTn='0') then                 -- Reset (!!!TBD!!!)
 ChipEraseSM_CurrentState <= ChipEraseSMStIdle;
elsif(TCK='1' and TCK'event)  then  -- Clock(rising edge)
 if (CurrentTAPState=TestLogicReset) then -- Test-Logic-Reset state 
  ChipEraseSM_CurrentState <= ChipEraseSMStIdle;
 elsif(CurrentTAPState=UpdateDR and InstructionRg=C_PROG_COMMANDS) then
  ChipEraseSM_CurrentState <= ChipEraseSM_NextState; 
 end if; 
end if;
end process;	


-- Programmer State Machines
ChipEraseStartDFF:process(TCK,TRSTn)
begin
 if(TRSTn='0') then                 -- Reset (!!!TBD!!!)
  ChipEraseStart <= '0';
 elsif(TCK='1' and TCK'event)  then  -- Clock(rising edge)
  if(CurrentTAPState=UpdateDR and InstructionRg=C_PROG_COMMANDS and PCRSh=C_Prg_1A_1 and ProgEnable_Int='1') then	 
   ChipEraseStart <= '1';
  else 
   ChipEraseStart <= '0';	  
  end if;	   
 end if;
end process;	


EraseSMComb:process(ChipEraseSM_CurrentState,PCRUd,ChipEraseDone,ProgEnable_Int) -- Combinatorial
begin
 case ChipEraseSM_CurrentState is
  when ChipEraseSMStIdle => 
   if(PCRUd=C_Prg_1A_1 and ProgEnable_Int='1') then
	ChipEraseSM_NextState <= ChipEraseSMSt1; 
   else
	ChipEraseSM_NextState <= ChipEraseSMStIdle;   
   end if;
   when ChipEraseSMSt1 => 
   if(PCRUd=C_Prg_1A_2) then
	ChipEraseSM_NextState <= ChipEraseSMSt2;
   else 
	ChipEraseSM_NextState <= ChipEraseSMStIdle; -- Leaving Erase Mode
   end if;
  when ChipEraseSMSt2 =>
   if(PCRUd=C_Prg_1A_3) then
	ChipEraseSM_NextState <= ChipEraseSMSt3;  
   else 
	ChipEraseSM_NextState <= ChipEraseSMStIdle; -- Leaving Erase Mode	 
   end if;
  when ChipEraseSMSt3 => 
   if(ChipEraseDone='1') then
	ChipEraseSM_NextState <= ChipEraseSMStIdle;
   else
	ChipEraseSM_NextState <= ChipEraseSMSt3;   
   end if;
  when others => ChipEraseSM_NextState <= ChipEraseSMStIdle; 	 
 end case;
end process;	


ProgSMsRegs:process(TCK,TRSTn)
begin
if(TRSTn='0') then                 -- Reset (!!!TBD!!!)
 FlashWr_St      <= '0';
 FlashRd_St      <= '0';
 EEPROMWr_St     <= '0';
 EEPROMRd_St     <= '0';
 FuseWr_St       <= '0';
 LockWr_St       <= '0';
 FuseLockRd_St   <= '0';
 SignByteRd_St   <= '0';
 LoadNOP_St      <= '0';
elsif(TCK='1' and TCK'event)  then  -- Clock(rising edge)
 if(CurrentTAPState=TestLogicReset)then 
  FlashWr_St     <= '0';
  FlashRd_St     <= '0';
  EEPROMWr_St    <= '0';
  EEPROMRd_St    <= '0';
  FuseWr_St      <= '0';
  LockWr_St      <= '0';
  FuseLockRd_St  <= '0';
  SignByteRd_St  <= '0';
  LoadNOP_St     <= '0';  
 elsif(CurrentTAPState=UpdateDR and InstructionRg=C_PROG_COMMANDS) then
  case FlashWr_St is
   when '0' =>
    if(PCRUd=C_Prg_2A and ProgEnable_Int='1')then
     FlashWr_St <= '1';
    end if; 	   
   when '1' =>
    if(PCRUd(14 downto 8)=C_Prg_2A(14 downto 8) and PCRUd(7 downto 0)/=C_Prg_2A(7 downto 0))then
     FlashWr_St <= '0';
	end if; 	
   when others => null;
  end case;	  

  case FlashRd_St is
   when '0' =>
    if(PCRUd=C_Prg_3A and ProgEnable_Int='1')then
     FlashRd_St <= '1';
    end if; 	   
   when '1' =>
    if(PCRUd(14 downto 8)=C_Prg_3A(14 downto 8) and PCRUd(7 downto 0)/=C_Prg_3A(7 downto 0))then
     FlashRd_St <= '0';
	end if; 	
   when others => null;
  end case;	    

  case EEPROMWr_St is
   when '0' =>
    if(PCRUd=C_Prg_4A and ProgEnable_Int='1')then
     EEPROMWr_St <= '1';
    end if; 	   
   when '1' =>
    if(PCRUd(14 downto 8)=C_Prg_4A(14 downto 8) and PCRUd(7 downto 0)/=C_Prg_4A(7 downto 0))then
     EEPROMWr_St <= '0';
	end if; 	
   when others => null;
  end case;	      

  case EEPROMRd_St is
   when '0' =>
    if(PCRUd=C_Prg_5A and ProgEnable_Int='1')then
     EEPROMRd_St <= '1';
    end if; 	   
   when '1' =>
    if(PCRUd(14 downto 8)=C_Prg_5A(14 downto 8) and PCRUd(7 downto 0)/=C_Prg_5A(7 downto 0))then
     EEPROMRd_St <= '0';
	end if; 	
   when others => null;
  end case;	        

  case FuseWr_St is
   when '0' =>
    if(PCRUd=C_Prg_6A and ProgEnable_Int='1')then
     FuseWr_St <= '1';
    end if; 	   
   when '1' =>
    if(PCRUd(14 downto 8)=C_Prg_6A(14 downto 8) and PCRUd(7 downto 0)/=C_Prg_6A(7 downto 0))then
     FuseWr_St <= '0';
	end if; 	
   when others => null;
  end case;	          

  case LockWr_St is
   when '0' =>
    if(PCRUd=C_Prg_7A and ProgEnable_Int='1')then
     LockWr_St <= '1';
    end if; 	   
   when '1' =>
    if(PCRUd(14 downto 8)=C_Prg_7A(14 downto 8) and PCRUd(7 downto 0)/=C_Prg_7A(7 downto 0))then
     LockWr_St <= '0';
	end if; 	
   when others => null;
  end case;	            
  
  case FuseLockRd_St is
   when '0' =>
    if(PCRUd=C_Prg_8A and ProgEnable_Int='1')then
     FuseLockRd_St <= '1';
    end if; 	   
   when '1' =>
    if(PCRUd(14 downto 8)=C_Prg_8A(14 downto 8) and PCRUd(7 downto 0)/=C_Prg_8A(7 downto 0))then
     FuseLockRd_St <= '0';
	end if; 	
   when others => null;
  end case;	          
  
  case SignByteRd_St is
   when '0' =>
    if(PCRUd=C_Prg_9A and ProgEnable_Int='1')then
     SignByteRd_St <= '1';
    end if; 	   
   when '1' =>
    if(PCRUd(14 downto 8)=C_Prg_9A(14 downto 8) and PCRUd(7 downto 0)/=C_Prg_9A(7 downto 0))then
     SignByteRd_St <= '0';
	end if; 	
   when others => null;
  end case;	            
  
  case LoadNOP_St is
   when '0' =>
    if(PCRUd=C_Prg_11A_1 and ProgEnable_Int='1')then
     LoadNOP_St <= '1';
    end if; 	   
   when '1' =>
    if(PCRUd(14 downto 8)=C_Prg_11A_1(14 downto 8) and PCRUd(7 downto 0)/=C_Prg_11A_1(7 downto 0))then
     LoadNOP_St <= '0';
	end if; 	
   when others => null;
  end case;	              
  
 end if;	 
end if;
end process;		

TAPResetFlag:process(TCK,TRSTn)
begin
if(TRSTn='0') then                 -- Reset (!!!TBD!!!)
 TAPCtrlTLR <= '1'; 	
elsif(TCK='1' and TCK'event)  then  -- Clock(rising edge)	
 if((CurrentTAPState=SelectIRScan and TMS='1')or(CurrentTAPState=TestLogicReset and TMS='0'))then 
  TAPCtrlTLR <= '1';
 else  
  TAPCtrlTLR <= '0';
 end if;	 
end if;
end process;
 
-- *************************** End of programmer part *******************************

-- Outputs
FlEEPrgAdr <= FlEEPrgAdr_Int;

FlWrMStart <= LdDataHigh;

ProgEnable <= ProgEnable_Int;

end RTL;