tonecfg_c.c

給 DSK5510 DIP LED AIC23

/*   Do *not* directly modify this file.  It was    */
/*   generated by the Configuration Tool; any  */
/*   changes risk being overwritten.                */

/* INPUT tone.cdb */

/*  Include Header File  */
#include "tonecfg.h"


#pragma CODE_SECTION(CSL_cfgInit,".text:CSL_cfgInit")

/*  Config Structures */
EMIF_Config emifCfg0 = {
    0x0221,        /*  Global Control Register   */
    0xffff,        /*  Global Reset Register   */
    0x3fff,        /*  CE0 Space Control Register 1   */
    0x5fff,        /*  CE0 Space Control Register 2   */
    0x0000,        /*  CE0 Space Control Register 3   */
    0x1038,        /*  CE1 Space Control Register 1   */
    0x0038,        /*  CE1 Space Control Register 2   */
    0x0000,        /*  CE1 Space Control Register 3   */
    0x1050,        /*  CE2 Space Control Register 1   */
    0x0050,        /*  CE2 Space Control Register 2   */
    0x0000,        /*  CE2 Space Control Register 3   */
    0x1050,        /*  CE3 Space Control Register 1   */
    0x0050,        /*  CE3 Space Control Register 2   */
    0x0000,        /*  CE3 Space Control Register 3   */
    0x2b11,        /*  SDRAM Control Register 1   */
    0x0578,        /*  SDRAM Period Register   */
    0xffff,        /*  SDRAM Initialization Register   */
    0x0535         /*  SDRAM Control Register 2   */
};

MCBSP_Config mcbspCfg1 = {
    0x1000,        /*  Serial Port Control Register 1   */
    0x0100,        /*  Serial Port Control Register 2   */
    0x0000,        /*  Receive Control Register 1   */
    0x0000,        /*  Receive Control Register 2   */
    0x0040,        /*  Transmit Control Register 1   */
    0x0000,        /*  Transmit Control Register 2   */
    0x0063,        /*  Sample Rate Generator Register 1   */
    0x2013,        /*  Sample Rate Generator Register 2   */
    0x0000,        /*  Multichannel Control Register 1   */
    0x0000,        /*  Multichannel Control Register 2   */
    0x1a0a,        /*  Pin Control Register   */
    0x0000,        /*  Receive Channel Enable Register Partition A   */
    0x0000,        /*  Receive Channel Enable Register Partition B   */
    0x0000,        /*  Receive Channel Enable Register Partition C   */
    0x0000,        /*  Receive Channel Enable Register Partition D   */
    0x0000,        /*  Receive Channel Enable Register Partition E   */
    0x0000,        /*  Receive Channel Enable Register Partition F   */
    0x0000,        /*  Receive Channel Enable Register Partition G   */
    0x0000,        /*  Receive Channel Enable Register Partition H   */
    0x0000,        /*  Transmit Channel Enable Register Partition A   */
    0x0000,        /*  Transmit Channel Enable Register Partition B   */
    0x0000,        /*  Transmit Channel Enable Register Partition C   */
    0x0000,        /*  Transmit Channel Enable Register Partition D   */
    0x0000,        /*  Transmit Channel Enable Register Partition E   */
    0x0000,        /*  Transmit Channel Enable Register Partition F   */
    0x0000,        /*  Transmit Channel Enable Register Partition G   */
    0x0000         /*  Transmit Channel Enable Register Partition H   */
};

MCBSP_Config mcbspCfg2 = {
    0x0000,        /*  Serial Port Control Register 1   */
    0x0100,        /*  Serial Port Control Register 2   */
    0x0140,        /*  Receive Control Register 1   */
    0x0000,        /*  Receive Control Register 2   */
    0x0140,        /*  Transmit Control Register 1   */
    0x0000,        /*  Transmit Control Register 2   */
    0x0000,        /*  Sample Rate Generator Register 1   */
    0x0000,        /*  Sample Rate Generator Register 2   */
    0x0000,        /*  Multichannel Control Register 1   */
    0x0000,        /*  Multichannel Control Register 2   */
    0x0003,        /*  Pin Control Register   */
    0x0000,        /*  Receive Channel Enable Register Partition A   */
    0x0000,        /*  Receive Channel Enable Register Partition B   */
    0x0000,        /*  Receive Channel Enable Register Partition C   */
    0x0000,        /*  Receive Channel Enable Register Partition D   */
    0x0000,        /*  Receive Channel Enable Register Partition E   */
    0x0000,        /*  Receive Channel Enable Register Partition F   */
    0x0000,        /*  Receive Channel Enable Register Partition G   */
    0x0000,        /*  Receive Channel Enable Register Partition H   */
    0x0000,        /*  Transmit Channel Enable Register Partition A   */
    0x0000,        /*  Transmit Channel Enable Register Partition B   */
    0x0000,        /*  Transmit Channel Enable Register Partition C   */
    0x0000,        /*  Transmit Channel Enable Register Partition D   */
    0x0000,        /*  Transmit Channel Enable Register Partition E   */
    0x0000,        /*  Transmit Channel Enable Register Partition F   */
    0x0000,        /*  Transmit Channel Enable Register Partition G   */
    0x0000         /*  Transmit Channel Enable Register Partition H   */
};

/*  Handles  */
MCBSP_Handle C55XX_CONTROLHANDLE_hMcbsp;
MCBSP_Handle C55XX_DMA_MCBSP_hMcbsp;

/*
 *  ======== CSL_cfgInit() ========  
 */
void CSL_cfgInit()
{
        C55XX_CONTROLHANDLE_hMcbsp = MCBSP_open(MCBSP_PORT1, MCBSP_OPEN_RESET);
    C55XX_DMA_MCBSP_hMcbsp = MCBSP_open(MCBSP_PORT2, MCBSP_OPEN_RESET);
        
    EMIF_config(&emifCfg0);
    MCBSP_config(C55XX_CONTROLHANDLE_hMcbsp, &mcbspCfg1);
    MCBSP_config(C55XX_DMA_MCBSP_hMcbsp, &mcbspCfg2);

    /* You must use DMA_start() in your main code to start the DMA. */

	
    
    /* You must use MCBSP_start() in your main code to start the MCBSP. */

    
    

}