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📄 mdma_get_mb_refwin.asm

📁 adi bf533视频编码程序
💻 ASM
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#include <defBF533.h>

.global _mdma_getMB_refwin_init;
.global _MB_Gaus_filter;
.global _MB_no_pre;		
.global _restore_MB_get_MB_refwin_no_pre;
.global _restore_MB_get_MB_refwin_prepro;

.extern _mStepLuma;
.extern _mStepChroma;
.extern _MBDMA_YS0_x_mod;
.extern _MBDMA_YS0_y_mod;
.extern _MBDMA_YS0_y_mod_prepro;
.extern _MBDMA_UVS0_y_mod;
.extern _prepro_back_offset;
.extern _refwin_Y_step;
.extern _refwin_UV_step;

.section L1_data_b;
.align 4;
.byte2 _refwin_queue[8*3];
.byte2 _refwin_queue1[8*3];
//.byte2 _refwin_queue_prepro[8*3];
.byte2 _MBY_queue_no_pre[8];
.byte2 _MBY_queue_prepro[8];
.byte2 _MBUV_queue[8*2];

.byte2 _ref_src_queue[8*3];
.byte2 _ref_src_queue1[8*3];
//.byte2 _ref_src_queue_prepro[8*3];
.byte2 _Y656_queue_no_pre[8];
.byte2 _Y656_queue_prepro[8];
.byte2 _UV656_queue[8*2];

.byte2 _MB_restore_queue[8*3];
.byte2 _refvop_queue[8*3];

//.byte4 _get_refwin;		//flag: need to enable "get refwin dma"?
.byte4 _get_MB_refwin;		//flag: need to get MB or refwin?
.byte4 _MBY_queue_addr;		//
.byte4 _Y656_queue_addr;
.byte4 _refwin_queue_addr;
.byte4 _ref_src_queue_addr;

.section L1_code;
_mdma_getMB_refwin_init:
	
	[--SP] = (R7:4, P5:3);
	[--SP] = RETS;
	
	L0 = 0;
	L1 = 0;
	
	R0.L = _ref_src_queue;
	R0.H = _ref_src_queue;
	I0 = R0;
	R1.L = _ref_src_queue1;
	R1.H = _ref_src_queue1;
	I1 = R1;
	R0 += 16;
	R1 += 16;
	W[I0++] = R0.L;
	I0 += 4;
	W[I1++] = R1.L;
	I1 += 4;
	R2 = 0x6819;			//32bit
	W[I0++] = R2.L;
	W[I1++] = R2.L;
	R3.L = 12;		//XCOUNT
	R3.H = 4;
	[I0++] = R3;
	R5.L = 4;
	R5.H = 4;
	[I1++] = R5;
	P0.L = _mStepLuma;
	P0.H = _mStepLuma;
	R4 = [P0];
	R6 = R4;
	R4 += -44;			//R4-48+4
	R4 <<= 16;
	R4.L = 48;
	[I0++] = R4;
	R6 += -12;			//-16+4;
	R6 <<=16;
	R6.L = 48;
	[I1++] = R6;
	
	R0 += 16;
	R1 += 16;
	W[I0++] = R0.L;
	W[I1++] = R1.L;
	I0 += 4;
	I1 += 4;
	W[I0++] = R2.L;
	W[I1++] = R2.L;
	R3.L = 6;
	R3.H = 4;
	[I0++] = R3;
	R5.L = 2;
	R5.H = 4;
	[I1++] = R5;
	P0.L = _mStepChroma;
	P0.H = _mStepChroma;
	R4 = [P0];
	R6 = R4;
	R4 += -20;
	R4 <<= 16;
	R4.L = 24;
	[I0++] = R4;
	R6 += -4;
	R6 <<=16;
	R6.L = 24;
	[I1++] = R6;
	
	R0 = [I0++] || R1 = [I1++];						//dummy read;
	R7.L = W[I0++] || R7.H = W[I1++];				//dummy read;
	R2.L = 0x0019;									//STOP MODE
	W[I0++] = R2.L;
	W[I1++] = R2.L;
	[I0++] = R3;
	[I0] = R4;
	[I1++] = R5;
	[I1] = R6;
	
	R0.L = _Y656_queue_no_pre;
	R0.H = _Y656_queue_no_pre;
	R1.L = _Y656_queue_prepro;
	R1.H = _Y656_queue_prepro;
	I0 = R0;		//Y_SRC_DMA
	I1 = R1;
	R2.L = 0x6811;
	R0.L = _UV656_queue;
	R0.H = _UV656_queue;
	W[I0++] = R0.L;
	W[I1++] = R0.L;
	I0 += 4;
	I1 += 4;
	W[I0++] = R2.L;
	W[I1++] = R2.L;
	P0.L = _MBDMA_YS0_x_mod;
	P0.H = _MBDMA_YS0_x_mod;
	R3 = [P0];
	R3 <<= 16;
	R3.L = 16;		//XCOUNT
	[I0++] = R3;
	R3.L = 18;
	[I1++] = R3;
	P0.L = _MBDMA_YS0_y_mod;
	P0.H = _MBDMA_YS0_y_mod;
	R4 = [P0];
	R4 <<= 16;
	R4.L = 16;
	[I0] = R4;
	P0.L = _MBDMA_YS0_y_mod_prepro;
	P0.H = _MBDMA_YS0_y_mod_prepro;
	R4 = [P0];
	R4 <<= 16;
	R4.L = 18;
	[I1] = R4;
	
	I0 = R0;	//U SRC
	R0 += 16;		
	W[I0++] = R0.L;
	I0 += 4;
	W[I0++] = R2.L;
	P0.L = _MBDMA_YS0_x_mod;
	P0.H = _MBDMA_YS0_x_mod;
	R3 = [P0];
	R3 <<= 17;		//(R3 << 16) *2
	R3.L = 8;
	[I0++] = R3;
	P0.L = _MBDMA_UVS0_y_mod;
	P0.H = _MBDMA_UVS0_y_mod;
	R4 = [P0];
	R4 <<= 16;
	R4.L = 8;
	[I0] = R4;
	
	R0 += 6;
	I0 = R0;
	R2.L = 0x0011;
	W[I0++] = R2.L;
	[I0++] = R3;
	[I0] = R4;
	
	
//DST dma queue;	
	R0.L = _refwin_queue;
	R0.H = _refwin_queue;
	R1.L = _refwin_queue1;
	R1.H = _refwin_queue1;
	I0 = R0;
	I1 = R1;
	R0 += 16;
	R1 += 16;
	W[I0++] = R0.L;
	W[I1++] = R1.L;
	I0 += 4;
	I1 += 4;
	R2 = 0x681B;
	W[I0++] = R2.L;
	W[I1++] = R2.L;
	R3.L = 12;
	R3.H = 4;
	[I0++] = R3;
	R5.L = 4;
	R5.H = 4;
	[I1++] = R5;
	P0.L = _refwin_Y_step;
	P0.H = _refwin_Y_step;
	R4 = [P0];
	R6 = R4;
	R4 += -44;			//R4-48+4
	R4 <<= 16;
	R4.L = 48;
	[I0++] = R4;
	R6 += -12;			//-16+4;
	R6 <<=16;
	R6.L = 48;
	[I1++] = R6;
	
	R0 += 16;
	R1 += 16;
	W[I0++] = R0.L;
	W[I1++] = R1.L;
	I0 += 4;
	I1 += 4;
	W[I0++] = R2.L;
	W[I1++] = R2.L;
	R3.L = 6;
	R3.H = 4;
	[I0++] = R3;
	R5.L = 2;
	R5.H = 4;
	[I1++] = R5;
	P0.L = _refwin_UV_step;
	P0.H = _refwin_UV_step;
	R4 = [P0];
	R6 = R4;
	R4 += -20;
	R4 <<= 16;
	R4.L = 24;
	[I0++] = R4;
	R6 += -4;
	R6 <<=16;
	R6.L = 24;
	[I1++] = R6;
		
	R0 = [I0++] || R1 = [I1++];			//dummy read;
	R7.L = W[I0++] || R7.H = W[I1++];						//dummy read;
	R2.L = 0x009B;						//DIEN, 32bit;
	W[I0++] = R2.L;
	W[I1++] = R2.L;
	[I0++] = R3;
	[I0] = R4;
	[I1++] = R5;
	[I1] = R6;
	
	R0.L = _MBY_queue_no_pre;
	R0.H = _MBY_queue_no_pre;
	R1.L = _MBY_queue_prepro;
	R1.H = _MBY_queue_prepro;
	R2.L = 0x6813;			//8bit;
	I0 = R0;
	I1 = R1;
	R0.L = _MBUV_queue;
	R0.H = _MBUV_queue;
	W[I0++] = R0.L;
	W[I1++] = R0.L;
	I0 += 4;
	I1 += 4;
	W[I0++] = R2.L;
	W[I1++] = R2.L;
	R3.L = 16;
	R3.H = 1;
	[I0++] = R3;
	[I0] = R3;
	R4.L = 18;
	R4.H = 1;
	[I1++] = R4;
	R4.H = 7;
	[I1] = R4;
	
	I0 = R0;
	R0 += 16;
	W[I0++] = R0.L;
	I0 += 4;
	W[I0++] = R2.L;
	R3.L = 8;
	R3.H = 1;
	[I0++] = R3;
	[I0] = R3;
	
	R0 += 6;
	I0 = R0;
	R2 = 0x0093;
	W[I0++] = R2.L;
	[I0++] = R3;
	[I0] = R3;
	
	
//restore MB DMA
	R0.L = _MB_restore_queue;			//SRC
	R0.H = _MB_restore_queue;
	I0 = R0;
	R1.L = _refvop_queue;				//DST
	R1.H = _refvop_queue;
	I1 = R1;
	R0 += 16;
	R1 += 16;
	W[I0++] = R0.L;
	W[I1++] = R1.L;
	I0 += 4;
	I1 += 4;
	R2.L = 0x6819;
	R2.H = 0x681B;
	W[I0++] = R2.L;
	W[I1++] = R2.H;
	R3.L = 4;
	R3.H = 4;
	R4.L = 16;
	R4.H = 4;
	[I0++] = R3;		//SRC XCNT, XMOD;
	[I0++] = R4;		//SRC YCNT, YMOD;
	[I1++] = R3;		//DST YCNT, YMOD
	P0.L = _mStepLuma;
	P0.h = _mStepLuma;
	R5 = [P0];
	R5 += -12;			// mStepLuma-16+4;
	R5 <<= 16;
	R5.L = 16;
	[I1++] = R5;		//DST YCNT, YMOD
	
	R0 += 16;
	R1 += 16;
	W[I0++] = R0.L;
	W[I1++] = R1.L;
	I0 += 4;
	I1 += 4;
	W[I0++] = R2.L;
	W[I1++] = R2.H;
	R3.L = 2;
	R4.L = 8;
	[I0++] = R3;
	[I0++] = R4;
	[I1++] = R3;
	P0.L = _mStepChroma;
	P0.H = _mStepChroma;
	R5 = [P0];
	R5 += -4;		//-8+4;
	R5 <<= 16;
	R5.L = 8;
	[I1++] = R5;
	
	R6 = [I0++] || R7 = [I1++];		// dummy read;
	R6.L = W[I0++] || R7.L = W[I1++];	//dummy read;
	R2.L = 0x0019;
	R2.H = 0x009B;
	W[I0++] = R2.L;
	W[I1++] = R2.H;
	[I0++] = R3;
	[I0++] = R4;
	[I1++] = R3;
	[I1++] = R5;
		
	
	CALL _MDMA0_ISR_Config;
	
	RETS = [SP++];
	(R7:4, P5:3) = [SP++];
_mdma_getMB_refwin_init.end:
	RTS;
	NOP;

	
	
_MDMA0_ISR_Config:
	[--SP] = (R7:4, P5:3);
	[--SP] = RETS;

	P0.L = LO(EVT13);
	P0.H = HI(EVT13);
	R0.L = _MDMA0_ISR1;
	R0.H = _MDMA0_ISR1;
	[P0] = R0;
	SSYNC;
	
	P0.L = LO(SIC_RVECT);
	P0.H = HI(SIC_RVECT);
	R0 = [P0+SIC_IMASK-SIC_RVECT];
	BITSET(R0, 21);
	[P0+SIC_IMASK-SIC_RVECT] = R0;
	SSYNC;
	
	P0.L = LO(IMASK);
	P0.H = HI(IMASK);
	R0 = [P0];
	BITSET(R0, 13);
	[P0] = R0;
	SSYNC;
	
	
	RETS = [SP++];
	(R7:4, P5:3) = [SP++];
_MDMA0_ISR_Config.end:	
	RTS;
	NOP;
	
	
	
.extern _dma_done;
/*
_MDMA0_ISR0:
	[--SP] = RETI;
	[--SP] = ASTAT;
	[--SP] = R0;
	[--SP] = P0;
	
	P0.H = HI(MDMA_D0_NEXT_DESC_PTR);
	P0.L = LO(MDMA_D0_NEXT_DESC_PTR);
	R0 = 0x1(Z);
	W[P0+MDMA_D0_IRQ_STATUS-MDMA_D0_NEXT_DESC_PTR] = R0; 
	SSYNC;	
	P0.L = _dma_done;
	P0.H = _dma_done;
	[P0] = R0;
	
	P0 = [SP++];
	R0 = [SP++];
	ASTAT = [SP++];
	RETI = [SP++];
_MDMA0_ISR0.end:
	RTI;
	NOP;
*/

/******************************	
_MDMA0_ISR1:
	[--SP] = RETI;
	[--SP] = ASTAT;
	[--SP] = R0;
	[--SP] = P0;
	[--SP] = P1;
	
	P1.H = HI(MDMA_D0_NEXT_DESC_PTR);
	P1.L = LO(MDMA_D0_NEXT_DESC_PTR);
	R0 = 0x1(Z);
	W[P1+MDMA_D0_IRQ_STATUS-MDMA_D0_NEXT_DESC_PTR] = R0; 
	SSYNC;	

	P0.L = _get_refwin;
	P0.H = _get_refwin;
	R0 = [P0];
	CC = R0;
	
	IF !CC JUMP no_more_dma;
	
		R0 = 0;
		[P0] = R0;			//clear _get_refwin flag;
	
		P0.L = LO(MDMA_S0_NEXT_DESC_PTR);
		P0.H = HI(MDMA_S0_NEXT_DESC_PTR);
		R0.L = _ref_src_queue;
		R0.H = _ref_src_queue;
		[P0] = R0;
		SSYNC;
	
	//	P1.L = LO(MDMA_D0_NEXT_DESC_PTR);
	//	P1.H = HI(MDMA_D0_NEXT_DESC_PTR);
		R0.L = _refwin_queue;
		R0.H = _refwin_queue;
		[P1] = R0;
		SSYNC;
	
		R0 = 0x6819;
		W[P0+MDMA_S0_CONFIG-MDMA_S0_NEXT_DESC_PTR] = R0;
		SSYNC;
		R0 = 0x681B;
		W[P1+MDMA_D0_CONFIG-MDMA_D0_NEXT_DESC_PTR] = R0;
		SSYNC;
		JUMP _MDMA0_ISR1.end;
	
no_more_dma:
		P0.L = _dma_done;
		P0.H = _dma_done;
		R0 = 1;
		[P0] = R0;
		
_MDMA0_ISR1.end:
	P1 = [SP++];	
	P0 = [SP++];
	R0 = [SP++];
	ASTAT = [SP++];
	RETI = [SP++];
	RTI;
	NOP;
***************************************************/


_MDMA0_ISR1:
	[--SP] = RETI;
	[--SP] = ASTAT;
	[--SP] = R0;
	[--SP] = P0;
	[--SP] = P1;
	[--SP] = P2;
	
	P1.H = HI(MDMA_D0_NEXT_DESC_PTR);
	P1.L = LO(MDMA_D0_NEXT_DESC_PTR);
	R0 = 0x1(Z);
	W[P1+MDMA_D0_IRQ_STATUS-MDMA_D0_NEXT_DESC_PTR] = R0; 
	SSYNC;	

	P2.L = _get_MB_refwin;
	P2.H = _get_MB_refwin;
	R0 = [P2];
	CC = BITTST(R0, 1);
	IF !CC JUMP no_get_MB_dma;
	
	BITCLR(R0, 1);
	[P2] = R0;
	
	P2.L = _Y656_queue_addr;
	P2.H = _Y656_queue_addr;
	R0 = [P2];
	P0.L = LO(MDMA_S0_NEXT_DESC_PTR);
	P0.H = HI(MDMA_S0_NEXT_DESC_PTR);
	[P0] = R0;
	SSYNC;
	P2.L = _MBY_queue_addr;
	P2.H = _MBY_queue_addr;
	R0 = [P2];
	[P1] = R0;
	SSYNC;
	
	R0 = 0X6811;
	W[P0+MDMA_S0_CONFIG-MDMA_S0_NEXT_DESC_PTR] = R0;
	SSYNC;
	R0 = 0X6813;
	W[P1+MDMA_D0_CONFIG-MDMA_D0_NEXT_DESC_PTR] = R0;
	SSYNC;
	JUMP _MDMA0_ISR1.end;
	

no_get_MB_dma:
	CC = BITTST(R0, 0);
	IF !CC JUMP no_more_dma;
	
	BITCLR(R0, 0);
	[P2] = R0;			//clear get refwin flag;

	P2.L = _ref_src_queue_addr;
	P2.H = _ref_src_queue_addr;
	R0 = [P2];
	P0.L = LO(MDMA_S0_NEXT_DESC_PTR);
	P0.H = HI(MDMA_S0_NEXT_DESC_PTR);
	[P0] = R0;
	SSYNC;

	P2.L = _refwin_queue_addr;
	P2.H = _refwin_queue_addr;
	R0 = [P2];
	[P1] = R0;
	SSYNC;

	R0 = 0x6819;
	W[P0+MDMA_S0_CONFIG-MDMA_S0_NEXT_DESC_PTR] = R0;
	SSYNC;
	R0 = 0x681B;
	W[P1+MDMA_D0_CONFIG-MDMA_D0_NEXT_DESC_PTR] = R0;
	SSYNC;
	JUMP _MDMA0_ISR1.end;
	
no_more_dma:
	P0.L = _dma_done;
	P0.H = _dma_done;
	R0 = 1;
	[P0] = R0;
123

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