adsp-bf533_c.ldf

adi bf533视频编码程序

//MEM_L1_DATA_B_STACK       {	/* L1 Data B SRAM cont. - other half of 16K */
//	TYPE(RAM) WIDTH(8)
//	START(0xFF900000)	END(0xFF901FFF)
//}


/* Data Bank A - 32K, half usable as cache. */
/* Split into sections for program layout. */
/* Data - normal data, 16K. */
/* If cache disabled use MEM_L1_DATA_A_CACHE for heap else use SRAM 
** 0xFF807FDF-0xFF807FFF used by boot-loader for 0.2 silicon. 
** 0xFF807FEF-0xFF807FFF used by boot-loader for 0.3 and later silicon. 
** Does not impact use as heap or cache.
*/

//MEM_L1_DATA_A_CACHE        {	/* L1 Data A SRAM/Cache - 16K */
//	TYPE(RAM) WIDTH(8)
//	START(0xFF804000) END(0xFF807FFF)
//}

MEM_L1_DATA_A        {	/* L1 Data A SRAM - 16K */
	TYPE(RAM) WIDTH(8)
//	START(0xFF800000) END(0xFF8064BF)
	START(0xFF8074E0) END(0xFF807FFF)	//B20H=2848 bytes;
}
//liu
/*
MEM_BUFFER1_LIU{	// L1 Data A SRAM - 4K
	TYPE(RAM) WIDTH(8)
	START(0xFF8064C0) END(0xFF806FFF)//2880
}
MEM_BUFFER2_LIU{	// L1 Data A SRAM - 4K
	TYPE(RAM) WIDTH(8)
	START(0xFF807000) END(0xFF807B3F)//2880
}
*/
//liu
/*
MEM_MB_REFWIN0{
	TYPE(RAM) WIDTH(8)
	START(0xFF806000) END(0xFF806FFF)//4048, actually use 4016B=48*48*1.5+24*18+64+64
}
MEM_MB_REFWIN1{
	TYPE(RAM) WIDTH(8)
	START(0xFF807000) END(0xFF807FFF)//4048, actually use 4016B=48*48*1.5+24*18+64+64
}
*/
MEM_MB_BUF0{
    TYPE(RAM) WIDTH(8)
    START(0xFF800000) END(0xFF80022F)			//24*18+128=560=230H
}
MEM_REFWIN_BUF{
    TYPE(RAM) WIDTH(8)
    START(0xFF800230) END(0xFF8072AF)	//16*48*25*1.5=28800=0x7080;
}
MEM_MB_BUF1{
    TYPE(RAM) WIDTH(8)
    START(0xFF8072B0) END(0xFF8074DF)	//24*18+128=560=230H;
}

MEM_ASYNC3     {	/* Async Bank 3 - 1MB */
	TYPE(RAM) WIDTH(8)
	START(0x20300000) END(0x203FFFFF)
}
MEM_ASYNC2     {	/* Async Bank 2 - 1MB */
	TYPE(RAM) WIDTH(8)
	START(0x20200000) END(0x202FFFFF)
}
MEM_ASYNC1     {	/* Async Bank 1 - 1MB */
	TYPE(RAM) WIDTH(8)
	START(0x20100000) END(0x201FFFFF)
}
MEM_ASYNC0     {	/* Async Bank 0 - 1MB */
	TYPE(RAM) WIDTH(8)
	START(0x20000000) END(0x200FFFFF)
}


MEM_SDRAM { 
	TYPE(RAM) WIDTH(8) 
START(0x00000004) END(0x007FFFFF)

}

SDRAM_BANK1 { 
	TYPE(RAM) WIDTH(8) 
START(0x00800000) END(0x00FFFFFF)

}

SDRAM_BANK2 { 
	TYPE(RAM) WIDTH(8) 
START(0x01000000) END(0x017FFFFF)

}
SDRAM_BANK3 { 
	TYPE(RAM) WIDTH(8) 
START(0x01800000) END(0x01FFFFFF)

}




}


/*
** minimum sizes of the stack and heap allocated
*/   
#define STACK_SIZE 3584
#define HEAP_SIZE 512

PROCESSOR p0
{
    OUTPUT( $COMMAND_LINE_OUTPUT_FILE )

	/* Following address must match start of MEM_PROGRAM */
	RESOLVE(start,0xFFA00000)

	KEEP(start,_main)

    SECTIONS
    {
        program_ram
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(L1_code) $LIBRARIES(L1_code))
            INPUT_SECTIONS( $OBJECTS(cplb_code) $LIBRARIES(cplb_code))
            INPUT_SECTIONS( $OBJECTS(cplb) $LIBRARIES(cplb))
            INPUT_SECTIONS( $OBJECTS(noncache_code) $LIBRARIES(noncache_code))
            INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program))
        } >MEM_L1_CODE


       

        L1_data_a
        {
            INPUT_SECTION_ALIGN(4)

            INPUT_SECTIONS( $OBJECTS(L1_data_a) $LIBRARIES(L1_data_a))
               INPUT_SECTIONS( $OBJECTS(vtbl) $LIBRARIES(vtbl) )
               INPUT_SECTIONS( $OBJECTS(.frt) $LIBRARIES(.frt) )
               INPUT_SECTIONS( $OBJECTS(.frtl) $LIBRARIES(.frtl) )
               INPUT_SECTIONS( $OBJECTS(ctor) $LIBRARIES(ctor) )
               INPUT_SECTIONS( $OBJECTS(ctorl) $LIBRARIES(ctorl) )
               INPUT_SECTIONS( $OBJECTS(.gdt) $LIBRARIES(.gdt) )
               INPUT_SECTIONS( $OBJECTS(.gdtl) $LIBRARIES(.gdtl) )
               INPUT_SECTIONS( $OBJECTS(.edt) $LIBRARIES(.edt) )
               INPUT_SECTIONS( $OBJECTS(.cht) $LIBRARIES(.cht) )
            INPUT_SECTIONS( $OBJECTS(cplb_data) $LIBRARIES(cplb_data))
            INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
            INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
        } >MEM_L1_DATA_A

        constdata_L1_data_a
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
        } >MEM_L1_DATA_A

        
        L1_data_b
        {
            INPUT_SECTION_ALIGN(4)

            INPUT_SECTIONS( $OBJECTS(L1_data_b) $LIBRARIES(L1_data_b))
            INPUT_SECTIONS( $OBJECTS(bsz_init) $LIBRARIES(bsz_init))
               INPUT_SECTIONS( $OBJECTS(.edt) $LIBRARIES(.edt) )
               INPUT_SECTIONS( $OBJECTS(.cht) $LIBRARIES(.cht) )
            INPUT_SECTIONS( $OBJECTS(cplb_data) $LIBRARIES(cplb_data))
            INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
            INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
        } >MEM_L1_DATA_B
//liu
/*        
        in_buffer1
        {
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(in_buffer1) $LIBRARIES(in_buffer1))
           
        } >MEM_BUFFER1_LIU

        
        in_buffer2
        {
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(in_buffer2) $LIBRARIES(in_buffer2))
            
        } >MEM_BUFFER2_LIU
*/        
//added by gary;
#if 0
		MB_refwin0
		{
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(MB_refwin0) $LIBRARIES(MB_refwin0))
           
        } >MEM_MB_REFWIN0
        
		MB_refwin1
		{
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(MB_refwin1) $LIBRARIES(MB_refwin1))
           
        } >MEM_MB_REFWIN1
#endif

		MB_buf0
		{
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(MB_buf0) $LIBRARIES(MB_buf0))
           
        } >MEM_MB_BUF0
        
		MB_buf1
		{
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(MB_buf1) $LIBRARIES(MB_buf1))
           
        } >MEM_MB_BUF1
        

 		refwin_buf
		{
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(refwin_buf) $LIBRARIES(refwin_buf))
           
        } >MEM_REFWIN_BUF
       
		    
		
       // .meminit { ALIGN(4) } >MEM_L1_DATA_A_CACHE

      //  constdata_L1_data_b
        //{
       //     INPUT_SECTION_ALIGN(4)
       //     INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
       //     INPUT_SECTIONS( $OBJECTS(bsz) $LIBRARIES(bsz))
      //  } >MEM_L1_DATA_A_CACHE

        bsz_L1_data_b ZERO_INIT
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(bsz) $LIBRARIES(bsz))
        } >MEM_L1_DATA_B

        bsz_L1_data_a ZERO_INIT
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(bsz) $LIBRARIES(bsz))
        } >MEM_L1_DATA_A


/*
        stack
        {
            ldf_stack_space = .;
            ldf_stack_end = ldf_stack_space + MEMORY_SIZEOF(MEM_L1_DATA_B_STACK);
        } >MEM_L1_DATA_B_STACK
*/

        
/*
       heap
        {
            // Allocate a heap for the application
            ldf_heap_space = .;
            ldf_heap_end = ldf_heap_space + MEMORY_SIZEOF(MEM_L1_SCRATCH) - 1;
            ldf_heap_length = ldf_heap_end - ldf_heap_space;        
        } >MEM_L1_SCRATCH
*/

   stack_and_heap_scratchpad
   {
      ldf_stack_space = .;
      ldf_stack_end = ldf_stack_space + STACK_SIZE;
      ldf_heap_space = ldf_stack_end;
      ldf_heap_end = ldf_heap_space + HEAP_SIZE;
      ldf_heap_length = ldf_heap_end - ldf_heap_space;
   } > MEM_L1_SCRATCH		    
       
sdram_mem
        {
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(sdram_mem) $LIBRARIES(sdram_mem))
        } >MEM_SDRAM

sdram_bank1
        {
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(sdram_bank1) $LIBRARIES(sdram_bank1))
        } >SDRAM_BANK1
                
sdram_bank2
        {
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(sdram_bank2) $LIBRARIES(sdram_bank2))
        } >SDRAM_BANK2
        
sdram_bank3
        {
	    INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS($OBJECTS(sdram_bank3) $LIBRARIES(sdram_bank3))
        } >SDRAM_BANK3
             
        
    }
}