📄 bf533_ez-kit_isr_config.asm
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/******************************************************************************/
//
// Name: BF533 EZ-KIT video ITU-656 receive mode
//
/******************************************************************************
(C) Copyright 2003 - Analog Devices, Inc. All rights reserved.
File Name: BF533_EZ-KIT_ISR_Config.asm
Date Modified: 10/25/04 TL Rev 2
Software: VisualDSP++3.1
Hardware: ADSP-BF533 EZ-KIT Board
Special Connections: None
Purpose: Interrupt priority and masking
Program Parameters:
********************************************************************************/
#include <defBF533.h>
.global _BF533_EZ_KIT_ISR_Config;
.extern PPI_DMA_ISR_ASM;
.section L1_code;
/*******************************************************************************/
_BF533_EZ_KIT_ISR_Config:
//Link the DMA interrupt subroutine to the DSP interrupt event 8
p0.h = hi(EVT8);
p0.l = lo(EVT8);
r0.l = PPI_DMA_ISR_ASM;
r0.h = PPI_DMA_ISR_ASM; // IVG8 Handler
[p0] = r0;
p0.h = hi(SIC_RVECT);
p0.l = lo(SIC_RVECT);
r1 = [p0+SIC_ISR-SIC_RVECT];
//enables the stop mode DMA interrupt by setting the System Interrupt Controller
r0 = 0x0100(z);
r0 = r0 | r1;
[p0+SIC_ISR-SIC_RVECT] = r0;
//enables the stop mode DMA interrupt by setting the System Interrupt IMASK Register
r1 = [p0+SIC_IMASK-SIC_RVECT];
r0 = 0x0100(z);
r0 =r1|r0;
[p0+SIC_IMASK-SIC_RVECT] = r0;
//The stop mode DMA is linked to interrupt vector 8 IVG8
r0.l = lo(P8_IVG(8) | P9_IVG(14) | P10_IVG(14) | P11_IVG(14));
r1 = [p0+SIC_IAR1-SIC_RVECT];
r0= r0|r1;
[p0+SIC_IAR1-SIC_RVECT] = r0;
//Finally the DMA interrupt has been enabled at the core level
p0.h = hi(IMASK);
p0.l = lo(IMASK);
r0 = [p0];
r1= 0x0100;
r0 = r0 | r1;
[p0] = r0;
_BF533_EZ_KIT_ISR_Config.END:
RTS;
/*******************************************************************************/
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