📄 mt6188a1_drv.c
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{ CW(127, 1), 0x00, 0x01 }, // <----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset
{ CW( 6, 1), 0x0F, 0x10 }, //CW6_1 [7:4] 1 //Set clock source and target register
{ CW( 7, 1), 0xFC, 0x00 }, //CW7_1 [1:0] 0 //Disable calibration process
{ CW( 9, 0), 0xBF, 0x00 }, //CW9_0 [6:6] 0 //Resume to default value
{ CW( 17, 1), 0x7F, 0x00 }, //CW17_1 [7:7] 0 //
{ CW( 18, 0), 0xF7, 0x00 }, //CW18_0 [3:3] 0 //
{ CW( 18, 1), 0xF7, 0x00 }, //CW18_1 [3:3] 0 //
{ CW( 19, 0), 0xFC, 0x00 }, //CW19_0 [1:0] 0 //
{ CW( 22, 1), 0xFE, 0x00 }, //CW22_1 [0:0] 0 //
};
#define AAMP1_LCHOFF_MN_COUNT 21
static const ctrl_word_operation Aamp1_Lchoff_MN[AAMP1_LCHOFF_MN_COUNT] = {
{ CW( 19, 0), 0xFD, 0x02 }, //CW19_0 [1:1] 1 //Feedthrough test signal
{ CW( 5, 0), 0xFD, 0x00 }, //CW5_0 [1:1] 0 //Turn off LNA input path
{ CW( 30, 1), 0x00, 0x00 }, //CW30_1 [7:0] 0 //
{ CW( 30, 0), 0x00, 0x00 }, //CW30_0 [7:0] 0 //
{ CW( 11, 1), 0x3F, 0x80 }, //CW11_1 [7:6] 2 //Gain option (D2S_MODE, I2V_MODE)
{ CW( 14, 0), 0x6F, 0x00 }, //CW14_0 [7,4] //Force mono mode
{ CW( 17, 0), 0x3F, 0x80 }, //CW17_0 [7:6] 2 //Enable AAMP1 L calibration
{ CW( 7, 1), 0xFC, 0x03 }, //CW7_0 [1:0] 3 //Enable calibraton process
{ CW( 6, 0), 0xFC, 0x01 }, //CW6_0 [1:0] 1 //Set window soure
{ CW( 6, 1), 0x00, 0x00 }, //CW6_1 [7:0] 0 //Set clock source and target register (coarse tune)
{ CW( 9, 0), 0xBF, 0x40 }, //CW9_0 [6:6] 1 //
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //Clear all FLG registers
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //Start calibration process
{ CW(127, 1), 0x00, 0x01 }, // <----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset
{ CW( 6, 1), 0x00, 0x10 }, //CW6_1 [7:0] 16 //Set clock source and target register
{ CW( 9, 0), 0xBF, 0x40 }, //CW9_0 [6:6] 1 //
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //Clear all FLG registers
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //Start calibration process
{ CW(127, 1), 0x00, 0x01 }, // <----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset
};
#define AAMP1_RCHOFF_MN_COUNT 19
static const ctrl_word_operation Aamp1_Rchoff_MN[AAMP1_RCHOFF_MN_COUNT] = {
{ CW( 17, 0), 0x3F, 0x40 }, //CW17_0 [7:6] 1 //Enable AAMP1 R calibration
{ CW( 6, 1), 0x00, 0x20 }, //CW6_1 [7:0] 32 //Set clock source and target register (coarse tune)
{ CW( 9, 0), 0xBF, 0x40 }, //CW9_0 [6:6] 1 //
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //Clear all FLG registers
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //Start calibration process
{ CW(127, 1), 0x00, 0x01 }, // <----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset
{ CW( 6, 1), 0x00, 0x30 }, //CW6_1 [7:0] 48 //Set clock source and target register
{ CW( 9, 0), 0xBF, 0x40 }, //CW9_0 [6:6] 1 //
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //Clear all FLG registers
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //Start calibration process
{ CW(127, 1), 0x00, 0x01 }, // <----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset
{ CW( 6, 1), 0x0F, 0x10 }, //CW6_1 [7:4] 1 //Set clock source and target register
{ CW( 7, 1), 0xFC, 0x00 }, //CW7_1 [1:0] 0 //Disable calibration process
{ CW( 9, 0), 0xBF, 0x00 }, //CW9_0 [6:6] 0 //Resume to default value
{ CW( 17, 0), 0x3F, 0x00 }, //CW17_0 [7:6] 0 //Disable AAMP1 calibration
{ CW( 5, 0), 0xFD, 0x02 }, //CW5_0 [1:1] 1 //Turn on LNA input path
{ CW( 19, 0), 0xFD, 0x00 }, //CW19_0 [1:1] 0 //Disconnect test signal
};
#define CAL_PFOSC_COMMAND_COUNT_V5 22
static const ctrl_word_operation CalPfoscProcess_V5[CAL_PFOSC_COMMAND_COUNT_V5] = {
{ CW( 10, 0), 0xFE, 0x01 }, //CW10_0 [0:0] 1 //RFOSC_P,FROSC_CAL
{ CW( 10, 0), 0xFD, 0x02 }, //CW10_0 [1:1] 1 //Enable PTOSC calibraton and power on PTOSC
{ CW( 10, 0), 0xFD, 0x00 }, //CW10_0 [1:1] 0 //Reset PTOSC
{ CW( 10, 0), 0xFD, 0x02 }, //CW10_0 [1:1] 1 //Reset PTOSC
{ CW( 6, 1), 0x00, 0xEE }, //CW6_1 [7:0] 238 //Set clock ource and target register
{ CW( 25, 1), 0x00, 0x03 }, //CW25_1 [7:0] 3 //CNT_T_[11:8]
#if defined REF_CLK_32K //==============================================
{ CW( 25, 0), 0x00, 0x7B }, //CW25_0 [7:0] 123 //CNT_T_[7:0]
#elif defined REF_CLK_13M
{ CW( 25, 0), 0x00, 0x5E }, //CW25_0 [7:0] 94
#elif defined REF_CLK_26M
{ CW( 25, 0), 0x00, 0x5E }, //CW25_0 [7:0] 94
#endif //=================================================================
{ CW( 97, 0), 0x00, 0x08 }, //CW97_0 [7:0] 8 //
{ CW( 7, 1), 0xFC, 0x03 }, //CW7_0 [1:0] 3 //
{ CW( 3, 0), 0xEF, 0x10 }, //CW3_0 [4:4] 1 //
{ CW( 5, 1), 0x7F, 0x00 }, //CW5_1 [7:7] 0 //
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //WIN_EN
{ CW(127, 1), 0x00, 0x01 }, //<----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset CW1_0
{ CW( 6, 1), 0x00, 0xFE }, //CW6_1 [7:0] 254 //Set clock source and target register
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //WIN_EN
{ CW(127, 1), 0x00, 0x01 }, //<----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset CW1_0
{ CW( 6, 1), 0x00, 0x82 }, //CW6_1 [7:4] 130 //Set clock source and target register
{ CW( 7, 1), 0xFC, 0x00 }, //CW7_1 [1:0] 0 //Disable calibration process
// { CW( 97, 0), 0xE0, 0x0F }, /// CW97_0 [4:0] k=
// { CW( 3, 0), 0xEF, 0x00 }, /// CW3_0 [4:4] 0
};
#define CAL_DelayCalibration_COMMAND_COUNT_V5 18
static const ctrl_word_operation CalDelayCalibrationProcess_V5[CAL_DelayCalibration_COMMAND_COUNT_V5] = {
{ CW( 11, 1), 0xCF, 0x20 }, //CW11_1 [5:4] 2 //Enable delay calibration loop
{ CW( 6, 1), 0x0F, 0x80 }, //CW6_1 [7:4] 8 //Set target register(REFDI)
{ CW( 7, 1), 0xFC, 0x00 }, //CW7_1 [1:0] 0 //Disable calibration process
{ CW( 12, 1), 0xFC, 0x00 }, //CW12_1 [1:0] 0 //Enable PLL loop
{ CW( 6, 0), 0xFC, 0x01 }, //CW6_0 [1:0] 1 //Set windows source
{ CW( 7, 1), 0xFC, 0x03 }, //CW7_1 [1:0] 3 //Enable calibration
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //Clear all flag register
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //Start calibration
{ CW(127, 1), 0x00, 0x01 }, //<----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset CW1_0
{ CW( 6, 1), 0x0F, 0x90 }, //CW6_1 [7:4] 9 //Set target register(FBDI)
{ CW( 7, 1), 0xFC, 0x00 }, //CW7_1 [1:0] 0 //Disable calibraton porcess
{ CW( 6, 0), 0xFC, 0x01 }, //CW6_0 [1:0] 1 //Set windows source
{ CW( 7, 1), 0xFC, 0x03 }, //CW7_1 [1:0] 3 //Enable calibration
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //Clear all FLAG register
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //Start calibration
{ CW(127, 1), 0x00, 0x01 }, //<----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset CW1_0
// { CW( 11, 1), 0xCF, 0x10 }, //CW11_1 [5:4] 0 //Disable delay calibration loop
};
//end chip ID = 5
#define CAL_PFOSC_COMMAND_COUNT 18
static const ctrl_word_operation CalPfoscProcess[CAL_PFOSC_COMMAND_COUNT] = {
{ CW( 10, 0), 0xFE, 0x01 }, //CW10_0 [0:0] 1 //RFOSC_P,FROSC_CAL
{ CW( 10, 0), 0xFD, 0x02 }, //CW10_0 [1:1] 1 //FROSC_CAL
{ CW( 10, 0), 0xFD, 0x00 }, //CW10_0 [1:1] 0
{ CW( 10, 0), 0xFD, 0x02 }, //CW10_0 [1:1] 1
{ CW( 6, 1), 0x00, 0xEE }, //CW6_1 [7:0] 238 //CNT_S[2:0],TAR[3:0]
{ CW( 25, 1), 0xF0, 0x03 }, //CW25_1 [3:0] 3 //CNT_T_[11:8]
#if defined REF_CLK_32K //==============================================
{ CW( 25, 0), 0x00, 0x7A }, //CW25_0 [7:0] 122 //CNT_T_[7:0]
#elif defined REF_CLK_13M
{ CW( 25, 0), 0x00, 0x5E }, //CW25_0 [7:0] 94
#elif defined REF_CLK_26M
{ CW( 25, 0), 0x00, 0x5E }, //CW25_0 [7:0] 94
#endif //=================================================================
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //WIN_EN
{ CW(127, 1), 0x00, 0x01 }, //<----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset CW1_0
{ CW( 6, 1), 0x00, 0xFE }, //CW6_1 [7:0] 254 //CNT_S[2:0],TAR[3:0]
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //WIN_EN
{ CW(127, 1), 0x00, 0x01 }, //<----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset CW1_0
{ CW( 6, 1), 0x0F, 0x10 }, //CW6_1 [7:4] 1 //CNT_S[2:0],TAR[3:0]
{ CW( 7, 1), 0xFC, 0x00 }, //CW7_1 [1:0] 0 //CAL[1:0]
// { CW( 97, 0), 0xE0, 0x0F }, /// CW97_0 [4:0] k=
// { CW( 3, 0), 0xEF, 0x00 }, /// CW3_0 [4:4] 0
};
#define CAL_DelayCalibration_COMMAND_COUNT 19
static const ctrl_word_operation CalDelayCalibrationProcess[CAL_DelayCalibration_COMMAND_COUNT] = {
{ CW( 11, 1), 0xCF, 0x20 }, //CW11_1 [5:4] 2 //Enable delay calibration loop
{ CW( 6, 1), 0x0F, 0x80 }, //CW6_1 [7:4] 8 //Set target register(REFDI)
{ CW( 7, 1), 0xFC, 0x00 }, //CW7_1 [1:0] 0 //Disable calibration process
{ CW( 12, 1), 0xFC, 0x00 }, //CW12_1 [1:0] 0 //Enable PLL loop
{ CW( 6, 0), 0xFC, 0x01 }, //CW6_0 [1:0] 1 //Set windows source
{ CW( 7, 1), 0xFC, 0x03 }, //CW7_1 [1:0] 3 //Enable calibration
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //Clear all flag register
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //Start calibration
{ CW(127, 1), 0x00, 0x01 }, //<----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset CW1_0
{ CW( 6, 1), 0x0F, 0x90 }, //CW6_1 [7:4] 9 //Set target register(FBDI)
{ CW( 7, 1), 0xFC, 0x00 }, //CW7_1 [1:0] 0 //Disable calibraton porcess
{ CW( 6, 0), 0xFC, 0x01 }, //CW6_0 [1:0] 1 //Set windows source
{ CW( 7, 1), 0xFC, 0x03 }, //CW7_1 [1:0] 3 //Enable calibration
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //Clear all FLAG register
{ CW( 6, 1), 0xFE, 0x01 }, //CW6_1 [0:0] 1 //Start calibration
{ CW(127, 1), 0x00, 0x01 }, //<----------------- polling SARIFG
{ CW( 1, 0), 0x00, 0x00 }, //CW1_0 [7:0] 0 //reset CW1_0
{ CW( 11, 1), 0xCF, 0x10 }, //CW11_1 [5:4] 0 //Disable delay calibration loop
};
static uint8 MT6188_ReadCache(uint8 CW)
{
if (CW < 58)
return cw_cache[CW];
else
return cw_cache[CW-134];
}
static bool MT6188_ReadByte(uint8 CW, uint8 *data)
{
if (CW == 255) {
*data = 0;
return true;
}
#if defined USE_I2C
SerialCommStart(); /// send the start sequence
SerialCommTxByte(MT6188_WRITE); /// device ID and R/W bit
SerialCommTxByte(CW); /// control word
SerialCommStart(); /// resend the start sequence
SerialCommTxByte(MT6188_READ); /// device ID and R/W bit
SerialCommRxByte(data, 0); /// read data and send ACK
SerialCommStop(); /// send the stop sequence
#elif defined USE_3_WIRE
SerialCommRxByte(CW, data);
#else
#error "Must define USE_I2C or USE_3_WIRE"
#endif
return true;
}
/* MT6188 does not support sequential write. */
static bool MT6188_WriteByte(uint8 CW, uint8 data)
{
if (CW == 255) {
uint8 i = 0;
uint8 dataRead;
do {
kal_sleep_task(1);
MT6188_ReadByte(CW(1,0), &dataRead);
if (i++ == 40) {
return false;
}
} while ((dataRead & data)==0);
return true;
}
#if defined USE_I2C
SerialCommStart(); /// send the start sequence
SerialCommTxByte(MT6188_WRITE); /// device ID and R/W bit
SerialCommTxByte(CW); /// control word
SerialCommTxByte(data); /// data to be written
SerialCommStop(); /// send the stop sequence
#elif defined USE_3_WIRE
SerialCommTxByte(CW, data);
#else
#error "Must define USE_I2C or USE_3_WIRE"
#endif
if (CW < 58)
cw_cache[CW] = data;
else
cw_cache[CW-134] = data;
#if defined MT6188_DEBUG
MT6188_ReadByte(CW, &dbg_cw_readback);
#endif
return true;
}
#if defined MT6188_DEBUG
static void MT6188_DumpCtrlWord(void) {
uint32 i;
for (i=0; i<29; i++)
{
MT6188_ReadByte((i<<1), &(cw_cache[i << 1]));
MT6188_ReadByte((i<<1)+1, &(cw_cache[(i << 1)+1]));
}
for (i=96; i<104; i++) {
MT6189_ReadByte((i<<1), &(cw_cache[(i-67) << 1]));
MT6189_ReadByte((i<<1)+1, &(cw_cache[((i-67) << 1) + 1]));
}
}
#endif
/***********************************************************************
* Engineer mode function (API)
*
* parameter-->group_idx: mono\stereo\RSSI_threshold\IF_count_delta
* item_idx: sub select index
* item_value: set parameter value
***********************************************************************/
void FMDrv_radio_item_info(kal_uint16 group_idx, kal_uint16 item_idx, kal_uint32 item_value)
{
uint8 TmpReg,TmpReg1;
SerialCommInit();
switch (group_idx)
{
case mono:
if(item_value == 1)
{
MT6188_ReadByte(CW(14, 0), &TmpReg1);
TmpReg1&=0x2F;
MT6188_WriteByte(CW(14, 0),TmpReg1|0x40);
mono_flag = 1;
}
else
{
MT6188_ReadByte(CW(14, 0), &TmpReg1);
TmpReg1&=0x2F;
MT6188_WriteByte(CW(14, 0),TmpReg1|0x80);
mono_flag = 2;
}
break;
case stereo:
if(item_value == 0)
{
MT6188_ReadByte(CW(14, 0), &TmpReg1);
TmpReg1&=0x2F;
MT6188_WriteByte(CW(14, 0),TmpReg1|0x40);
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