s3c44btimer.h

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/* s3c44bTimer.h - Samsung KS32C Timer driver header file */

/* Copyright 1984-2001 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01a,12apr01,m_h  created from snds100 template.
*/

#ifndef __INCs3c44bTimer
#define __INCs3c44bTimer
 
#ifdef __cplusplus
extern "C" {
#endif
 

/* timer registers */
#define S3C44B_TCFG0            (0x01d50000)         /* Configures the three 8-bit prescalers */
#define S3C44B_TCFG1            (0x01d50004)         /* 6-Mux & DMA mode seletion register */
#define S3C44B_TCON             (0x01d50008)         /* R/W Timer control register */

/* macro with dividers TCFG1 */
#define S3C44B_TIMER0_DIV_2     (0x0 << 0)
#define S3C44B_TIMER0_DIV_4     (0x1 << 0)
#define S3C44B_TIMER0_DIV_8     (0x2 << 0)
#define S3C44B_TIMER0_DIV_16    (0x3 << 0)
#define S3C44B_TIMER0_DIV_32    (0x4 << 0)

#define S3C44B_TIMER1_DIV_2     (0x0 << 4)
#define S3C44B_TIMER1_DIV_4     (0x1 << 4)
#define S3C44B_TIMER1_DIV_8     (0x2 << 4)
#define S3C44B_TIMER1_DIV_16    (0x3 << 4)
#define S3C44B_TIMER1_DIV_32    (0x4 << 4)

#define S3C44B_TIMER2_DIV_2     (0x0 << 8)
#define S3C44B_TIMER2_DIV_4     (0x1 << 8)
#define S3C44B_TIMER2_DIV_8     (0x2 << 8)
#define S3C44B_TIMER2_DIV_16    (0x3 << 8)
#define S3C44B_TIMER2_DIV_32    (0x4 << 8)

#define S3C44B_TIMER3_DIV_2     (0x0 << 12)
#define S3C44B_TIMER3_DIV_4     (0x1 << 12)
#define S3C44B_TIMER3_DIV_8     (0x2 << 12)
#define S3C44B_TIMER3_DIV_16    (0x3 << 12)
#define S3C44B_TIMER3_DIV_32    (0x4 << 12)

#define S3C44B_TIMER4_DIV_2     (0x0 << 16)
#define S3C44B_TIMER4_DIV_4     (0x1 << 16)
#define S3C44B_TIMER4_DIV_8     (0x2 << 16)
#define S3C44B_TIMER4_DIV_16    (0x3 << 16)
#define S3C44B_TIMER4_DIV_32    (0x4 << 16)

#define S3C44B_TIMER5_DIV_2     (0x0 << 20)
#define S3C44B_TIMER5_DIV_4     (0x1 << 20)
#define S3C44B_TIMER5_DIV_8     (0x2 << 20)
#define S3C44B_TIMER5_DIV_16    (0x3 << 20)
#define S3C44B_TIMER5_DIV_32    (0x4 << 20)

#define S3C44B_DMA__NOSEL		(0x0 << 24)
#define S3C44B_DMA_TIMER0		(0x1 << 24)
#define S3C44B_DMA_TIMER1		(0x2 << 24)
#define S3C44B_DMA_TIMER2		(0x3 << 24)
#define S3C44B_DMA_TIMER3		(0x4 << 24)
#define S3C44B_DMA_TIMER4		(0x5 << 24)
#define S3C44B_DMA_TIMER5		(0x6 << 24)

/* set up timers for intrerval mode, don't enable yet */
#define S3C44B_TIMER_INIT       0x0

/* macro definitions with TCON */
#define S3C44B_TIMER0_START     (1 << 0)               /* 0 = Stop 1 = Start for Timer 0 */
#define S3C44B_TIMER0_MANUAL    (1 << 1)               /* 0 = No operation 1 = Update TCNTB0, TCMPB0 */
#define S3C44B_TIMER0_INV       (1 << 2)               /* 0 = Inverter off 1 = Inverter on for TOUT0 */
#define S3C44B_TIMER0_AUTO      (1 << 3)               /* 0 = One-shot 1 = Interval mode(auto reload) */

#define S3C44B_DEADZONE_ON      (1 << 4)               /* 1= enable */

#define S3C44B_TIMER1_START     (1 << 8)               /* 0 = Stop 1 = Start for Timer 1 */
#define S3C44B_TIMER1_MANUAL    (1 << 9)               /* 1 = manual update TCNTB1,TCMPB1 */
#define S3C44B_TIMER1_INV       (1 << 10)              /* 1= Inverter on for TOUT1 */
#define S3C44B_TIMER1_AUTO      (1 << 11)              /* 1= auto reload */

#define S3C44B_TIMER2_START     (1 << 12)              /* 0 = Stop 1 = Start for Timer 1 */
#define S3C44B_TIMER2_MANUAL    (1 << 13)              /* 1 = manual update TCNTB2,TCMPB2 */
#define S3C44B_TIMER2_INV       (1 << 14)              /* 1= Inverter on for TOUT2 */
#define S3C44B_TIMER2_AUTO      (1 << 15)              /* 1= auto reload */

#define S3C44B_TIMER3_START     (1 << 16)              /* 0 = Stop 1 = Start for Timer 3 */
#define S3C44B_TIMER3_MANUAL    (1 << 17)              /* 1 = manual update TCNTB3,TCMPB3 */
#define S3C44B_TIMER3_INV       (1 << 18)              /* 1= Inverter on for TOUT3 */
#define S3C44B_TIMER3_AUTO      (1 << 19)              /* 1= auto reload */

#define S3C44B_TIMER4_START     (1 << 20)              /* 0 = Stop 1 = Start for Timer 1 */
#define S3C44B_TIMER4_MANUAL    (1 << 21)              /* 1 = manual update TCNTB4,TCMPB4 */
#define S3C44B_TIMER4_INV       (1 << 22)              /* 1= Inverter on for TOUT4 */
#define S3C44B_TIMER4_AUTO      (1 << 23)              /* 1= auto reload */

#define S3C44B_TIMER5_START     (1 << 24)              /* 0 = Stop 1 = Start for Timer 1 */
#define S3C44B_TIMER5_MANUAL    (1 << 25)              /* 1 = manual update TCNTB5,TCMPB5 */
#define S3C44B_TIMER5_AUTO      (1 << 26)              /* 1= auto reload */


#define S3C44B_TCNTB0           (0x01d5000c)         /* Timer 0 count buffer register */
#define S3C44B_TCMPB0           (0x01d50010)         /* Timer 0 compare buffer register */
#define S3C44B_TCNTO0           (0x01d50014)         /* R Timer 0 count observation register */

#define S3C44B_TCNTB1           (0x01d50018)         /* Timer 1 count buffer register */
#define S3C44B_TCMPB1           (0x01d5001c)         /* Timer 1 compare buffer register */
#define S3C44B_TCNTO1           (0x01d50020)         /* R Timer 1 count observation register */

#define S3C44B_TCNTB2           (0x01d50024)         /* Timer 2 count buffer register */
#define S3C44B_TCMPB2           (0x01d50028)         /* Timer 2 compare buffer register */
#define S3C44B_TCNTO2           (0x01d5002c)         /* R Timer 2 count observation register */

#define S3C44B_TCNTB3           (0x01d50030)         /* Timer 3 count buffer register */
#define S3C44B_TCMPB3           (0x01d50034)         /* Timer 3 compare buffer register */
#define S3C44B_TCNTO3           (0x01d50038)         /* R Timer 3 count observation register */

#define S3C44B_TCNTB4           (0x01d5003c)         /* Timer 4 count buffer register */
#define S3C44B_TCMPB4           (0x01d50040)         /* Timer 4 compare buffer register */
#define S3C44B_TCNTO4           (0x01d50044)         /* R Timer 4 count observation register */


#define S3C44B_TCNTB5           (0x01d50048)         /* Timer 5 count buffer register */
#define S3C44B_TCNTO5           (0x01d5004c)         /* R Timer 5 count observation register */


#ifdef __cplusplus
}
#endif
 
#endif  /* __INCs3c44bTimer */