rominit.s

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/*====================================
 * Change Base address of ROM and DRAM
 *====================================
 */
/* Multiple load LDMIA instruction cannot be used as there is 
 * no way to load the address L$_SystemInitData_S into a 
 * register (LDR Rn,=sym is broken)
 */
    LDR    r1, L$_SystemInitData_S 
    LDR    r2, L$_SystemInitData_S + 0x04
    LDR    r3, L$_SystemInitData_S + 0x08
    LDR    r4, L$_SystemInitData_S + 0x0c
    LDR    r5, L$_SystemInitData_S + 0x10
    LDR    r6, L$_SystemInitData_S + 0x14
    LDR    r7, L$_SystemInitData_S + 0x18
    LDR    r8, L$_SystemInitData_S + 0x1c
    LDR    r9, L$_SystemInitData_S + 0x20
    LDR    r10,L$_SystemInitData_S + 0x24
    LDR    r11,L$_SystemInitData_S + 0x28
    LDR    r12,L$_SystemInitData_S + 0x2c    
    LDR    r0, L$_SBCARM7Extdbwth
    STMIA  r0, {r1-r12}
    LDR    PC, L$_HiPosn
#endif

HiPosn:


    /*
     * Initialize the stack pointer to just before where the
     * uncompress code, copied from ROM to RAM, will run.
     */

    MOV    r0, r13        /* restore starttype to r0 from r13 */
    LDR    sp, L$_STACK_ADDR
    MOV    fp, #0            /* zero frame pointer */

    /* jump to C entry point in ROM: routine - entry point + ROM base */

#if    (CPU == ARMARCH4_T)
    LDR    r12, L$_rStrtInRom
    ORR    r12, r12, #1        /* force Thumb state */
    BX     r12
#else
    LDR    pc, L$_rStrtInRom
#endif    /* (CPU == ARMARCH4_T) */

/* Amine: 中断处理函数 */
_ARM_FUNCTION(romUndef)
_romUndef:
 sub sp, sp, #4
 stmfd sp!, {r0}
 ldr r0, L$_promUndef
 ldr r0, [r0]            
 str r0, [sp, #4]
 ldmfd sp!, {r0, pc}

_ARM_FUNCTION(romSwi)
_romSwi:
 sub sp, sp, #4
 stmfd sp!, {r0}
 ldr r0, L$_promSwi
 ldr r0, [r0]            
 str r0, [sp, #4]
 ldmfd sp!, {r0, pc}

_ARM_FUNCTION(romPrefetch)
_romPrefetch:
 sub sp, sp, #4
 stmfd sp!, {r0}
 ldr r0, L$_promPrefetch
 ldr r0, [r0]            
 str r0, [sp, #4]
 ldmfd sp!, {r0, pc}  

_ARM_FUNCTION(romDataAbort)
_romDataAbort:
 sub sp, sp, #4
 stmfd sp!, {r0}
 ldr r0, L$_promDataAbort
 ldr r0, [r0]            
 str r0, [sp, #4]
 ldmfd sp!, {r0, pc}
 
_ARM_FUNCTION(romReserved)
_romReserved:
 sub sp, sp, #4
 stmfd sp!, {r0}
 ldr r0, L$_promReserved
 ldr r0, [r0]            
 str r0, [sp, #4]
 ldmfd sp!, {r0, pc} 

_ARM_FUNCTION(romIRQ)
_romIRQ:
 sub sp, sp, #4
 stmfd sp!, {r0}
 ldr r0, L$_promIRQ
 ldr r0, [r0]            
 str r0, [sp, #4]
 ldmfd sp!, {r0, pc} 

_ARM_FUNCTION(romFIQ)
_romFIQ:
 sub sp, sp, #4
 stmfd sp!, {r0}
 ldr r0, L$_promFIQ
 ldr r0, [r0]            
 str r0, [sp, #4]
 ldmfd sp!, {r0, pc} 
   
/******************************************************************************/

/*
 * PC-relative-addressable pointers - LDR Rn,=sym is broken
 * note "_" after "$" to stop preprocessor preforming substitution
 */

    .balign    4

/* Amine: SDT调试,程序直接位于RAM中 */
#ifdef RAM_SIM
L$_HiPosn:
    .long    RAM_HIGH_ADRS + HiPosn - FUNC(romInit)
L$_rStrtInRom:
    .long    RAM_HIGH_ADRS + FUNC(romStart) - FUNC(romInit)
#else
L$_HiPosn:
    .long    ROM_TEXT_ADRS + HiPosn - FUNC(romInit)

L$_rStrtInRom:
    .long    ROM_TEXT_ADRS + FUNC(romStart) - FUNC(romInit)
#endif

L$_STACK_ADDR:
    .long    STACK_ADRS

L$_SBCARM7Intmsk:
    .long    S3C44B0X_INTMASK

/* Amine: added */
L$_SBCARM7Pllcon:
    .long    S3C44B0X_PLLCON    
L$_SBCARM7Locktime:
    .long    S3C44B0X_LOCKTIME    
L$_S3C44B0XWtcon:
    .long    S3C44B0X_WTCON
    
/* Amine: deleted */
/*L$_IopModReg:
    .long    SNGKS32C_IOPMOD*/
/* Amine: deleted */
/*L$_IopConReg:
    .long    SNGKS32C_IOPCON*/
/* Amine: deleted */
/*L$_IopDat:
    .long    SNGKS32C_IOPDATA*/

L$_SBCARM7Romcon0:
    .long    S3C44B0X_BANKCON0	/* Amine: SNGKS32C_ROMCON0->S3C44B0X_BANKCON0 */

L$_SBCARM7Extdbwth:
    .long    S3C44B0X_BWSCON	/* Amine: SNGKS32C_EXTDBWTH->S3C44B0X_BWSCON */

L$_SBCARM7Mrsrb7:               /* Amine: added */
    .long    S3C44B0X_MRSRB7

L$_SBCARM7Syscfg:
    .long    S3C44B0X_SYSCFG
/* Amine: deleted */
/*L$_SysCfg:
    .long    SYSCONFIG_VAL*/

L$_SysCfgSdram:
    .long    SYSCONFIG_VAL_SDRAM

L$_SBCARM7ClkCon:
    .long    S3C44B0X_CLKCON

L$_ClkCon:
    .long    rCLKCON

/* Amine: added */    
L$_PllCon:
    .long    rPLLCON
L$_LockTime:
    .long    rLOCKTIME

/* Amine: deleted */     
/*L$_SBCARM7ExtACon:
    .long    SNGKS32C_EXTACON0
    .long    SNGKS32C_EXTACON1*/
/* Amine: deleted */
/*L$_ExtACon:
    .long    rEXTACON0
    .long    rEXTACON1*/
#if 0 /* Amine: deleted */
L$_SystemInitData:
    .long    rEXTDBWTH    /* DRAM1(Half), ROM5(Byte), ROM1(Half), else 32bit */
    .long    rROMCON0     /* 0x0000000 ~ 0x40000, ROM0,256K,2cycle */
    .long    rROMCON1 
    .long    rROMCON2
    .long    rROMCON3
    .long    rROMCON4
    .long    rROMCON5
    .long    rDRAMCON0    /* 0x1000000 ~ 0x13FFFFF, DRAM0 4M, */
    .long    rDRAMCON1
    .long    rDRAMCON2
    .long    rDRAMCON3
    .long    rREFEXTCON    /* External I/O, Refresh */

L$_SystemInitData_S:
    .long    rEXTDBWTH    /* DRAM1(Half), ROM5(Byte), ROM1(Half), else 32bit */
    .long    rROMCON0_S    /* 0x1000000 ~ 0x1040000, ROM0,256K,2cycle */
    .long    rROMCON1
    .long    rROMCON2
    .long    rROMCON3
    .long    rROMCON4
    .long    rROMCON5
    .long    rDRAMCON0_S     /* 0x0000000 ~ 0x03FFFFF, DRAM0 */
    .long    rDRAMCON1
    .long    rDRAMCON2
    .long    rDRAMCON3
    .long    rREFEXTCON    /* External I/O, Refresh */
#endif
/*======================================================
 * SDRAM System Initialize Data (KS32C50100 only)
 *======================================================
 */
L$_SystemInitDataSDRAM:
    .long    rEXTDBWTH    /* DRAM1(Half), ROM5(Byte), ROM1(Half), else 32bit */
    .long    rROMCON0    /* 0x0000000 ~ 0x40000, ROM0,256K,2cycle */
    .long    rROMCON1
    .long    rROMCON2
    .long    rROMCON3
    .long    rROMCON4
    .long    rROMCON5
    .long    rSDRAMCON0    /* 0x1000000 ~ 0x13FFFFF, DRAM0 4M, */
    .long    rSDRAMCON1
#if 0 /* Amine: deleted */   
    .long    rSDRAMCON2
    .long    rSDRAMCON3
    .long    rSREFEXTCON    /* External I/O, Refresh */
#endif

    /* Amine: added */    
    .long    rSREFEXTCON
    .long    rBANKSIZE
    .long    rMRSRB6
    .long    rMRSRB7
        
#if 0	/* Amine: 内存不能重映射，不需要L$_SystemInitDataSDRAM_S等 */
L$_SystemInitDataSDRAM_S:
    .long    rEXTDBWTH    /* DRAM1(Half), ROM5(Byte), ROM1(Half), else 32bit */
    .long    rROMCON0_S    /* 0x1000000 ~ 0x1040000, ROM0,256K,2cycle */
    .long    rROMCON1
    .long    rROMCON2
    .long    rROMCON3
    .long    rROMCON4
    .long    rROMCON5
    .long    rSDRAMCON0_S    /* 0x0000000 ~ 0x03FFFFF, DRAM0 4M, */
    .long    rSDRAMCON1
    .long    rSDRAMCON2
    .long    rSDRAMCON3
    .long    rSREFEXTCON    /* External I/O, Refresh */

L$_pSystemInitData:
    .long    L$_SystemInitData

L$_pSystemInitData_S:
    .long    L$_SystemInitData_S
#endif

L$_pSystemInitDataSDRAM:
    .long    L$_SystemInitDataSDRAM

#if 0	/* Amine: deleted */
L$_pSystemInitDataSDRAM_S:
    .long    L$_SystemInitDataSDRAM_S
#endif

/* Amine: RAM中断入口 */
L$_promUndef:
    .long     S3C_EXC_BASE
L$_promSwi:
    .long     S3C_EXC_BASE + 4
L$_promPrefetch:
    .long     S3C_EXC_BASE + 8
L$_promDataAbort:
    .long     S3C_EXC_BASE + 12
L$_promReserved:
    .long     S3C_EXC_BASE + 16
L$_promIRQ:
    .long     S3C_EXC_BASE + 20
L$_promFIQ:
    .long     S3C_EXC_BASE + 24
/* Amine: 在L$_RomCopySize之前，保证计算正确 */
    
L$_RomCopySize:
    .long    L$_RomCopySize - FUNC(romInit)