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📄 smsc911x.c

📁 smsc911x.c smsc911x driver based vxworks network com 9700 stb cware dirver
💻 C
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/*
EXTERNAL INTERFACE
The driver provides two external interfaces to the card. The first is the END driver
interface, which exposes only the smsc91c111Load() routine. This routine expects the
<initString> parameter as input. This parameter passes in a colon-delimited string
of the format:

 "<unit>:<IOBase>:<interruptVector>:<interruptLevel>:<offset>:<configValue>

The smsc911xLoad() function uses scanf to parse the string.

TARGET-SPECIFIC PARAMETERS

.IP <unit>
Device unit number.

.IP <IOBase>
Base address of the IO port on the ISA bus.

.IP <interruptVector>
Interrupt Vector.

.IP <interruptLeve>
Interrupt Level.

.IP <offsent>
offset int cluster

IP <config value>
Configuration Parameter value for 100Mbps, 10Mbps, Half Duplex, Full Duplex,

SYSTEM RESOURCE USAGE
When implemented, this driver requires the following system resources:

    - one interrupt vector
	- I/O space for the device

The driver requires 1520 bytes of preallocation for Transmit Buffer and 1520*nRxFrames
of receive buffers. The default value of nRxFrames is 64 therefore total
pre-allocation is (64 + 1)*1520.

SEE ALSO: muxLib, endLib
.I "Writing an Enhanced Network Driver"
*/

/* includes */

/* The contents of this file are valid for Galileo in master mode only */

#include "vxWorks.h"
#include "config.h"
#include "common.h"

#ifdef INCLUDE_NETWORK
#include "stdlib.h"
#include "cacheLib.h"
#include "intLib.h"
#include "end.h"			/* Common END structures. */
#include "endLib.h"
#include "lstLib.h"			/* Needed to maintain protocol list. */
#include "wdLib.h"
#include "iv.h"
#include "semLib.h"
#include "etherLib.h"
#include "logLib.h"
#include "netLib.h"
#include "netBufLib.h"
#include "stdio.h"
#include "sysLib.h"
#include "errno.h"
#include "errnoLib.h"
#include "memLib.h"
#include "iosLib.h"
#undef	ETHER_MAP_IP_MULTICAST
#include "etherMultiLib.h"		/* multicast stuff. */
#include "end.h"
#include "muxLib.h"
#include "etherLib.h"
#include "net/mbuf.h"
#include "net/unixLib.h"
#include "net/protosw.h"
#include "net/systm.h"
#include "net/if_subr.h"
#include "net/route.h"

#include "netinet/in.h"

#include "sys/socket.h"
#include "sys/ioctl.h"
#include "sys/times.h"
#include "arpLib.h"

#include "bsp_api.h"

#define	SMSC_BASE	0x87000000

/* 
	type macro
 */

typedef unsigned long DWORD;
typedef unsigned short WORD;
typedef unsigned char BOOLEAN;

#define HIBYTE(word)  ((UCHAR)(((WORD)(word))>>8))
#define LOBYTE(word)  ((UCHAR)(((WORD)(word))&0x00FFU))
#define HIWORD(dWord) ((WORD)(((DWORD)(dWord))>>16))
#define LOWORD(dWord) ((WORD)(((DWORD)(dWord))&0x0000FFFFUL))


/*
  debug micro
  */

DWORD debug_mode= 0xF;

#undef USE_PHY_WORK_AROUND

#undef USE_TRACE
#undef USE_WARNING
#define USE_ASSERT

/*******************************************************
* Macro: SMSC_TRACE
* Description: 
*    This macro is used like printf. 
*    It can be used anywhere you want to display information
*    For any release version it should not be left in 
*      performance sensitive Tx and Rx code paths.
*    To use this macro define USE_TRACE and set bit 0 of debug_mode
*******************************************************/
#ifdef USE_TRACE
extern DWORD debug_mode;
#ifndef USE_WARNING
#define USE_WARNING
#endif
#define SMSC_TRACE(msg,args...)			\
	if(debug_mode&0x01UL) {					\
		printf("SMSC: " msg, ## args);	\
	}
#else
#define SMSC_TRACE(msg,args...)
#endif

/*******************************************************
* Macro: SMSC_WARNING
* Description: 
*    This macro is used like printf. 
*    It can be used anywhere you want to display warning information
*    For any release version it should not be left in 
*      performance sensitive Tx and Rx code paths.
*    To use this macro define USE_TRACE or 
*      USE_WARNING and set bit 1 of debug_mode
*******************************************************/
#ifdef USE_WARNING
extern DWORD debug_mode;
#ifndef USE_ASSERT
#define USE_ASSERT
#endif
#define SMSC_WARNING(msg, args...)				\
	if(debug_mode&0x02UL) {							\
		printf("SMSC_WARNING: " msg,## args);	\
	}
#else
#define SMSC_WARNING(msg, args...)
#endif


/*******************************************************
* Macro: SMSC_ASSERT
* Description: 
*    This macro is used to test assumptions made when coding. 
*    It can be used anywhere, but is intended only for situations
*      where a failure is fatal. 
*    If code execution where allowed to continue it is assumed that 
*      only further unrecoverable errors would occur and so this macro
*      includes an infinite loop to prevent further corruption.
*    Assertions are only intended for use during developement to 
*      insure consistency of logic through out the driver.
*    A driver should not be released if assertion failures are 
*      still occuring.
*    To use this macro define USE_TRACE or USE_WARNING or
*      USE_ASSERT
*******************************************************/
#ifdef USE_ASSERT
#define SMSC_ASSERT(condition)													\
	if(!(condition)) {																\
		printf("SMSC_ASSERTION_FAILURE: File=" __FILE__ ", Line=%d\n",__LINE__);	\
		while(1);																	\
	}
#else
#define SMSC_ASSERT(condition)
#endif

/* 
	register access routine
  */

DWORD Lan_GetRegDW(DWORD dwLanBase, DWORD dwOffset) ;
VOID     Lan_SetRegDW(DWORD dwLanBase, DWORD dwOffset, DWORD dwVal) ;
VOID     Lan_ClrBitsDW(DWORD dwLanBase, DWORD dwOffset ,DWORD dwBits) ;
VOID     Lan_SetBitsDW(DWORD dwLanBase, DWORD dwOffset,  DWORD dwBits) ;

/* Below are the register offsets and bit definitions
/ of the Lan911x memory space */
#define RX_DATA_FIFO	    (0x00UL)

#define TX_DATA_FIFO        (0x20UL)
#define		TX_CMD_A_ON_COMP_			(0x80000000UL)
#define		TX_CMD_A_BUF_END_ALGN_		(0x03000000UL)
#define		TX_CMD_A_4_BYTE_ALGN_		(0x00000000UL)
#define		TX_CMD_A_16_BYTE_ALGN_		(0x01000000UL)
#define		TX_CMD_A_32_BYTE_ALGN_		(0x02000000UL)
#define		TX_CMD_A_DATA_OFFSET_		(0x001F0000UL)
#define		TX_CMD_A_FIRST_SEG_			(0x00002000UL)
#define		TX_CMD_A_LAST_SEG_			(0x00001000UL)
#define		TX_CMD_A_BUF_SIZE_			(0x000007FFUL)
#define		TX_CMD_B_PKT_TAG_			(0xFFFF0000UL)
#define		TX_CMD_B_ADD_CRC_DISABLE_	(0x00002000UL)
#define		TX_CMD_B_DISABLE_PADDING_	(0x00001000UL)
#define		TX_CMD_B_PKT_BYTE_LENGTH_	(0x000007FFUL)

#define RX_STATUS_FIFO      (0x40UL)
#define		RX_STS_ES_			(0x00008000UL)
#define		RX_STS_MCAST_		(0x00000400UL)
#define RX_STATUS_FIFO_PEEK (0x44UL)
#define TX_STATUS_FIFO		(0x48UL)
#define 		TX_STS_ES_			(0x00008000UL)
#define TX_STATUS_FIFO_PEEK (0x4CUL)
#define ID_REV              (0x50UL)
#define		ID_REV_CHIP_ID_		(0xFFFF0000UL)	
#define		ID_REV_REV_ID_		(0x0000FFFFUL)	

#define INT_CFG				(0x54UL)
#define		INT_CFG_INT_DEAS_		(0xFF000000UL)	
#define     INT_CFG_INT_DEAS_CLR_	(0x00004000UL) 
#define     INT_CFG_INT_DEAS_STS_	(0x00002000UL) 
#define		INT_CFG_IRQ_INT_		(0x00001000UL)
#define		INT_CFG_IRQ_EN_			(0x00000100UL)
#define		INT_CFG_IRQ_POL_		(0x00000010UL)
#define		INT_CFG_IRQ_TYPE_		(0x00000001UL)

#define INT_STS				(0x58UL)
#define		INT_STS_SW_INT_		(0x80000000UL)
#define		INT_STS_TXSTOP_INT_	(0x02000000UL)
#define		INT_STS_RXSTOP_INT_	(0x01000000UL)
#define		INT_STS_RXDFH_INT_	(0x00800000UL)
#define		INT_STS_RXDF_INT_	(0x00400000UL)	
#define		INT_STS_TX_IOC_		(0x00200000UL)
#define		INT_STS_RXD_INT_	(0x00100000UL)	
#define		INT_STS_GPT_INT_	(0x00080000UL)	
#define		INT_STS_PHY_INT_	(0x00040000UL)	
#define		INT_STS_PME_INT_	(0x00020000UL)	
#define		INT_STS_TXSO_		(0x00010000UL)	
#define		INT_STS_RWT_		(0x00008000UL)	
#define		INT_STS_RXE_		(0x00004000UL)	
#define		INT_STS_TXE_		(0x00002000UL)	
#define		INT_STS_TDFU_		(0x00000800UL)	
#define		INT_STS_TDFO_		(0x00000400UL)	
#define		INT_STS_TDFA_		(0x00000200UL)	
#define		INT_STS_TSFF_		(0x00000100UL)	
#define		INT_STS_TSFL_		(0x00000080UL)	
#define		INT_STS_RXDF_		(0x00000040UL)	
#define		INT_STS_RDFL_		(0x00000020UL)	
#define		INT_STS_RSFF_		(0x00000010UL)	
#define		INT_STS_RSFL_		(0x00000008UL)	
#define		INT_STS_GPIO2_INT_	(0x00000004UL)	
#define		INT_STS_GPIO1_INT_	(0x00000002UL)	
#define		INT_STS_GPIO0_INT_	(0x00000001UL)	

#define INT_EN				(0x5CUL)
#define		INT_EN_SW_INT_EN_		(0x80000000UL)	
#define		INT_EN_TXSTOP_INT_EN_	(0x02000000UL)	
#define		INT_EN_RXSTOP_INT_EN_	(0x01000000UL)	
#define		INT_EN_RXDFH_INT_EN_	(0x00800000UL)	
#define		INT_EN_TIOC_INT_EN_		(0x00200000UL)	
#define		INT_EN_RXD_INT_EN_		(0x00100000UL)	
#define		INT_EN_GPT_INT_EN_		(0x00080000UL)	
#define		INT_EN_PHY_INT_EN_		(0x00040000UL)	
#define		INT_EN_PME_INT_EN_		(0x00020000UL)	
#define		INT_EN_TXSO_EN_			(0x00010000UL)	
#define		INT_EN_RWT_EN_			(0x00008000UL)	
#define		INT_EN_RXE_EN_			(0x00004000UL)	
#define		INT_EN_TXE_EN_			(0x00002000UL)	
#define		INT_EN_TDFU_EN_			(0x00000800UL)	
#define		INT_EN_TDFO_EN_			(0x00000400UL)	
#define		INT_EN_TDFA_EN_			(0x00000200UL)	
#define		INT_EN_TSFF_EN_			(0x00000100UL)	
#define		INT_EN_TSFL_EN_			(0x00000080UL)	
#define		INT_EN_RXDF_EN_			(0x00000040UL)	
#define		INT_EN_RDFL_EN_			(0x00000020UL)	
#define		INT_EN_RSFF_EN_			(0x00000010UL)	
#define		INT_EN_RSFL_EN_			(0x00000008UL)	
#define		INT_EN_GPIO2_INT_		(0x00000004UL)	
#define		INT_EN_GPIO1_INT_		(0x00000002UL)	
#define		INT_EN_GPIO0_INT_		(0x00000001UL)	

#define BYTE_TEST				(0x64UL)
#define FIFO_INT				(0x68UL)
#define		FIFO_INT_TX_AVAIL_LEVEL_	(0xFF000000UL)	
#define		FIFO_INT_TX_STS_LEVEL_		(0x00FF0000UL)	
#define		FIFO_INT_RX_AVAIL_LEVEL_	(0x0000FF00UL)	
#define		FIFO_INT_RX_STS_LEVEL_		(0x000000FFUL)	

#define RX_CFG					(0x6CUL)
#define		RX_CFG_RX_END_ALGN_		(0xC0000000UL)	
#define			RX_CFG_RX_END_ALGN4_		(0x00000000UL)	
#define			RX_CFG_RX_END_ALGN16_		(0x40000000UL)	
#define			RX_CFG_RX_END_ALGN32_		(0x80000000UL)	
#define		RX_CFG_RX_DMA_CNT_		(0x0FFF0000UL)	
#define		RX_CFG_RX_DUMP_			(0x00008000UL)	
#define		RX_CFG_RXDOFF_			(0x00001F00UL)	

#define TX_CFG					(0x70UL)
#define		TX_CFG_TXS_DUMP_		(0x00008000UL)	
#define		TX_CFG_TXD_DUMP_		(0x00004000UL)	
#define		TX_CFG_TXSAO_			(0x00000004UL)	
#define		TX_CFG_TX_ON_			(0x00000002UL)	
#define		TX_CFG_STOP_TX_			(0x00000001UL)	

#define HW_CFG					(0x74UL)
#define		HW_CFG_TTM_				(0x00200000UL)	
#define		HW_CFG_SF_				(0x00100000UL)	
#define		HW_CFG_TX_FIF_SZ_		(0x000F0000UL)	
#define		HW_CFG_TR_				(0x00003000UL)	
#define     HW_CFG_PHY_CLK_SEL_		(0x00000060UL)  
#define         HW_CFG_PHY_CLK_SEL_INT_PHY_	(0x00000000UL) 
#define         HW_CFG_PHY_CLK_SEL_EXT_PHY_	(0x00000020UL) 
#define         HW_CFG_PHY_CLK_SEL_CLK_DIS_	(0x00000040UL) 
#define     HW_CFG_SMI_SEL_			(0x00000010UL)  
#define     HW_CFG_EXT_PHY_DET_		(0x00000008UL)  
#define     HW_CFG_EXT_PHY_EN_		(0x00000004UL)  
#define		HW_CFG_32_16_BIT_MODE_	(0x00000004UL)	
#define     HW_CFG_SRST_TO_			(0x00000002UL)  
#define		HW_CFG_SRST_			(0x00000001UL)	

#define RX_DP_CTRL				(0x78UL)
#define		RX_DP_CTRL_RX_FFWD_		(0x80000000UL)	

#define RX_FIFO_INF				(0x7CUL)
#define		RX_FIFO_INF_RXSUSED_	(0x00FF0000UL)	
#define		RX_FIFO_INF_RXDUSED_	(0x0000FFFFUL)	

#define TX_FIFO_INF				(0x80UL)
#define		TX_FIFO_INF_TSUSED_		(0x00FF0000UL)  
#define		TX_FIFO_INF_TDFREE_		(0x0000FFFFUL)

#define PMT_CTRL				(0x84UL)
#define		PMT_CTRL_PM_MODE_			(0x00003000UL)	
#define	        PMT_CTRL_PM_MODE_D0_	(0x00000000UL)  
#define         PMT_CTRL_PM_MODE_D1_	(0x00001000UL)  
#define         PMT_CTRL_PM_MODE_D2_	(0x00002000UL)  
#define         PMT_CTRL_PM_MODE_D3_	(0x00003000UL)  
#define		PMT_CTRL_PHY_RST_			(0x00000400UL)	
#define		PMT_CTRL_WOL_EN_			(0x00000200UL)	
#define		PMT_CTRL_ED_EN_				(0x00000100UL)	
#define		PMT_CTRL_PME_TYPE_			(0x00000040UL)	
#define		PMT_CTRL_WUPS_				(0x00000030UL)	
#define			PMT_CTRL_WUPS_NOWAKE_		(0x00000000UL)	
#define			PMT_CTRL_WUPS_ED_			(0x00000010UL)	
#define			PMT_CTRL_WUPS_WOL_			(0x00000020UL)	
#define			PMT_CTRL_WUPS_MULTI_		(0x00000030UL)	
#define		PMT_CTRL_PME_IND_		(0x00000008UL)	
#define		PMT_CTRL_PME_POL_		(0x00000004UL)	
#define		PMT_CTRL_PME_EN_		(0x00000002UL)	
#define		PMT_CTRL_READY_			(0x00000001UL)	

#define GPIO_CFG				(0x88UL)
#define		GPIO_CFG_LED3_EN_		(0x40000000UL)	
#define		GPIO_CFG_LED2_EN_		(0x20000000UL)	
#define		GPIO_CFG_LED1_EN_		(0x10000000UL)	
#define		GPIO_CFG_GPIO2_INT_POL_	(0x04000000UL)	
#define		GPIO_CFG_GPIO1_INT_POL_	(0x02000000UL)	
#define		GPIO_CFG_GPIO0_INT_POL_	(0x01000000UL)	
#define		GPIO_CFG_EEPR_EN_		(0x00700000UL)	
#define		GPIO_CFG_GPIOBUF2_		(0x00040000UL)	
#define		GPIO_CFG_GPIOBUF1_		(0x00020000UL)	
#define		GPIO_CFG_GPIOBUF0_		(0x00010000UL)	
#define		GPIO_CFG_GPIODIR2_		(0x00000400UL)	
#define		GPIO_CFG_GPIODIR1_		(0x00000200UL)	
#define		GPIO_CFG_GPIODIR0_		(0x00000100UL)	
#define		GPIO_CFG_GPIOD4_		(0x00000020UL)	
#define		GPIO_CFG_GPIOD3_		(0x00000010UL)	
#define		GPIO_CFG_GPIOD2_		(0x00000004UL)	
#define		GPIO_CFG_GPIOD1_		(0x00000002UL)	
#define		GPIO_CFG_GPIOD0_		(0x00000001UL)	

#define GPT_CFG					(0x8CUL)
#define		GPT_CFG_TIMER_EN_		(0x20000000UL)	
#define		GPT_CFG_GPT_LOAD_		(0x0000FFFFUL)	

#define GPT_CNT					(0x90UL)
#define		GPT_CNT_GPT_CNT_		(0x0000FFFFUL)	

#define ENDIAN					(0x98UL)
#define FREE_RUN				(0x9CUL)
#define RX_DROP					(0xA0UL)
#define MAC_CSR_CMD				(0xA4UL)
#define		MAC_CSR_CMD_CSR_BUSY_	(0x80000000UL)	
#define		MAC_CSR_CMD_R_NOT_W_	(0x40000000UL)	
#define		MAC_CSR_CMD_CSR_ADDR_	(0x000000FFUL)	

#define MAC_CSR_DATA			(0xA8UL)
#define AFC_CFG					(0xACUL)
#define		AFC_CFG_AFC_HI_			(0x00FF0000UL)	
#define		AFC_CFG_AFC_LO_			(0x0000FF00UL)	
#define		AFC_CFG_BACK_DUR_		(0x000000F0UL)	
#define		AFC_CFG_FCMULT_			(0x00000008UL)	
#define		AFC_CFG_FCBRD_			(0x00000004UL)	
#define		AFC_CFG_FCADD_			(0x00000002UL)	
#define		AFC_CFG_FCANY_			(0x00000001UL)	

#define E2P_CMD					(0xB0UL)
#define		E2P_CMD_EPC_BUSY_		(0x80000000UL)	
#define		E2P_CMD_EPC_CMD_		(0x70000000UL)	
#define			E2P_CMD_EPC_CMD_READ_	(0x00000000UL)	
#define			E2P_CMD_EPC_CMD_EWDS_	(0x10000000UL)	
#define			E2P_CMD_EPC_CMD_EWEN_	(0x20000000UL)	
#define			E2P_CMD_EPC_CMD_WRITE_	(0x30000000UL)	
#define			E2P_CMD_EPC_CMD_WRAL_	(0x40000000UL)	
#define			E2P_CMD_EPC_CMD_ERASE_	(0x50000000UL)	
#define			E2P_CMD_EPC_CMD_ERAL_	(0x60000000UL)	
#define			E2P_CMD_EPC_CMD_RELOAD_	(0x70000000UL)  
#define		E2P_CMD_EPC_TIMEOUT_	(0x00000200UL)	
#define		E2P_CMD_MAC_ADDR_LOADED_	(0x00000100UL)	
#define		E2P_CMD_EPC_ADDR_		(0x000000FFUL)	

#define E2P_DATA				(0xB4UL)
#define		E2P_DATA_EEPROM_DATA_	(0x000000FFUL)	

/*end of lan register offsets and bit definitions*/
#define LAN_REGISTER_EXTENT		(0x00000100UL)

#define LINK_OFF				(0x00UL)
#define LINK_SPEED_10HD			(0x01UL)
#define LINK_SPEED_10FD			(0x02UL)
#define LINK_SPEED_100HD		(0x04UL)
#define LINK_SPEED_100FD		(0x08UL)

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