sys_init.c

bf533音訊處理 使用visual audio 軟件

// Copyright(c) 2005 Analog Devices, Inc. All Rights Reserved.
// This software is proprietary and confidential to Analog Devices, Inc. and its licensors.

// File    : $Id: //depot/Development/VisualAudio/Platforms/EZKit_BF533_Basic/2.5.0/SYS_Init.c#3 $ 
// Part of : VisualAudio V2.5.0 
// Updated : $Date: 2006/10/12 $ by $Author: Fernando $

/**************************************************************************************************

Description:    Initialize system devices except Audio device

**************************************************************************************************/

#include "Basic.h"

#include <cplb.h>
#include <services/services.h>
#include <drivers/adi_dev.h>

#pragma retain_name    
int __cplb_ctrl =  CPLB_ENABLE_CPLBS | CPLB_ENABLE_ICACHE | CPLB_ENABLE_DCACHE | CPLB_ENABLE_DCACHE2;

section ("cplb_data")
int dcplbs_table[23] = {
    0xFF900000,    (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT),    // L1 Data B
    0xFF800000,    (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT),    // L1 Data A
    0x20200000,    (PAGE_SIZE_1MB | CPLB_DNOCACHE),    // Async Memory Bank 2 (Secnd)
    0x20100000,    (PAGE_SIZE_1MB | CPLB_DDOCACHE),    // Async Memory Bank 1 (Prim B)
    0x20000000,    (PAGE_SIZE_1MB | CPLB_DDOCACHE),    // Async Memory Bank 0 (Prim A)

    0x01400000,    (PAGE_SIZE_1MB | CPLB_DDOCACHE),    // write-through mode
    0x01000000,    (PAGE_SIZE_4MB | CPLB_DNOCACHE),    // non-cache mode area
    0x00C00000,    (PAGE_SIZE_4MB | CPLB_DNOCACHE | CPLB_L1_CHBL | CPLB_DIRTY), // Write back mode
    0x00800000,    (PAGE_SIZE_4MB | CPLB_DNOCACHE | CPLB_L1_CHBL | CPLB_DIRTY), // Write back mode
    0x00400000,    (PAGE_SIZE_4MB | CPLB_DNOCACHE),     // non-cache mode area
    0x00000000,    (PAGE_SIZE_4MB | CPLB_DNOCACHE | CPLB_L1_CHBL | CPLB_DIRTY), // Write back mode

    0xffffffff};    // end of section - termination

section ("cplb_data")
int icplbs_table[21] = {
    0xFFA00000,    (PAGE_SIZE_1MB | CPLB_I_PAGE_MGMT),    // L1 Code
    0x20200000,    (PAGE_SIZE_1MB | CPLB_INOCACHE),    // Async Memory Bank 2 (Secnd)
    0x20100000,    (PAGE_SIZE_1MB | CPLB_IDOCACHE),    // Async Memory Bank 1 (Prim B)
    0x20000000,    (PAGE_SIZE_1MB | CPLB_IDOCACHE),    // Async Memory Bank 0 (Prim A)

    0x01400000,    (PAGE_SIZE_4MB | CPLB_IDOCACHE),    // 8x4MB pages.
    0x01000000,    (PAGE_SIZE_4MB | CPLB_IDOCACHE),    // 
    0x00C00000,    (PAGE_SIZE_4MB | CPLB_IDOCACHE),    // 
    0x00800000,    (PAGE_SIZE_4MB | CPLB_IDOCACHE),    // 
    0x00400000,    (PAGE_SIZE_4MB | CPLB_IDOCACHE),    // 
    0x00000000,    (PAGE_SIZE_4MB | CPLB_IDOCACHE),    // 

    0xffffffff};    // end of section - termination

/*********************************************************************

System service  and Driver model support definitions

*********************************************************************/

// device manager handle
ADI_DEV_MANAGER_HANDLE   DevMgrHandle;    // handle for the device manager

// DMA manager handle
ADI_DMA_MANAGER_HANDLE   DMAMgrHandle;    // handle for the DMA manager

/* interrupt manager memory 
(base memory + secondary memory for 5 DMA channels, each require 2 interrupt memory - one to handle DMA data interrupt & other to handle DMA error interrupt) */
static u8 IntMgrMem[(10 * ADI_INT_SECONDARY_MEMORY)];

// storage for DMA manager memory (3 channel(SPI + RX/TX) usage) - SPI uses DMA with recent update
static u8 DMAMgrMem[ADI_DMA_BASE_MEMORY + (3 * ADI_DMA_CHANNEL_MEMORY)];

// device manager memory (base memory + 3 device memory (AD1836, SPI, SPORT)
static u8 DevMgrMem[ADI_DEV_BASE_MEMORY + (3 * ADI_DEV_DEVICE_MEMORY)];

// storage for critical region data
static ADI_INT_CRITICAL_REGION_DATA     CriticalRegionData;

#if (RENDER_AT_LOWER_INTERRUPT_LEVEL)
// user interrupt 0 ISR
ADI_INT_HANDLER(FWRender);
#endif

/*********************************************************************

    Function:       ExceptionHandler
    
    Description:    We should never get an exception,

*********************************************************************/
static ADI_INT_HANDLER(ExceptionHandler)
{
	for(;;);
    return (ADI_INT_RESULT_PROCESSED);
}

/*********************************************************************

    Function:       HWErrorHandler
    
    Description:    We should never get a hardware error,

*********************************************************************/
static ADI_INT_HANDLER(HWErrorHandler)
{
	for(;;);
    return (ADI_INT_RESULT_PROCESSED);
}

/*********************************************************************
*
*    Function:        InitSystem
*
*   Description:    This function initialize all the required system
*                   service routines, and the device manager.
*               
*********************************************************************/
#ifndef NO_OPTIMIZE
#pragma optimize_for_space
#endif
static void InitSystem(void)
{
    unsigned int result;
    u32 ResponseCount;

    // command pair for configuring the Power Manager
    ADI_PWR_COMMAND_PAIR        PwrMgrConfigTable[] =
    {
        { ADI_PWR_CMD_SET_EZKIT, (void *)PWR_MANGER_EZKIT_PRESET },// configuration for the Blackfin EzKit
        { ADI_PWR_CMD_END,              NULL },
    };
    
    // initialize the Interrupt Manger
    result = adi_int_Init(IntMgrMem,    // pointer to the memory used by the Interrupt Manger
                sizeof(IntMgrMem),      // size of the memory used by the Interrupt Manger
                &ResponseCount,         // response count of the instance
                NULL);                  // NULL for critical section argument
    if (result != ADI_DEV_RESULT_SUCCESS) ErrorMessage("INT_MGR init failed!\n");
    
    // initialize the Power Manger
    result = adi_pwr_Init(PwrMgrConfigTable);
    if (result != ADI_DEV_RESULT_SUCCESS) ErrorMessage("PWR_MGR init failed!\n");
    
    // set the PLL frequency to maximum possible
    result = adi_pwr_SetFreq(   0,      // Core clock frequency (MHz)
                                0,      // System clock frequency (MHz) 
                                ADI_PWR_DF_NONE);   // let the module decide for the PLL input divider

    // initialize the DMA Manger
    result = adi_dma_Init(DMAMgrMem,    // pointer to the memory used by the DMA Manager
                sizeof(DMAMgrMem),      // size of the memory used by the DMA Manager
                &ResponseCount,         // response count of the instance
                &DMAMgrHandle,          // pointer to the DMA Manger handle
                NULL);                  // NULL for critical section argument
    if (result != ADI_DEV_RESULT_SUCCESS) ErrorMessage("DMA init failed!\n");
    
    // hook the exception interrupt
    adi_int_CECHook(3, ExceptionHandler, NULL, FALSE) ;
    
    // hook the hardware error
    adi_int_CECHook(5, HWErrorHandler, NULL, FALSE); 
#if (RENDER_AT_LOWER_INTERRUPT_LEVEL)
    // hook user ISR0
    adi_int_CECHook(USER_ISR0, FWRender, NULL, TRUE);
#endif
    // initialize the Device Manager    
    result = adi_dev_Init(DevMgrMem,    // pointer to the memory used by the Device Manager
                    sizeof(DevMgrMem),  // size of the memory used by the Device Manager
                    &ResponseCount,     // response count of the instance
                    &DevMgrHandle,      // pointer to the Device Manager handle
                    &CriticalRegionData);   // global critical section argument
    if (result != ADI_DEV_RESULT_SUCCESS) ErrorMessage("DEV_MGR init failed!\n");
}

/////////////////////////////////////////////////////////////////////////////////
// FIXME : used temporarily until the service library support these registers
#ifndef NO_OPTIMIZE
#pragma optimize_for_space
#endif
static void Init_EBIU(void)
{
    *pEBIU_AMBCTL0    = 0x7bb07bb0;
    *pEBIU_AMBCTL1    = 0x7bb07bb0;
    *pEBIU_AMGCTL    = 0x000f;    // this is required for AD1836 initialization
}
/////////////////////////////////////////////////////////////////////////////////

#ifndef NO_OPTIMIZE
#pragma optimize_for_space
#endif
void SYS_Init(void)
{
    Init_EBIU();

    // initialize system services and device manager
    InitSystem();
}