📄 swsram.c
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/*
* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
* All rights reserved.
*
* This software is copyrighted by and is the sole property of
* VIA Networking Technologies, Inc. This software may only be used
* in accordance with the corresponding license agreement. Any unauthorized
* use, duplication, transmission, distribution, or disclosure of this
* software is expressly forbidden.
*
* This software is provided by VIA Networking Technologies, Inc. "as is"
* and any express or implied warranties, including, but not limited to, the
* implied warranties of merchantability and fitness for a particular purpose
* are disclaimed. In no event shall VIA Networking Technologies, Inc.
* be liable for any direct, indirect, incidental, special, exemplary, or
* consequential damages.
*
*
* File: swsram.c
*
* Purpose: ASIC embedded SRAM hardware accessing functions
*
* Author: Tevin Chen
*
* Date: Jan 08, 2002
*
* Functions:
*
* Revision History:
*
*/
#if !defined(__SWITCH_H__)
#include "switch.h"
#endif
#if !defined(__SWREG_H__)
#include "swreg.h"
#endif
#if !defined(__SWSRAM_H__)
#include "swsram.h"
#endif
/*--------------------- Static Definitions ------------------------*/
#define PTN_SRAM_STS_DONE 0x01
#define PTN_SRAM_STS_BUSY 0x02
#define PTN_SRAM_CMD_READ 0x01
#define PTN_SRAM_CMD_WRITE 0x02
/*--------------------- Static Types ------------------------------*/
/*--------------------- Static Macros -----------------------------*/
/*--------------------- Static Classes ----------------------------*/
/*--------------------- Static Variables --------------------------*/
/*--------------------- Static Functions --------------------------*/
/*--------------------- Export Variables --------------------------*/
BOOL SWSRAM_bReadSlot (UINT16 wAddr, PBYTE abyData) DIRECT_FUNTYPE_REENT
{
BYTE uu;
// Set sram address
SWREG_vWriteW(CPU_SRAM_ADDR, wAddr);
// Wait for sram idle and issue read command
if (!SWREG_bWaitStatus(CPU_SRAM_STATUS, PTN_SRAM_STS_BUSY, FALSE))
return FALSE;
// Trigger read
SWREG_vWriteB(CPU_SRAM_CMD, PTN_SRAM_CMD_READ);
// Wait for sram reading done
if (!SWREG_bWaitStatus(CPU_SRAM_STATUS, PTN_SRAM_STS_DONE, TRUE))
return FALSE;
//
// Read sram data
//
// If packet memory
if (wAddr < SRAM_CTRL_BLK_BASE_ADDR) {
for (uu = 0; uu < SRAM_PKT_SLOT_SIZE; uu++)
SWREG_vReadB((UINT16)(CPU_SRAM_DATA + uu), abyData + uu);
}
// If control memory
else {
for (uu = 0; uu < SRAM_CTRL_SLOT_SIZE; uu++)
SWREG_vReadB((UINT16)(CPU_SRAM_DATA + uu), abyData + uu);
}
return TRUE;
}
BOOL SWSRAM_bWriteSlot (UINT16 wAddr, PBYTE abyData) DIRECT_FUNTYPE_REENT
{
BYTE uu;
// Set sram address
SWREG_vWriteW(CPU_SRAM_ADDR, wAddr);
//
// Write sram data
//
// If packet memory
if (wAddr < SRAM_CTRL_BLK_BASE_ADDR) {
for (uu = 0; uu < SRAM_PKT_SLOT_SIZE; uu++)
SWREG_vWriteB((UINT16)(CPU_SRAM_DATA + uu), abyData[uu]);
}
// If control memory
else {
for (uu = 0; uu < SRAM_CTRL_SLOT_SIZE; uu++)
SWREG_vWriteB((UINT16)(CPU_SRAM_DATA + uu), abyData[uu]);
}
// Wait for sram idle and issue write command
if (!SWREG_bWaitStatus(CPU_SRAM_STATUS, PTN_SRAM_STS_BUSY, FALSE))
return FALSE;
// Trigger write operation
SWREG_vWriteB(CPU_SRAM_CMD, PTN_SRAM_CMD_WRITE);
// Wait for sram writing done
if (!SWREG_bWaitStatus(CPU_SRAM_STATUS, PTN_SRAM_STS_DONE, TRUE))
return FALSE;
return TRUE;
}
//
// This function is only suitable for clearing
// VLAN table entry and IP Multicast table entry
//
BOOL SWSRAM_bSetEntryInvalid (UINT16 wAddr) DIRECT_FUNTYPE_REENT
{
// Set sram address
SWREG_vWriteW(CPU_SRAM_ADDR, wAddr);
// Write sram data, because we want to clear bit-127, thus we only clear highest byte
SWREG_vWriteB(CPU_SRAM_DATA + 7, 0);
// Wait for sram idle and issue write command
if (!SWREG_bWaitStatus(CPU_SRAM_STATUS, PTN_SRAM_STS_BUSY, FALSE))
return FALSE;
// Trigger write operation
SWREG_vWriteB(CPU_SRAM_CMD, PTN_SRAM_CMD_WRITE);
// Wait for sram writing done
if (!SWREG_bWaitStatus(CPU_SRAM_STATUS, PTN_SRAM_STS_DONE, TRUE))
return FALSE;
return TRUE;
}
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