swsys.c

VIA VT6524 8口网管交换机源码

/*
 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
 * All rights reserved.
 *
 * This software is copyrighted by and is the sole property of
 * VIA Networking Technologies, Inc. This software may only be used
 * in accordance with the corresponding license agreement. Any unauthorized
 * use, duplication, transmission, distribution, or disclosure of this
 * software is expressly forbidden.
 *
 * This software is provided by VIA Networking Technologies, Inc. "as is"
 * and any express or implied warranties, including, but not limited to, the
 * implied warranties of merchantability and fitness for a particular purpose
 * are disclaimed. In no event shall VIA Networking Technologies, Inc.
 * be liable for any direct, indirect, incidental, special, exemplary, or
 * consequential damages.
 *
 *
 * File:    swsys.c
 *
 * Purpose: Hardware accessing functions related to whole system
 *
 * Author:  Tevin Chen
 *
 * Date:    Jan 08, 2002
 *
 * Functions:
 *
 * Revision History:
 *
 */


#if !defined(__SWITCH_H__)
#include "switch.h"
#endif
#if !defined(__PLATFORM_H__)
#include "platform.h"
#endif
#if !defined(__SWREG_H__)
#include "swreg.h"
#endif
#if !defined(__SWMII_H__)
#include "swmii.h"
#endif
#if !defined(__SWSYS_H__)
#include "swsys.h"
#endif

#ifndef __ASIC_VT6526
#if !defined(__SWSRAM_H__)
#include "swsram.h"
#endif
#if !defined(__STR_H__)
#include "str.h"
#endif
#endif




/*---------------------  Static Definitions  ------------------------*/
#define PTN_BUF_INIT_COMPL      1

#define PTN_FWD_MAC_TBL_6K      0x03
#define PTN_FWD_VLAN_TBL_4K     0x08
#define PTN_FWD_DIS_CTRL_LRN    0x10

#define PTN_TICKET_ALG_CRC      0x02



#ifndef __ASIC_VT6526

#define VAL_QUE_CONG_ON_BELOW_10M   20
#define VAL_QUE_CONG_ON_10M         20
#define VAL_QUE_CONG_ON_100M        20
#define VAL_QUE_CONG_ON_1000M       20
#define VAL_QUE_CONG_ON_CPU         20

#endif

/*---------------------  Static Classes  ----------------------------*/

/*---------------------  Static Variables  --------------------------*/

/*---------------------  Static Functions  --------------------------*/

/*---------------------  Export Variables  --------------------------*/




void SWSYS_vResetSystem(void) DIRECT_FUNTYPE_REENT
{
   
    PLATvDelay(800);
    PLATvDelay(800);
    PLATvDelay(800);
    PLATvDelay(800);
    PLATvDelay(800);
    PLATvDelay(800);
    PLATvDelay(800);

    // reset switch
    PLATvSetMacResetPin(1);
    // reset phy
    PLATvSetPhyResetPin(1);
    PLATvDelay(800);

    // de-assert reset signal
    PLATvSetMacResetPin(0);
    PLATvDelay(500);

    // de-assert reset signal
    PLATvSetPhyResetPin(0);
    // wait for phy initialize completed
    PLATvDelay(800);
    PLATvDelay(800);

}



void SWSYS_vSwitchInit(void) DIRECT_FUNTYPE_REENT
{
    // Initialize buffer and wait for initialize complete
    SWREG_vWriteB(BUF_INIT, 1);
    SWREG_bWaitStatus(BUF_INIT, PTN_BUF_INIT_COMPL, 1);

    // set table size, mac table:6K, vlan table:4K
    // vlan base is begin at 6K, 6K==0x1800
    SWREG_vWriteW(FWD_TBL_SIZE, 0x060B);
    
    // disable control frame SMAC learning
    SWREG_vBitsOn(FWD_MISC_CFG, PTN_FWD_DIS_CTRL_LRN);

    //trunking hash algo: CRC hash
    SWREG_vBitsOn(FWD_TICKET_ALG, PTN_TICKET_ALG_CRC);
    
    // PVID[11:8] select
    SWREG_vBitsOn(FWD_OPTIONAL_CFG, 0x02);  
    
#ifdef __ASIC_VT6524
    // disable port 24.25 input/output, disable port 24.25 MII auto-poll
    SWREG_vWriteW(PHY_GIGA_PORT_NWAY_EN_MASK, 0x0500);
#endif

    // for compatible with VT6524(77 core)
    
    // Set packet buffer related config
    SWREG_vWriteB(GLOBAL_FUNC_CFG, 0x94);

    SWREG_vWriteW(QUE_SYS_XON_THR, 2736);
    SWREG_vWriteW(QUE_SYS_XOFF_THR, 2286);
    SWREG_vWriteW(QUE_ALL_XOFF_THR, 1736);

    SWREG_vWriteB(QUE_CONG_ON_BELOW_10M, VAL_QUE_CONG_ON_10M);
    SWREG_vWriteB(QUE_CONG_ON_10M,       VAL_QUE_CONG_ON_10M);
    SWREG_vWriteB(QUE_CONG_ON_100M,      VAL_QUE_CONG_ON_100M);
    SWREG_vWriteB(QUE_CONG_ON_1000M,     VAL_QUE_CONG_ON_10M);
    SWREG_vWriteB(QUE_CONG_ON_CPU,       VAL_QUE_CONG_ON_CPU);

    SWREG_vWriteW(BSF_XON_THRED, 125);
    SWREG_vWriteW(BSF_XOFF_THRED, 375);
}