pidiag.c

VIA VT6524 8口网管交换机源码

/*
 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
 * All rights reserved.
 *
 * This software is copyrighted by and is the sole property of
 * VIA Networking Technologies, Inc. This software may only be used
 * in accordance with the corresponding license agreement. Any unauthorized
 * use, duplication, transmission, distribution, or disclosure of this
 * software is expressly forbidden.
 *
 * This software is provided by VIA Networking Technologies, Inc. "as is"
 * and any express or implied warranties, including, but not limited to, the
 * implied warranties of merchantability and fitness for a particular purpose
 * are disclaimed. In no event shall VIA Networking Technologies, Inc.
 * be liable for any direct, indirect, incidental, special, exemplary, or
 * consequential damages.
 *
 *
 * File:    pidiag.c
 *
 * Purpose: System diagnosing functions
 *
 * Author:  Tevin Chen
 *
 * Date:    Jan 08, 2002
 *
 * Functions:
 *
 * Revision History:
 *
 */


#include "switch.h"
#if !defined(__PLATFORM_H__)
#include "platform.h"
#endif
#include "swreg.h"
#include "swmii.h"
#include "sweep.h"
#include "pieeprom.h"
#include "pieeprom.h"
//#include "ttyio.h"



/*---------------------  Static Definitions -------------------------*/
#define PTN_SRAM_BIST_FIN       0x10

/*---------------------  Static Classes  ----------------------------*/

/*---------------------  Static Variables  --------------------------*/

/*---------------------  Static Functions  --------------------------*/

/*---------------------  Export Functions  --------------------------*/

BOOL PIDIAG_bRegReadWriteTest(void) DIRECT_FUNTYPE_REENT
{
    UINT8  byTmp;

    SWREG_vReadB(CPU_SWITCH_MAC+2, &byTmp);
	//TTYvPutString("Reg=%x...",byTmp);
//heavy modify 2004/9/18
    //if (byTmp != 0x63)
        //return FALSE;

    // Test pattern 1 => 0x55
    SWREG_vWriteB(CPU_SWITCH_MAC+2, 0x55);
    SWREG_vReadB(CPU_SWITCH_MAC+2, &byTmp);
    if (byTmp != 0x55)
        return FALSE;

    SWREG_vWriteB(CPU_SWITCH_MAC+2, byTmp);

    return TRUE;
}


BOOL PIDIAG_bMiiReadWriteTest(UINT8 byPortId) DIRECT_FUNTYPE_REENT
{
    // Test pattern 1 => all tested bits are set to 1
    SWMII_bRegBitsOn(byPortId, MII_REG_ANAR, PTN_PHY_ANAR_ABL_MEGA);
    if (!SWMII_bIsRegBitsOn(byPortId, MII_REG_ANAR, PTN_PHY_ANAR_ABL_MEGA))
        return FALSE;

    // Test pattern 2 => all tested bits are set to 0
    SWMII_bRegBitsOff(byPortId, MII_REG_ANAR, PTN_PHY_ANAR_ABL_MEGA);
    if (!SWMII_bIsRegBitsOff(byPortId, MII_REG_ANAR, PTN_PHY_ANAR_ABL_MEGA))
        return FALSE;

    return TRUE;
}


BOOL PIDIAG_bSramBIST(void) DIRECT_FUNTYPE_REENT
{
    // Trigger sram BIST test
    BYTE byStatus;

    // Trigger BIST and wait for execution finished
    SWREG_vWriteB(SRAM_BIST_STATUS, TRUE);
    SWREG_bWaitStatus(SRAM_BIST_STATUS, PTN_SRAM_BIST_FIN, TRUE);

    // Return BIST result
    SWREG_vReadB(SRAM_BIST_STATUS, &byStatus);
    if (byStatus != 0)
        return FALSE;

    return TRUE;
}


BOOL PIDIAG_bEepromReadWriteTest(void) DIRECT_FUNTYPE_REENT
{
    UINT8   byOrgVal, byTmp;
    BOOL    bResult = TRUE;

    // Preserve original value and write test pattern
    SWEEP_bReadB(EEP_ADDR_BASE,  &byOrgVal);
    SWEEP_bWriteB(EEP_ADDR_BASE, 0x5A );

    // Check result of test pattern
    SWEEP_bReadB(EEP_ADDR_BASE, &byTmp);
    if ( byTmp != 0x5A )
        bResult = FALSE;

    // Restore org value and return result
    SWEEP_bWriteB(EEP_ADDR_BASE, byOrgVal);
    return  bResult;
}