mic.h

RAID卡的测试程序

    u16     ci2_DeviceID;
    u8      ci2_MaxCPUSupported;
    u8      ci2_NoOfCPUPresent;
    u8      ci2_NoOfCPUFailed;
    u8      ci2_Reserved0[7];
    u8      ci2_CPU1VendorName[24];
    u8      ci2_CPU1Revision[8];
    u16     ci2_CPU1PCIVendorId;
    u16     ci2_CPU1PCIDeviceId;
    u16     ci2_CPU1PCISubsysVendorId;
    u16     ci2_CPU1PCISubsysDeviceId;
    u16     ci2_CPU1BusWidth;
    u16     ci2_CPU1Speed;
    u8      ci2_Reserved1[36];
    u8      ci2_CPU2VendorName[24];
    u8      ci2_CPU2Revision[8];    
    u16     ci2_CPU2PCIVendorId;
    u16     ci2_CPU2PCIDeviceId;
    u16     ci2_CPU2PCISubsysVendorId;
    u16     ci2_CPU2PCISubsysDeviceId;
    u16     ci2_CPU2BusWidth;
    u16     ci2_CPU2Speed;
    u8      ci2_Reserved2[36];
    u8      ci2_SystemCtlVendorName[24];
    u8      ci2_SystemCtlRevision[8];
    u16     ci2_SystemCtlPCIVendorId;
    u16     ci2_SystemCtlPCIDeviceId;
    u16     ci2_SystemCtlPCISubsysVendorId;
    u16     ci2_SystemCtlPCISubsysDeviceId;
    u8      ci2_Reserved3[36];
    u8      ci2_MemoryType;
    u8      ci2_MemoryBusWidth;
    u16     ci2_MemorySpeed;
    u8      ci2_MemoryECCType;
    u8      ci2_Reserved4;
    u32     ci2_MemorySize;
    u8      ci2_CachePartOfSysMemory;
    u8      ci2_CacheType;
    u8      ci2_CacheBusWidth;
    u8      ci2_CacheECCType;
    u16     ci2_CacheSpeed;
    u32     ci2_CacheSize;
    u8      ci2_Reserved5[5];
    u8      ci2_FlashType;
    u32     ci2_FlashSize;
    u32     ci2_MaxFlashWriteAllowed;
    u32     ci2_NoOfFlashWriteDone;
    u8      ci2_Reserved6[5];
    u8      ci2_NVRAMType;
    u32     ci2_NVRAMSize;
    u32     ci2_MaxNVRAMWriteAllowed;
    u32     ci2_NoOfNVRAMWriteDone;
    u8      ci2_Reserved7[80];
}micControllerInfoPage2_t;

typedef struct micControllerInfoPage3
{
    u16     ci3_PageCode;
    u16     ci3_PageLength;
    u16     ci3_DeviceID;
    u8      ci3_Reserved1[2];
    u8      ci3_MaxComPortSupported;
    u8      ci3_NoOfComPortPresent;
    u8      ci3_NoOfComPortFailed;
    u32     ci3_Com1MaxBaudSupported;
    u32     ci3_Com1CurrentBaud;
    u8      ci3_Com1Usage;
    u8      ci3_Com1Enabled;
    u8      ci3_Com1Reserved[18];
    u32     ci3_Com2MaxBaudSupported;
    u32     ci3_Com2CurrentBaud;
    u8      ci3_Com2Usage;
    u8      ci3_Com2Enabled;
    u8      ci3_Com2Reserved[18];
    u32     ci3_Com3MaxBaudSupported;
    u32     ci3_Com3CurrentBaud;
    u8      ci3_Com3Usage;
    u8      ci3_Com3Enabled;
    u8      ci3_Com3Reserved[18];
    u8      ci3_Reserved2[1];
    u8      ci3_NoOfTimerPresent;
    u16     ci3_Timer1Resolution;
    u16     ci3_Timer1Range;
    u8      ci3_Timer1Reserved[16];
    u16     ci3_Timer2Resolution;
    u16     ci3_Timer2Range;
    u8      ci3_Timer2Reserved[16];
    u8      ci3_Reserved3[2];
    u8      ci3_NoOfWatchdogTimerPresent;
    u8      ci3_WatchdogTimerEnabled;
    u16     ci3_WatchdogTimerCount;
    u8      ci3_RTCInfo[16];
    u8      ci3_Reserved4[92];
} micControllerInfoPage3_t;


#define MIC_FEATURE_IS_SUPPORTED            0x01
#define MIC_FEATURE_NOT_SUPPORTED           0x00

#define MIC_FEATURE_IS_ENABLED              0x01
#define MIC_FEATURE_IS_DISABLED             0x00


/* Size: 144 */
typedef struct micNetworkPortInfoSettings
{
    u16     npis_PortId;
    u8      npis_PortControl;
#define PORT_INFO_MODIFIED          0x01
    u8      npis_Reserved0;

    u8      npis_PortEnableDisableSupported;
    u8      npis_PortEnabled;
    u8      npis_PortStatus;
#define PORT_STATUS_LINK_UP                     0x1
#define PORT_STATUS_LINK_DOWN                   0x2

    u8      npis_SecondaryMacSupported;

    u8      npis_PrimaryMACAddress[8];
    u8      npis_SecondaryMACAddress[8];

    u8      npis_DHCPSupported;
    u8      npis_DHCPEnabled;
    u8      npis_IPAddressType;


#define PORT_MIC_IP_ADDRESS_TYPE_V4             0x4
#define PORT_MIC_IP_ADDRESS_TYPE_V6             0x6

    u8      npis_SecondaryIPAddressSupported;
    
    u8      npis_PrimaryIPAddress[16];
    u8      npis_PrimarySubnetMask[16];
    
    u8      npis_SecondaryIPAddress[16];
    u8      npis_SecondarySubnetMask[16];
    
    /* the DSN fields do not apply for Ethernet for now. */
    u8      npis_PrimaryDNSServerIPAddress[16];
    u8      npis_SecondaryDNSServerIPAddress[16];
    
    u8      npis_DefaultGatewayIPAddress[16];

    u8      npis_DNSLearningThroughDHCPIsSupported;
    u8      npis_DNSLearningThroughDHCP;

    u16     npis_Reserved1; /* For 8-byte aligment */
} micNetworkPortInfoSettings_t;

#define ETHERNET_PORT_USAGE_MANAGEMENT  0
#define ETHERNET_PORT_USAGE_INTERCOMM   1

typedef struct micEthernetPortNetworkInfo
{
    micNetworkPortInfoSettings_t    epni_NetworkPortInfo;
    /* vendor info */
    u8      epni_VendorName[24];
    u8      epni_Revision[8];
    u16     epni_PCIVendorId;
    u16     epni_PCIDeviceId;
    u16     epni_PCISubsysVendorId;
    u16     epni_PCISubsysDeviceId;
    u8      epni_Reserved[38];
    /* ethernet specific info */
    u16     epni_MaxSupportedSpeed;
    u8      epni_Usage;  /* management or inter-ctrl communication */
    u8      epni_Reserved1[2];
    } micEthernetPortNetworkInfo_t;

typedef struct miciSCSIPortNetworkInfo
{
    micNetworkPortInfoSettings_t    ipni_NetworkPortInfo;
    /* vendor info */
    u16     ipni_PCIVendorID;
    u16     ipni_PCIDeviceID;

    u16     ipni_PCISubSystemVendorID;
    u16     ipni_PCISubSystemDeviceID;

    u32     ipni_Version;
    u32     ipni_FirmwareVersion;

    /* iscsi specific info */
    u8      ipni_FrontEndProtocol;
    u8      ipni_LinkType;
    
#define     LINK_TYPE_COPPER        0x01
#define     LINK_TYPE_OPTICAL       0x02
    u16     ipni_TCPPortNumber;

    u32     ipni_MaxSupportedSpeed;  /* In Mbps */

    u32     ipni_CurrentSpeed; /* In Mbps */
    u32     ipni_Reserved1;/* For 8-byte alignment */
} miciSCSIPortNetworkInfo_t;


typedef struct micISCSIPortNetworkSettings
{
    micNetworkPortInfoSettings_t ipns_PortSettings;
    u16  ipns_TcpPortNumber;
    u8  ipns_Reserved[2];
    
    u32 ipns_Reserved1; /* For 8-byte alignment */

}micISCSIPortNetworkSettings_t;

typedef struct micEthernetPortNetworkSettings
{
    micNetworkPortInfoSettings_t    epns_NetworkPortSettings;
} micEthernetPortNetworkSettings_t;


typedef struct micControllerInfoPage4
{   
    u16     ci4_PageCode;
    u16     ci4_PageLength;
    
    u16     ci4_DeviceID;   /* ctrl id */
    u16     ci4_Reserved;
    
    u8      ci4_MaxPortsSupported;
    u8      ci4_NumOfPortsPresent;
    u8      ci4_NumOfPortsFailed;
    u8      ci4_Reserved1[1];
    
    u8      ci4_Reserved2[12]; /* For 8-byte alignment */

    /* length of ci4_PortInfo can be variable depending on the ci4_NumOfPortsPresent */
    miciSCSIPortNetworkInfo_t   ci4_PortInfo[1];
} micControllerInfoPage4_t;

typedef struct micControllerInfoPage5
{   
    u16     ci5_PageCode;
    u16     ci5_PageLength;
    
    u16     ci5_DeviceID;   /* ctrl id */
    u16     ci5_Reserved;
    
    u8      ci5_MaxPortsSupported;
    u8      ci5_NumOfPortsPresent;
    u8      ci5_NumOfPortsFailed;
    u8      ci5_Reserved1[1];
    
    u8      ci5_Reserved2[8];

    /* length of ci5_PortInfo can be variable depending on the ci5_NumOfPortsPresent */
    micEthernetPortNetworkInfo_t   ci5_PortInfo[1];
} micControllerInfoPage5_t;

typedef struct micControllerInfoPage6
{
    u16     ci6_PageCode;       
    u16     ci6_PageLength;
    u16     ci6_DeviceID;
	u16		ci6_LogicalDriveDegrade;
    u32     ci6_ProductID;
    u32     ci6_subProductID;
    u8      ci6_CustName[24];				
    u8      ci6_CustModel[16];				
    u8      ci6_MftPartNo[16];		
    u8      ci6_MftSerialNo[16];		
    u8      ci6_MftRev[8];		
    u8      ci6_CustPartNo[16];		
    u8      ci6_CustSerialNo[16];		
    u8      ci6_CustRev[8];		
    u8      ci6_MftName[48];		
    u8      ci6_MftModel[48];	
    u8      ci6_MftMonth;		
    u8      ci6_MftDate;			
    u16     ci6_MftYear;
	u32     ci6_BIOSVerMajorNo;
	u32     ci6_BIOSVerMinorNo;
	u32     ci6_BIOSVerOEMCode;
	u32     ci6_BIOSVerBuildNo;
    u8      ci6_RebuildRate;
    u8      ci6_BkSyncRate;
    u8      ci6_MediaPatrolRate;
    u8      ci6_OnlineExpRate;
    u8      ci6_LDInitRate;
    u8      ci6_MigrationRate;
    u8      ci6_AutoRebuildEnable;
    u8      ci6_MediaPatrolEnable;			
    u8      ci6_SmartLogEnable;
    u8      ci6_SmartPollInterval;
    u8      ci6_SmartLogLevel;
    u8      ci6_EnclosurePollInterval;
    u8      ci6_MemoryType;	
    u8      ci6_MemoryECCType;
    u16     ci6_MemorySpeed;
    u32     ci6_MemorySize;
    u16     ci6_MaxLogicalDriveSupported;
    u16     ci6_LogicalDrivePresent;
    u16     ci6_LogicalDriveOnline;
    u16     ci6_LogicalDriveOffline;
    u16     ci6_LogicalDriveCritical;
    u16     ci6_MaxPhysicalDriveSupported;
    u16     ci6_PhysicalDrivePresent;
    u16     ci6_PhysicalDriveOnline;
    u16     ci6_PhysicalDriveOffline;
    u16     ci6_PhysicalDriveNotConfigured;
    u16     ci6_MaxChannelsSupported;//[cz]add
    u16     ci6_MaxGlobalSparesSupported;
    u16     ci6_GlobalSparesPresent;
    u16     ci6_MaxDedicatedSparesSupported;
    u16     ci6_DedicatedSparesPresent;
    u16     ci6_NoOfRebuilds;
    u16     ci6_NoOfBkSync;
    u16     ci6_NoOfMediaPatrol;
    u16     ci6_NoOfLDInit;
    u16     ci6_NoOfMigration;
	u16		ci6_MaxExtentSupportedPerDisk;
	u8		ci6_MaxPortSupported;
	u8		ci6_Reserved2[5];
    u8      ci6_AliasName[48];			
}micControllerInfoPage6_t;

typedef struct micControllerInfoPage7
{
    u16     ci7_PageCode;       
    u16     ci7_PageLength;
    u16     ci7_DeviceID;
    u16     ci7_Reserved;
	u32		ci7_FWVerMajor;
	u32		ci7_FWVerMinor;
	u32		ci7_FWVerOEM;
	u32		ci7_FWVerBuild;
}micControllerInfoPage7_t;

/* PMIC_CONTROLLER_GET_SETTINGS */
/* PMIC_CONTROLLER_SET_SETTINGS */

typedef struct micCtlGetSetSettingsCmd
{
    u8          gscs_ScsiOpCode;              
    u8          gscs_MicSignature;        
    u16         gscs_MicOpCode;        
    u8          gscs_UniqueCmdId;        
    u8          gscs_LoginKey;        
    u16         gscs_ControllerID;        
    u8          gscs_CodePage;                        
    u8          gscs_Reserved;
    u16         gscs_TransferLength;        
    u16         gscs_TransferOffset;        
    u8          gscs_ControllerCount;        
    Control_t   gscs_Control; 
} __attribute__ ((packed)) micCtlGetSetSettingsCmd_t;
//} micCtlGetSetSettingsCmd_t;

/* 
 * For PMIC_CONTROLLER_SET_SETTINGS gci_ConfigLock is used
 * instead of gci_LoginKey
 */
#define gci_ConfigLock  gci_LoginKey

typedef struct micCtrlSettingsPage0
{
    u16     cs_PageCode;    /* Not Aligned */
    u16     cs_PageLength;  /* Not Aligned */
    u16     cs_DeviceID;    /* Not Aligned */
    //u16     cs_DeviceID;
    u8      cs_UserName[48];
    u8      cs_Reserved0[38];
    u8      cs_CacheLineSize;
    u8      cs_RaidSymmetry;
    u8      cs_Reserved1[38];
    u8      cs_RebuildRate;
    u8      cs_BkSyncRate;