📄 mic.h
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/*******************************************************************************
* Filename : mic.h
* Description : Management Interface Command definitions
* Created on : 12/08/02
* CVS Version : $Id: mic.h,v 1.53 2004/03/23 03:54:53 zhengj Exp $
*
* (C) Copyright Promise Technology Inc., 2002
* All Rights Reserved
******************************************************************************/
#ifndef __MIC_H
#define __MIC_H
/******************* User Space definition - Start ****************************/
#define PMIC_EXECUTE_USRCMD 0x105a0001 /* cmd val for use w/ ioctl() */
#define PMIC_MAX_SENSE_SIZE 64
#define PMIC_MAX_PMIC_SIZE 32
#define PMIC_MAX_DATA_XFER_SIZE 65536
#define RO /* Read-Only */
#define RW /* Read-Write */
#ifdef WINDOWS
//#pragma pack (show)
#pragma pack (push, mic_pack, 1)
//#pragma pack (show)
#endif
/* NAPA Suggest to add following for i2_GetEnclosureStatus() Staus Currently
NAPA is using this schecme to pass the data back, it's hard to use Islavista scheme*/
/*
#define CAM_MAX_SENSOR_PER_ENCLOSURE 0x6
enum EnclosureType
{
ENCLOSURE_NONE,
ENCLOSURE_SS4100,
ENCLOSURE_SS1100,
ENCLOSURE_NEC,
ENCLOSURE_FSC,
ENCLOSURE_HPQ
};
enum SensorType
{
SENSOR_NONE,
SENSOR_FAN,
SENSOR_VOLTAGE33,
SENSOR_VOLTAGE5,
SENSOR_VOLTAGE12,
SENSOR_TEMPERATURE
};
typedef struct _APIFRAME_SENSOR
{
SensorType SensorType;
U32 SensorValue;
U32 SensorValue1;
} APIFRAME_SENSOR, FAR* PAPIFRAME_SENSOR;
typedef struct _APIFRAME_SENSOR_INFORMATION {
APIFRAME_SENSOR Sensor[CAM_MAX_SENSOR_PER_ENCLOSURE];
} APIFRAME_SENSOR_INFORMATION, *PAPIFRAME_SENSOR_INFORMATION;
typedef struct _APIFRAME_SENSOR_STATUS{
U16 EnclosureID;
U16 Reserved;
APIFRAME_SENSOR Sensor[CAM_MAX_SENSOR_PER_ENCLOSURE];
} APIFRAME_SENSOR_STAUS, *PAPIFRAME_SENSOR_STATUS;
*/
/* IOCTL defintion */
typedef struct ptiIOCTLCmd
{
u8 *pic_pDataBuf; /* AP - Pointer to Data Buffer */
u32 pic_DataBufLen; /* AP - Length of pic_Databuf */
u32 pic_SenseBufLen; /* FW - Valid Sense Buffer length */
u8 pic_MicBuf[PMIC_MAX_PMIC_SIZE]; /* AP - Contains MIC */
u8 pic_SenseBuf[PMIC_MAX_SENSE_SIZE]; /* FW - Contains Sense Information */
u32 pic_DataDirection; /* AP - Flow of Data direction */
u8 pic_Status; /* FW - Status for Command Execution */
} ptiIOCTLCmd_t;
/* Valid values for pic_DataDirection */
#define PMIC_DATA_UNKNOWN 0 /* reserved, should not be used */
#define PMIC_DATA_IN 1 /* data is being sent to firmware */
#define PMIC_DATA_OUT 2 /* data is being sent to userspace */
#define PMIC_DATA_NONE 3 /* no data transfer */
/* Valid statuses for pic_Status */
#define PMIC_GOOD 0x00
#define PMIC_CHECK_CONDITION 0x02
/* Valid ASCQ values for CHECK_CONFITION */
#define MICS_RESERVED 0xFF
#define MICS_SUCCESS 0x00
#define MICS_INVALID_CMD_SCSI_OP_CODE 0x01
#define MICS_INVALID_CMD_MIC_SIGNATURE 0x02
#define MICS_INVALID_CMD_MIC_OP_CODE 0x03
#define MICS_INVALID_CMD_CONFIG_LOCK 0x04
#define MICS_INVALID_CMD_UNIQUE_CMD_ID 0x05
#define MICS_INVALID_CMD_LOGIN_KEY 0x06
#define MICS_INVALID_CMD_TRANSFER_LENGTH 0x07
#define MICS_INVALID_CMD_TRANSFER_OFFSET 0x08
#define MICS_INVALID_CMD_AT_OFFSET 0x09 /*The Command Offset will be in Sense Specifc Info.*/
#define MICS_INVALID_CMD_START_DEVICE_ID 0x0A
#define MICS_INVALID_CMD_DEVICE_COUNT 0x0B
#define MICS_INVALID_CMD_ARRAY_ID 0x0C
#define MICS_INVALID_CMD_PHYSICAL_DRIVE_ID 0x0D
#define MICS_INVALID_CMD_LOGICAL_DRIVE_ID 0x0E
#define MICS_INVALID_CMD_HOT_SPARE_ID 0x0F
#define MICS_INVALID_CMD_SEQUENCE_NO 0x10
#define MICS_INVALID_CMD_MIC_PAGE_CODE 0x11
#define MICS_INVALID_TOTAL_DATA_SIZE 0x12
#define MICS_INVALID_DATA_BUFFER_SIZE 0x13
#define MICS_INVALID_DATA_AT_OFFSET 0x14 /*The Data Offset will be in Sense Specifc Info.*/
#define MICS_INVALID_ARRAY_ID 0x15
#define MICS_INVALID_PHYSICAL_DRIVE_ID 0x16
#define MICS_INVALID_LOGICAL_DRIVE_ID 0x17
#define MICS_INVALID_HOT_SPARE_ID 0x18
#define MICS_CMD_EXECUTION_NOT_AUTHORIZED 0x19
#define MICS_MEMORY_ALLOCATION_FAILED 0x1A
#define MICS_INTERNAL_ERROR 0x1B /*Internal Error Code will be in Sense Specifc Info.*/
#define MICS_UCID_CL_USED_INCORRECTLY 0x1C
#define MICS_INVALID_CONFIG_LOCK 0x1D
#define MICS_INVALID_UCID_OR_CONFIG_LOCK 0x1E
#define MICS_INVALID_DATA 0x1F
#define MICS_MDD_ACCESS_FAILED 0x20
#define MICS_INVALID_CMD 0x21
#define MICS_MIGRATION_ACTIVE_IN_ARRAY 0x22
#define MICS_PD_UNCONFIGURED 0x23
#define MICS_CFG_UPDATE_BLOCKED 0x24
#define MICS_INVALID_PD_SEQUENCE_NO 0x25
#define MICS_GENERAL_ERROR_RESERVED_END 0x4F
#define MICS_MODULE_SPECIFIC_ERROR_START 0x50
#define MICS_BUZZER_IS_DISABLED 0x51
#define MICS_MODULE_SPECIFIC_ERROR_END 0xFE
/******************* User Space definition - End ****************************/
/********** Management Command Interface (MIC) definitions - Start **********/
typedef struct ExtendedMicCmd
{
u8 emc_ExtendedCmd[16];
}ExtendedMicCmd_t;
/* General structure for Standard MIC Command */
typedef struct MicCmd
{
u8 mc_ScsiOpCode;
u8 mc_MicSignature;
u16 mc_MicOpCode;
union
{
u8 mc_ConfigLock;
u8 mc_UniqueCmdId;
}__attribute__ ((packed)) u;
u8 mc_LoginKey;
u8 mc_CmdSpecific0;
u8 mc_CmdSpecific1;
u8 mc_CmdSpecific2;
u8 mc_CmdSpecific3;
u16 mc_TransferLength;
u16 mc_TransferOffset;
u8 mc_CmdSpecific4;
u8 mc_Control;
ExtendedMicCmd_t mc_ExtendedCmd; /* For InBand, copy this to dbh_ExtendedCmd */
/* of DataBufferHeader_t and send only */
/* 16 Byte as Command */
} __attribute__ ((packed)) MicCmd_t;
//} MicCmd_t;
/* Valid values for mc_ScsiOpCode */
#define PMIC_MGT_CMD 0xD8
#define PMIC_SINBAND_MGT_CMD 0xD9 /* for secure InBand Command */
/* Valid values for mc_MicSignature */
#define PMIC_SIGNATURE 0xBA
/* Possible values for mc_Control */
#define OC_1 0x00
#define OC_512 0x40
#define OC_1024 0x80
#define OC_4096 0xC0
#define OC_MASK 0xC0
#define OC_GETOFFSETCONTROL(x) ((x) >> 6)
typedef struct Control
{
u8 c_Control:6;
u8 c_OffsetControl:2;
} __attribute__ ((packed)) Control_t;
//} Control_t;
/*
* Data Buffer Header structure for OutOfBand and
* InBand Non-Pass Through Commands
*/
typedef struct DataBufferHeader
{
u8 dbh_ExtendedCmd[16];
u8 dbh_LoginKey[16];
u32 dbh_TotalDataSize;
u32 dbh_NextTransferOffset;
u8 dbh_Reserved[24];
} DataBufferHeader_t;
/*
* Sense Buffer structure
*
*/
typedef struct micRequestSense
{
u8 rs_ResponseCode;
u8 rs_Obselete;
u8 rs_SenseKey;
u8 rs_Information[4];
u8 rs_AdditionalSenseLength;
u8 rs_CmdSpecificInfo[4];
u8 rs_ASC; /* 0x80 + ModuleID */
u8 rs_ASCQ;
u8 rs_FRUCode;
u8 rs_SenseKeySpecific;
u8 rs_SenseKeySpecificData[2];
u8 rs_AdditionalSenseInfo[PMIC_MAX_SENSE_SIZE - 18];
} __attribute__ ((packed)) micRequestSense_t;
//} micRequestSense_t;
/*
* Since each command will be handled by a specific module, the command will
* be encoded with a module ID
*/
#define MIC_NUM_MODULES 18
#define MIC_MCP_ID 0x0100 /* Management Command Processor */
#define MIC_LOCKMGR_ID 0x0200 /* MIC Lock Manager */
#define MIC_CTLR_CONFIG_ID 0x0300 /* Ctlr related funcs Manager */
#define MIC_MDD_FRONTEND_ID 0x0400 /* aka Configuration Manager */
#define MIC_MEDIA_PATROL_ID 0x0500 /* Media Patrol Manager */
#define MIC_LD_INIT_ID 0x0600 /* Logical Drive Init Manager */
#define MIC_EVENTMGR_ID 0x0700 /* Event Manager */
#define MIC_REBUILD_ID 0x0800 /* Rebuild Manager */
#define MIC_BKSYNC_ID 0x0900 /* BkSync Manager */
#define MIC_WATERMARK_ID 0x0A00 /* Watermark Manager */
#define MIC_SCSIEMU_ID 0x0B00 /* SCSI Emulation Manager */
#define MIC_REDUNDANCY_CHK_ID 0x0C00 /* Redundancy check Manager */
#define MIC_PASSTHRU_ID 0x0D00 /* PASSTHRU commands Manager*/
#define MIC_ISCSI_MGT_ID 0x0E00 /* iSCSI Configuration Manager */
#define MIC_ENCLOSURE_MGT_ID 0x0F00 /* Enclosure related management commands */
#define MIC_RWPROCESS_ID 0x1000 /* R/W Process Related Management Commands. */
#define MIC_BUZZER_ID 0x1100 /* Buzzer Related Management Cmds */
#define MIC_STATS_ID 0x1200 /* Statistics monitoring manager */
/* General SubOpCodes:
* 0xF0 -to- 0xFF -> Used for Sub Command Types
* 0x80 -to- 0xEF -> Used for Extended 32 byte command
* 0x00 -to- 0x7F -> Used for 16 byte command
*/
#define MIC_SUBOPCODE_EXTCMD_START 0x80
#define MIC_SUBOPCODE_EXTCMD_END 0xEF
/* for pass thru commands only */
#define MIC_SUBOPCODE_PTWRITE (MIC_PASSTHRU_ID | MIC_SUBOPCODE_EXTCMD_START) + 0
#define MIC_SUBOPCODE_PTREAD (MIC_PASSTHRU_ID | MIC_SUBOPCODE_EXTCMD_START) + 1
#define MIC_SUBOPCODE_PTNODATA (MIC_PASSTHRU_ID | MIC_SUBOPCODE_EXTCMD_START) + 2
#define MIC_SUBOPCODE_READ_EXECUTE (MIC_PASSTHRU_ID | MIC_READ_EXECUTE_CMD)
#define MIC_SUBOPCODE_WRITE_EXECUTE (MIC_PASSTHRU_ID | MIC_WRITE_EXECUTE_CMD)
#define MIC_SUBOPCODE_RELEASE_RESOURCE (MIC_PASSTHRU_ID | MIC_RELEASE_RESOURCE)
/* commands for pass thru end*/
#define MIC_TEST_MODULE 0xFF
#define MIC_READ_EXECUTE_CMD 0xFE
#define MIC_WRITE_EXECUTE_CMD 0xFD
#define MIC_RELEASE_RESOURCE 0xFC
#define MIC_COMMAND_INFO 0xFB
/* Promise Management Interface Command Opcodes - Start */
#define PMIC_CONTROLLER_GET_INFO (0x0001 | MIC_CTLR_CONFIG_ID)
#define PMIC_CONTROLLER_GET_SETTINGS (0x0002 | MIC_CTLR_CONFIG_ID)
#define PMIC_CONTROLLER_SET_SETTINGS (0x0003 | MIC_CTLR_CONFIG_ID)
#define PMIC_CONTROLLER_READ_EXECUTE (MIC_READ_EXECUTE_CMD | MIC_CTLR_CONFIG_ID)
#define PMIC_CONTROLLER_RELEASE_RESOURCE (MIC_RELEASE_RESOURCE | MIC_CTLR_CONFIG_ID)
#define PMIC_CONTROLLER_WRITE_EXECUTE (MIC_WRITE_EXECUTE_CMD | MIC_CTLR_CONFIG_ID)
#define PMIC_SUBSYSTEM_GET_INFO (0x0004 | MIC_CTLR_CONFIG_ID)
#define PMIC_SUBSYSTEM_GET_SETTINGS (0x0005 | MIC_CTLR_CONFIG_ID)
#define PMIC_SUBSYSTEM_SET_SETTINGS (0x0006 | MIC_CTLR_CONFIG_ID)
#define PMIC_CONTROLLER_GET_TIME (0x0007 | MIC_CTLR_CONFIG_ID)
#define PMIC_CONTROLLER_SET_TIME (0x0008 | MIC_CTLR_CONFIG_ID)
#define PMIC_GET_UINQUE_CMD_ID (0x0005 | MIC_MCP_ID)
#define PMIC_RELEASE_UINQUE_CMD_ID (0x0006 | MIC_MCP_ID)
#define PMIC_GET_CONFIG_LOCK (0x0007 | MIC_MCP_ID)
#define PMIC_RELEASE_CONFIG_LOCK (0x0008 | MIC_MCP_ID)
#define PMIC_MODIFY_CL_UCID_TIMEOUT (0x0009 | MIC_MCP_ID)
#define PMIC_FORCE_RELEASE_CONFIG_LOCK (0x000A | MIC_MCP_ID)
#define PMIC_VERIFY_CL_UCID (0x000B | MIC_MCP_ID)
#define PMIC_ARRAY_CREATE_CONFIGURATION (0x0000 | MIC_MDD_FRONTEND_ID)
#define PMIC_ARRAY_DELETE_CONFIGURATION (0x0001 | MIC_MDD_FRONTEND_ID)
#define PMIC_ARRAY_GET_CONFIGURATION (0x0002 | MIC_MDD_FRONTEND_ID)
#define PMIC_LOGICAL_DRIVE_ADD (0x0003 | MIC_MDD_FRONTEND_ID)
#define PMIC_LOGICAL_DRIVE_DELETE (0x0004 | MIC_MDD_FRONTEND_ID)
#define PMIC_ARRAY_GET_INFORMATION (0x0005 | MIC_MDD_FRONTEND_ID)
#define PMIC_ARRAY_GET_SETTINGS (0x0006 | MIC_MDD_FRONTEND_ID)
#define PMIC_ARRAY_SET_SETTINGS (0x0007 | MIC_MDD_FRONTEND_ID)
#define PMIC_PHYSICAL_DRIVE_GET_INFORMATION (0x0008 | MIC_MDD_FRONTEND_ID)
#define PMIC_PHYSICAL_DRIVE_GET_SETTINGS (0x0009 | MIC_MDD_FRONTEND_ID)
#define PMIC_PHYSICAL_DRIVE_SET_SETTINGS (0x000A | MIC_MDD_FRONTEND_ID)
#define PMIC_LOGICAL_DRIVE_GET_INFORMATION (0x000B | MIC_MDD_FRONTEND_ID)
#define PMIC_LOGICAL_DRIVE_GET_SETTINGS (0x000C | MIC_MDD_FRONTEND_ID)
#define PMIC_LOGICAL_DRIVE_SET_SETTINGS (0x000D | MIC_MDD_FRONTEND_ID)
#define PMIC_GET_MISSING_PHYSICAL_DRIVES (0x000E | MIC_MDD_FRONTEND_ID)
#define PMIC_PROCESS_INCOMPLETE_ARRAY (0x000F | MIC_MDD_FRONTEND_ID)
#define PMIC_MIGRATE_ARRAY (0x0010 | MIC_MDD_FRONTEND_ID)
#define PMIC_MIGRATE_GETPROGRESS (0x0011 | MIC_MDD_FRONTEND_ID)
#define PMIC_GET_TRANSITION_PD_INFO (0x0012 | MIC_MDD_FRONTEND_ID)
#define PMIC_OBTAINLOCKKEY (0x0001 | MIC_LOCKMGR_ID)
#define PMIC_RELEASELOCKKEY (0x0002 | MIC_LOCKMGR_ID)
/* R/W Process General SubOpcode. */
#define PMIC_GET_ERR_TABLE (0x0001 | MIC_RWPROCESS_ID)
/* Background Task General SubOpCodes */
#define PMIC_SUBOPCODE_START 0x0001
#define PMIC_SUBOPCODE_STOP 0x0002
#define PMIC_SUBOPCODE_PAUSE 0x0003
#define PMIC_SUBOPCODE_RESUME 0x0004
#define PMIC_SUBOPCODE_GET_PROGRESS 0x0005
#define PMIC_SUBOPCODE_QUICK_INIT 0x0006
/* Media Patrol*/
#define PMIC_MEDIAPATROL_START (PMIC_SUBOPCODE_START | MIC_MEDIA_PATROL_ID)
#define PMIC_MEDIAPATROL_STOP (PMIC_SUBOPCODE_STOP | MIC_MEDIA_PATROL_ID)
#define PMIC_MEDIAPATROL_PAUSE (PMIC_SUBOPCODE_PAUSE | MIC_MEDIA_PATROL_ID)
#define PMIC_MEDIAPATROL_RESUME (PMIC_SUBOPCODE_RESUME | MIC_MEDIA_PATROL_ID)
#define PMIC_MEDIAPATROL_GETPROGRESS (PMIC_SUBOPCODE_GET_PROGRESS | MIC_MEDIA_PATROL_ID)
/* Logical Drive Initialization*/
#define PMIC_LDI_START (PMIC_SUBOPCODE_START | MIC_LD_INIT_ID)
#define PMIC_LDI_STOP (PMIC_SUBOPCODE_STOP | MIC_LD_INIT_ID)
#define PMIC_LDI_PAUSE (PMIC_SUBOPCODE_PAUSE | MIC_LD_INIT_ID)
#define PMIC_LDI_RESUME (PMIC_SUBOPCODE_RESUME | MIC_LD_INIT_ID)
#define PMIC_LDI_GETPROGRESS (PMIC_SUBOPCODE_GET_PROGRESS | MIC_LD_INIT_ID)
#define PMIC_LDI_QUICK_INIT (PMIC_SUBOPCODE_QUICK_INIT | MIC_LD_INIT_ID)
/* Rebuild */
#define PMIC_REBUILD_START (PMIC_SUBOPCODE_START | MIC_REBUILD_ID)
#define PMIC_REBUILD_STOP (PMIC_SUBOPCODE_STOP | MIC_REBUILD_ID)
#define PMIC_REBUILD_PAUSE (PMIC_SUBOPCODE_PAUSE | MIC_REBUILD_ID)
#define PMIC_REBUILD_RESUME (PMIC_SUBOPCODE_RESUME | MIC_REBUILD_ID)
#define PMIC_REBUILD_GETPROGRESS (PMIC_SUBOPCODE_GET_PROGRESS | MIC_REBUILD_ID)
#define PMIC_REBUILD_TEST (MIC_TEST_MODULE | MIC_REBUILD_ID)
/* Background Synchronization */
#define PMIC_BKSYNC_STOP (PMIC_SUBOPCODE_STOP | MIC_BKSYNC_ID)
#define PMIC_BKSYNC_GETPROGRESS (PMIC_SUBOPCODE_GET_PROGRESS | MIC_BKSYNC_ID)
#define PMIC_BKSYNC_TEST (MIC_TEST_MODULE | MIC_BKSYNC_ID)
/* SCSI_Emulation & LUN Masking & Mapping Module */
#define PMIC_LMM_GET_INITIATOR_LIST (0x0000 | MIC_SCSIEMU_ID )
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