msm3000_registers.csv

This file defines all the register names and addresses.

name,address,type,mask
Demodulator Registers,Demodulator Registers,Demodulator Registers,Demodulator Registers
DEMOD_RESET,0x3000000,W,0FFFFFFF
Demodulator Searcher Engine,Demodulator Searcher Engine,Demodulator Searcher Engine,Demodulator Searcher Engine
SEARCH_CTL,0x3000004,W,0FFFFFFF
SEARCH_EARLY_THRESHOLD_ENERGY,0x300000C,W,0FFFFFFF
SEARCH_EARLY_THRESHOLD_ENERGY,0x3000008,W,0FFFFFFF
SEARCH_INTEGRATE_TIME,0x3000010,W,0FFFFFFF
SEARCH_EARLY_THRESHOLD_TIME,0x3000014,W,0FFFFFFF
SEARCH_BINARY_OFFSET,0x300001C,W,0FFFFFFF
SEARCH_BINARY_OFFSET,0x3000018,W,0FFFFFFF
SEARCH_PN_I_MASK,0x3000024,W,0FFFFFFF
SEARCH_PN_I_MASK,0x3000020,W,0FFFFFFF
SEARCH_PN_Q_MASK,0x300002C,W,0FFFFFFF
SEARCH_PN_Q_MASK,0x3000028,W,0FFFFFFF
SEARCH_SLEW,0x3000038,W,0FFFFFFF
SEARCH_SLEW,0x3000034,W,0FFFFFFF
SEARCH_SLEW,0x3000030,W,0FFFFFFF
SEARCH_POSITION,0x3000038,R,0FFFFFFF
SEARCH_POSITION,0x3000034,R,0FFFFFFF
SEARCH_POSITION,0x3000030,R,0FFFFFFF
SEARCH_ACC_PASSES,0x300003C,W,0FFFFFFF
SEARCH_NUM,0x3000044,W,0FFFFFFF
SEARCH_NUM,0x3000040,W,0FFFFFFF
SEARCH_MAX_ENERGY,0x3000044,R,0FFFFFFF
SEARCH_MAX_ENERGY,0x3000040,R,0FFFFFFF
SEARCH_MAX_SEL,0x3000048,W,0FFFFFFF
SEARCH_MAX_INDEX,0x300004C,R,0FFFFFFF
SEARCH_MAX_INDEX,0x3000048,R,0FFFFFFF
Demodulator Finger Control,Demodulator Finger Control,Demodulator Finger Control,Demodulator Finger Control
POWER_CTL_F0_CELLn_EN,0x3000060,W,0FFFFFFF
POWER_CTL_F1_CELLn_EN,0x3000064,W,0FFFFFFF
POWER_CTL_F2_CELLn_EN,0x3000068,W,0FFFFFFF
POWER_CTL_F3_CELLn_EN,0x300006C,W,0FFFFFFF
Fn_CTL1,0x3000070,W,0FFFFFFF
Fn_CTL2,0x3000074,W,0FFFFFFF
FINGER_PAGE_REG,0x3000078,W,0FFFFFFF
TT_ACCUM_WR,0x3000080,W,0FFFFFFF
TT_ACCUM_WR,0x300007C,W,0FFFFFFF
TT_K1_GAIN,0x3000084,W,0FFFFFFF
TT_K2_GAIN,0x3000088,W,0FFFFFFF
LOCK_RSSI_GAIN,0x300008C,W,0FFFFFFF
Fn_LOCK_RSSI_WR,0x3000090,W,0FFFFFFF
Fn_LOCK_RSSI_RD,0x3000090,R,0FFFFFFF
Fn_LOCK_RSSI_RD,0x300008C,R,0FFFFFFF
Fn_BINARY_OFFSET,0x3000098,W,0FFFFFFF
Fn_BINARY_OFFSET,0x3000094,W,0FFFFFFF
Fn_PN_I_MASK,0x30000A0,W,0FFFFFFF
Fn_PN_I_MASK,0x300009C,W,0FFFFFFF
Fn_PN_Q_MASK,0x30000A8,W,0FFFFFFF
Fn_PN_Q_MASK,0x30000A4,W,0FFFFFFF
Fn_CODE_CHAN_ID,0x30000AC,W,0FFFFFFF
Fn_SLEW_VALUE,0x30000B8,W,0FFFFFFF
Fn_SLEW_VALUE,0x30000B4,W,0FFFFFFF
Fn_SLEW_VALUE,0x30000B0,W,0FFFFFFF
Fn_POSITION,0x30000B8,R,0FFFFFFF
Fn_POSITION,0x30000B4,R,0FFFFFFF
Fn_POSITION,0x30000B0,R,0FFFFFFF
PILOT_FILTER_GAIN,0x30000BC,W,0FFFFFFF
LOCK_THRESHOLD,0x30000C4,W,0FFFFFFF
LOCK_THRESHOLD,0x30000C0,W,0FFFFFFF
Fn_POWER_THRESHOLD,0x30000C8,W,0FFFFFFF
FREQ_COMB_GAIN,0x30000CC,W,0FFFFFFF
Fn_SUP_NUM,0x30000D8,W,0FFFFFFF
COMB_SUP_NUM,0x30000DC,W,0FFFFFFF
Fn_SUP_CODE1,0x3000134,W,0FFFFFFF
Fn_SUP_CODE2,0x3000138,W,0FFFFFFF
Fn_SUP_CODE3,0x300013C,W,0FFFFFFF
Fn_SUP_CODE4,0x3000140,W,0FFFFFFF
Fn_SUP_CODE5,0x3000144,W,0FFFFFFF
Fn_SUP_CODE6,0x3000148,W,0FFFFFFF
Fn_SUP_CODE7,0x300014C,W,0FFFFFFF
DEM_FRAME_OFF,0x3000150,W,0FFFFFFF
DEM_CTL,0x3000154,W,0FFFFFFF
Demodulator Symbol Combiner,Demodulator Symbol Combiner,Demodulator Symbol Combiner,Demodulator Symbol Combiner
POWER_COMB_CTL,0x30000E0,W,0FFFFFFF
SYMB_COMB_CTL0,0x30000E4,W,0FFFFFFF
SYMB_COMB_STATUS0,0x30000E4,R,0FFFFFFF
SYMB_COMB_CTL1,0x30000E8,W,0FFFFFFF
SYMB_COMB_POS_DUMP,0x30000F4,W,0FFFFFFF
SYMB_COMB_FREQ_ADJ,0x30000FC,W,0FFFFFFF
SYMB_COMB_FREQ_ADJ,0x30000F8,W,0FFFFFFF
SYMB_COMB_POSITION2,0x30000FC,R,0FFFFFFF
SYMB_COMB_POSITION2,0x30000F8,R,0FFFFFFF
SYMB_COMB_LONG_CODE_LD,0x3000114,W,0FFFFFFF
SYMB_COMB_LONG_CODE_LD,0x3000110,W,0FFFFFFF
SYMB_COMB_LONG_CODE_LD,0x300010C,W,0FFFFFFF
SYMB_COMB_LONG_CODE_LD,0x3000108,W,0FFFFFFF
SYMB_COMB_LONG_CODE_LD,0x3000104,W,0FFFFFFF
SYMB_COMB_LONG_CODE_LD,0x3000100,W,0FFFFFFF
SYMB_COMB_LONG_CODE,0x3000114,R,0FFFFFFF
SYMB_COMB_LONG_CODE,0x3000110,R,0FFFFFFF
SYMB_COMB_LONG_CODE,0x300010C,R,0FFFFFFF
SYMB_COMB_LONG_CODE,0x3000108,R,0FFFFFFF
SYMB_COMB_LONG_CODE,0x3000104,R,0FFFFFFF
SYMB_COMB_LONG_CODE,0x3000100,R,0FFFFFFF
SYMB_COMB_LONG_CODE_MASK,0x300012C,W,0FFFFFFF
SYMB_COMB_LONG_CODE_MASK,0x3000128,W,0FFFFFFF
SYMB_COMB_LONG_CODE_MASK,0x3000124,W,0FFFFFFF
SYMB_COMB_LONG_CODE_MASK,0x3000120,W,0FFFFFFF
SYMB_COMB_LONG_CODE_MASK,0x300011C,W,0FFFFFFF
SYMB_COMB_LONG_CODE_MASK,0x3000118,W,0FFFFFFF
EPOCH,0x3000130,V,0FFFFFFF
CDMA AGC & Frequency Tracking and Baseband Offset Control,CDMA AGC & Frequency Tracking and Baseband Offset Control,CDMA AGC & Frequency Tracking and Baseband Offset Control,CDMA AGC & Frequency Tracking and Baseband Offset Control
FREQ_COMB_CTL,0x3000160,W,0FFFFFFF
CARRIER_FREQ_ERR_WR,0x3000168,W,0FFFFFFF
CARRIER_FREQ_ERR_WR,0x3000164,W,0FFFFFFF
CARRIER_FREQ_ERR_RD,0x3000168,R,0FFFFFFF
CARRIER_FREQ_ERR_RD,0x3000164,R,0FFFFFFF
I_OFFSET_WR,0x3000174,W,0FFFFFFF
I_OFFSET_RD,0x3000174,R,0FFFFFFF
Q_OFFSET_WR,0x3000178,W,0FFFFFFF
Q_OFFSET_RD,0x3000178,R,0FFFFFFF
IQ_OFFSET_CTL,0x300017C,W,0FFFFFFF
RAS_RAM_DATA_MSB,0x3000180,W,0FFFFFFF
RAS_RAM_DATA_LSB,0x3000184,W,0FFFFFFF
AGC_RDWR_CTL,0x300018C,W,0FFFFFFF
AGC_CTL,0x3000190,W,0FFFFFFF
RATCHET_BIT_DISABLE,0x3000190,R,0FFFFFFF
AGC_CTL2,0x3000194,W,0FFFFFFF
RX_AGC_ADJ_WR,0x3000198,W,0FFFFFFF
RX_AGC_ADJ_RD,0x3000198,R,0FFFFFFF
TX_AGC_ADJ_WR_MSB,0x300019C,W,0FFFFFFF
TX_AGC_ADJ_RD,0x300019C,R,0FFFFFFF
AGC_VALUE_WR,0x30001A0,W,0FFFFFFF
AGC_VALUE_RD,0x30001A0,R,0FFFFFFF
AGC_VALUE_MAX,0x30001A4,W,0FFFFFFF
AGC_VALUE_MIN,0x30001A8,W,0FFFFFFF
AGC_CTL3,0x30001AC,W,0FFFFFFF
LNA_PA_RD,0x30001AC,R,0FFFFFFF
AGC_CTL4,0x30001B0,W,0FFFFFFF
TX_GAIN_LIMIT_LSB,0x30001B4,W,0FFFFFFF
LNA_OFFSET_LSB,0x30001B8,W,0FFFFFFF
IM_STATE_CTL,0x30001BC,W,0FFFFFFF
LNA_FALL,0x30001C0,W,0FFFFFFF
LNA_RISE,0x30001C4,W,0FFFFFFF
LNA_FILT_WR,0x30001C8,W,0FFFFFFF
LNA_FILT_RD,0x30001C8,R,0FFFFFFF
AGC_CTL5,0x30001CC,W,0FFFFFFF
AGC_CTL6,0x30001D0,W,0FFFFFFF
LNA_GAIN_WR,0x30001D4,W,0FFFFFFF
LNA_GAIN_RD,0x30001D4,R,0FFFFFFF
LNA_GAIN_MIN,0x30001D8,W,0FFFFFFF
LNA_GAIN_PWR_MAX,0x30001DC,W,0FFFFFFF
TX_OPEN_LOOP_WR,0x30001E0,W,0FFFFFFF
TX_OPEN_LOOP_RD,0x30001E0,R,0FFFFFFF
TX_GAIN_ADJ_WR,0x30001E4,W,0FFFFFFF
TX_GAIN_ADJ_RD,0x30001E4,R,0FFFFFFF
PA_R1_RISE,0x30001E8,W,0FFFFFFF
PA_R1_FALL,0x30001EC,W,0FFFFFFF
PA_R2_RISE,0x30001F0,W,0FFFFFFF
PA_R2_FALL,0x30001F4,W,0FFFFFFF
PA_R3_RISE,0x30001F8,W,0FFFFFFF
PA_R3_FALL,0x30001FC,W,0FFFFFFF
PA_R_MAP,0x3000200,W,0FFFFFFF
AGC_CTL7,0x3000204,W,0FFFFFFF
PA_R_TIMER,0x3000208,W,0FFFFFFF
TX_GAIN_CTL_MSB,0x3000210,R,0FFFFFFF
TX_GAIN_CTL_LSB,0x3000214,R,0FFFFFFF
Modulator Registers,Modulator Registers,Modulator Registers,Modulator Registers
MOD_RESET,0x3000220,W,0FFFFFFF
MASK_DATA,0x3000220,R,0FFFFFFF
MOD_STATUS,0x3000224,R,0FFFFFFF
I_PN_STATE,0x3000244,W,0FFFFFFF
I_PN_STATE,0x3000240,W,0FFFFFFF
Q_PN_STATE,0x300024C,W,0FFFFFFF
Q_PN_STATE,0x3000248,W,0FFFFFFF
U_PN_STATE[39:0],0x3000260,W,0FFFFFFF
U_PN_STATE[39:0],0x300025C,W,0FFFFFFF
U_PN_STATE[39:0],0x3000258,W,0FFFFFFF
U_PN_STATE[39:0],0x3000254,W,0FFFFFFF
U_PN_STATE[39:0],0x3000250,W,0FFFFFFF
U_PN_STATE[41:0]/CTL,0x3000264,W,0FFFFFFF
U_PN_MASK,0x300027C,W,0FFFFFFF
U_PN_MASK,0x3000278,W,0FFFFFFF
U_PN_MASK,0x3000274,W,0FFFFFFF
U_PN_MASK,0x3000270,W,0FFFFFFF
U_PN_MASK,0x300026C,W,0FFFFFFF
U_PN_MASK,0x3000268,W,0FFFFFFF
PA_WARMUP,0x3000280,W,0FFFFFFF
WSYM_STATE,0x3000284,W,0FFFFFFF
TX_SYNC_ST,0x300028C,W,0FFFFFFF
TX_SYNC_ST,0x3000288,W,0FFFFFFF
SYSFR_STATE,0x3000290,W,0FFFFFFF
ENC_INT_ST,0x3000294,W,0FFFFFFF
ENC_DATA,0x3000298,W,0FFFFFFF
ENC_CTL,0x300029C,W,0FFFFFFF
CRC_MSB,0x30002A0,W,0FFFFFFF
CRC_LSB,0x30002A4,W,0FFFFFFF
MOD_CLK_CTL,0x30002A8,W,0FFFFFFF
MOD_MISC_CTL,0x30002AC,W,0FFFFFFF
FRAME_OFF,0x30002B0,W,0FFFFFFF
MOD_TEST_CTL,0x30002C0,W,0FFFFFFF
TX_I_CLK,0x30002C4,W,0FFFFFFF
TX_DATA_TEST,0x30002C8,W,0FFFFFFF
Decoder Registers,Decoder Registers,Decoder Registers,Decoder Registers
DEC_RESET,0x30002E0,W,0FFFFFFF
DECMODE,0x3000300,W,0FFFFFFF
SMTDATA,0x3000304,W,0FFFFFFF
DECDATA,0x3000304,R,0FFFFFFF
DECSTATUS,0x3000308,R,0FFFFFFF
OBADDRESS,0x300030C,W,0FFFFFFF
QT8_QT4,0x3000318,W,0FFFFFFF
QT2_QT1,0x300031C,W,0FFFFFFF
SER8,0x3000310,R,0FFFFFFF
SER4,0x3000314,R,0FFFFFFF
SER2,0x3000318,R,0FFFFFFF
SER1,0x300031C,R,0FFFFFFF
DEC_CRC,0x3000320,W,0FFFFFFF
SUP_QTHRESH,0x3000324,W,0FFFFFFF
SUP1_SER,0x3000340,R,0FFFFFFF
SUP2_SER,0x3000344,R,0FFFFFFF
SUP3_SER,0x3000348,R,0FFFFFFF
SUP4_SER,0x300034C,R,0FFFFFFF
SUP5_SER,0x3000350,R,0FFFFFFF
SUP6_SER,0x3000354,R,0FFFFFFF
SUP7_SER,0x3000358,R,0FFFFFFF
SUP_QMETRICS,0x300035C,R,0FFFFFFF
SUP_CRCBITS,0x3000360,R,0FFFFFFF
DEC_MDR_RESULTS,0x3000364,R,0FFFFFFF
DECDEMIF_STATUS,0x3000368,R,0FFFFFFF
CDMA Vocoder Control and Write Registers,CDMA Vocoder Control and Write Registers,CDMA Vocoder Control and Write Registers,CDMA Vocoder Control and Write Registers
VOC_RESET,0x3000400,W,0FFFFFFF
VOC_ENC_FRAME_ADVANCE,0x3000404,W,0FFFFFFF
VOC_ENC_ADJUST,0x3000408,W,0FFFFFFF
VOC_DEC_FRAME_ADVANCE,0x300040C,W,0FFFFFFF
VOC_DEC_ADJUST,0x3000410,W,0FFFFFFF
VOC_DEC_INT_ADVANCE,0x3000414,W,0FFFFFFF
VOC_ENC_PCM_CTL,0x3000418,W,0FFFFFFF
VOC_DEC_PCM_CTL,0x300041C,W,0FFFFFFF
VOC_ENC_PCM_WR,0x3000424,W,0FFFFFFF
VOC_ENC_PCM_WR,0x3000420,W,0FFFFFFF
VOC_DEC_PCM_WR,0x300042C,W,0FFFFFFF
VOC_DEC_PCM_WR,0x3000428,W,0FFFFFFF
TEST_CTL_1,0x3000430,W,0FFFFFFF
MODE_CTL,0x300043C,W,0FFFFFFF
ESEC_AUDIO_CTL,0x3000440,W,0FFFFFFF
VOC_ENC_RATE_CTL,0x3000454,W,0FFFFFFF
VOC_ENC_RATE_LIMIT_FACTOR,0x3000458,W,0FFFFFFF
RRM_LEVEL,0x3000458,W,0FFFFFFF
ENERGY_DECAY_FACTOR,0x3000460,W,0FFFFFFF
ENERGY_DECAY_FACTOR,0x300045C,W,0FFFFFFF
BGN_DECAY_FACTOR,0x3000468,W,0FFFFFFF
BGN_DECAY_FACTOR,0x3000464,W,0FFFFFFF