📄 ac8-2.lst
字号:
__start:
__text_start:
002A E5CF LDI R28,0x5F
002B E0D4 LDI R29,4
002C BFCD OUT 0x3D,R28
002D BFDE OUT 0x3E,R29
002E 51C0 SUBI R28,0x10
002F 40D0 SBCI R29,0
0030 EA0A LDI R16,0xAA
0031 8308 STD Y+0,R16
0032 2400 CLR R0
0033 E6E0 LDI R30,0x60
0034 E0F0 LDI R31,0
0035 E010 LDI R17,0
0036 36E2 CPI R30,0x62
0037 07F1 CPC R31,R17
0038 F011 BEQ 0x003B
0039 9201 ST R0,Z+
003A CFFB RJMP 0x0036
003B 8300 STD Z+0,R16
003C E5E4 LDI R30,0x54
003D E0F0 LDI R31,0
003E E6A0 LDI R26,0x60
003F E0B0 LDI R27,0
0040 E010 LDI R17,0
0041 35E4 CPI R30,0x54
0042 07F1 CPC R31,R17
0043 F021 BEQ 0x0048
0044 95C8 LPM
0045 9631 ADIW R30,1
0046 920D ST R0,X+
0047 CFF9 RJMP 0x0041
0048 940E0061 CALL _main
_exit:
004A CFFF RJMP _exit
_delay_ms:
i --> R20
j --> R22
k --> R16
004B 940E00B3 CALL push_gset2
FILE: D:\AVR\第8章实验程序\ac8-2\ac8-2.c
(0001) #include<iom16v.h>
(0002) #define uchar unsigned char
(0003) #define uint unsigned int
(0004) #define BZ_0 (PORTD=PORTD&0xdf)
(0005) #define BZ_1 (PORTD=PORTD|0x20)
(0006) uint cnt;
(0007) //=============================
(0008) void delay_ms(uint k)
(0009) {
(0010) uint i,j;
(0011) for(i=0;i<k;i++)
004D 2744 CLR R20
004E 2755 CLR R21
004F C00B RJMP 0x005B
(0012) {
(0013) for(j=0;j<1140;j++)
0050 2766 CLR R22
0051 2777 CLR R23
0052 C002 RJMP 0x0055
0053 5F6F SUBI R22,0xFF
0054 4F7F SBCI R23,0xFF
0055 3764 CPI R22,0x74
0056 E0E4 LDI R30,4
0057 077E CPC R23,R30
0058 F3D0 BCS 0x0053
0059 5F4F SUBI R20,0xFF
005A 4F5F SBCI R21,0xFF
005B 1740 CP R20,R16
005C 0751 CPC R21,R17
005D F390 BCS 0x0050
005E 940E00AA CALL pop_gset2
0060 9508 RET
(0014) ;
(0015) }
(0016) }
(0017) //=============================
(0018) void main(void)
(0019) {
(0020) PORTB=0xff;
_main:
0061 EF8F LDI R24,0xFF
0062 BB88 OUT 0x18,R24
(0021) DDRB=0xff;
0063 BB87 OUT 0x17,R24
(0022) PORTD=0xff;
0064 BB82 OUT 0x12,R24
(0023) DDRD = 0xf3;
0065 EF83 LDI R24,0xF3
0066 BB81 OUT 0x11,R24
(0024) MCUCR = 0x0A;
0067 E08A LDI R24,0xA
0068 BF85 OUT 0x35,R24
(0025) GICR = 0xC0;
0069 EC80 LDI R24,0xC0
006A BF8B OUT 0x3B,R24
(0026) SREG=0x80;
006B E880 LDI R24,0x80
006C BF8F OUT 0x3F,R24
006D C00A RJMP 0x0078
(0027) while(1)
(0028) {
(0029) PORTB=0x00;
006E 2422 CLR R2
006F BA28 OUT 0x18,R2
(0030) delay_ms(500);
0070 EF04 LDI R16,0xF4
0071 E011 LDI R17,1
0072 DFD8 RCALL _delay_ms
(0031) PORTB=0xff;
0073 EF8F LDI R24,0xFF
0074 BB88 OUT 0x18,R24
(0032) delay_ms(500);
0075 EF04 LDI R16,0xF4
0076 E011 LDI R17,1
0077 DFD3 RCALL _delay_ms
0078 CFF5 RJMP 0x006E
0079 9508 RET
_int0_isr:
007A 940E00CC CALL push_lset
(0033) }
(0034) }
(0035) //***************************************************
(0036) #pragma interrupt_handler int0_isr:2
(0037) void int0_isr(void)
(0038) {
(0039) PORTB=0x0f;
007C E08F LDI R24,0xF
007D BB88 OUT 0x18,R24
(0040) delay_ms(2000);
007E ED00 LDI R16,0xD0
007F E017 LDI R17,7
0080 DFCA RCALL _delay_ms
0081 940E00E3 CALL pop_lset
0083 9518 RETI
_int1_isr:
0084 940E00CC CALL push_lset
(0041) }
(0042) //****************************************
(0043) #pragma interrupt_handler int1_isr:3
(0044) void int1_isr(void)
(0045) {
(0046) SREG=0x80;
0086 E880 LDI R24,0x80
0087 BF8F OUT 0x3F,R24
(0047) for(cnt=0;cnt<5000;cnt++)
0088 2422 CLR R2
0089 2433 CLR R3
008A 92300061 STS cnt+1,R3
008C 92200060 STS cnt,R2
008E C010 RJMP 0x009F
(0048) {BZ_1;delay_ms(2); BZ_0;}
FILE: <library>
008F 9A95 SBI 0x12,5
0090 E002 LDI R16,2
0091 E010 LDI R17,0
0092 DFB8 RCALL _delay_ms
0093 B382 IN R24,0x12
0094 7D8F ANDI R24,0xDF
0095 BB82 OUT 0x12,R24
0096 91800060 LDS R24,cnt
0098 91900061 LDS R25,cnt+1
009A 9601 ADIW R24,1
009B 93900061 STS cnt+1,R25
009D 93800060 STS cnt,R24
009F 91800060 LDS R24,cnt
00A1 91900061 LDS R25,cnt+1
00A3 3888 CPI R24,0x88
00A4 E1E3 LDI R30,0x13
00A5 079E CPC R25,R30
00A6 F340 BCS 0x008F
00A7 940E00E3 CALL pop_lset
00A9 9518 RETI
pop_gset2:
00AA E0E2 LDI R30,2
00AB 940C00B9 JMP pop
push_gset5:
00AD 92FA ST R15,-Y
00AE 92EA ST R14,-Y
push_gset4:
00AF 92DA ST R13,-Y
00B0 92CA ST R12,-Y
push_gset3:
00B1 92BA ST R11,-Y
00B2 92AA ST R10,-Y
push_gset2:
00B3 937A ST R23,-Y
00B4 936A ST R22,-Y
push_gset1:
00B5 935A ST R21,-Y
00B6 934A ST R20,-Y
00B7 9508 RET
pop_gset1:
00B8 E0E1 LDI R30,1
pop:
00B9 9149 LD R20,Y+
00BA 9159 LD R21,Y+
00BB FDE0 SBRC R30,0
00BC 9508 RET
00BD 9169 LD R22,Y+
00BE 9179 LD R23,Y+
00BF FDE1 SBRC R30,1
00C0 9508 RET
00C1 90A9 LD R10,Y+
00C2 90B9 LD R11,Y+
00C3 FDE2 SBRC R30,2
00C4 9508 RET
00C5 90C9 LD R12,Y+
00C6 90D9 LD R13,Y+
00C7 FDE3 SBRC R30,3
00C8 9508 RET
00C9 90E9 LD R14,Y+
00CA 90F9 LD R15,Y+
00CB 9508 RET
push_lset:
00CC 93FA ST R31,-Y
00CD 93EA ST R30,-Y
00CE 93BA ST R27,-Y
00CF 93AA ST R26,-Y
00D0 939A ST R25,-Y
00D1 938A ST R24,-Y
00D2 933A ST R19,-Y
00D3 932A ST R18,-Y
00D4 931A ST R17,-Y
00D5 930A ST R16,-Y
00D6 929A ST R9,-Y
00D7 928A ST R8,-Y
00D8 927A ST R7,-Y
00D9 926A ST R6,-Y
00DA 925A ST R5,-Y
00DB 924A ST R4,-Y
00DC 923A ST R3,-Y
00DD 922A ST R2,-Y
00DE 921A ST R1,-Y
00DF 920A ST R0,-Y
00E0 B60F IN R0,0x3F
00E1 920A ST R0,-Y
00E2 9508 RET
pop_lset:
00E3 9009 LD R0,Y+
00E4 BE0F OUT 0x3F,R0
00E5 9009 LD R0,Y+
00E6 9019 LD R1,Y+
00E7 9029 LD R2,Y+
00E8 9039 LD R3,Y+
00E9 9049 LD R4,Y+
00EA 9059 LD R5,Y+
00EB 9069 LD R6,Y+
00EC 9079 LD R7,Y+
00ED 9089 LD R8,Y+
00EE 9099 LD R9,Y+
00EF 9109 LD R16,Y+
00F0 9119 LD R17,Y+
00F1 9129 LD R18,Y+
00F2 9139 LD R19,Y+
00F3 9189 LD R24,Y+
00F4 9199 LD R25,Y+
00F5 91A9 LD R26,Y+
00F6 91B9 LD R27,Y+
00F7 91E9 LD R30,Y+
00F8 91F9 LD R31,Y+
00F9 9508 RET
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