ac10-2.lst

AVR学习资料

__text_start:
__start:
    0031 E5CF      LDI	R28,0x5F
    0032 E0D4      LDI	R29,4
    0033 BFCD      OUT	0x3D,R28
    0034 BFDE      OUT	0x3E,R29
    0035 51C0      SUBI	R28,0x10
    0036 40D0      SBCI	R29,0
    0037 EA0A      LDI	R16,0xAA
    0038 8308      STD	Y+0,R16
    0039 2400      CLR	R0
    003A E6E0      LDI	R30,0x60
    003B E0F0      LDI	R31,0
    003C E010      LDI	R17,0
    003D 36E6      CPI	R30,0x66
    003E 07F1      CPC	R31,R17
    003F F011      BEQ	0x0042
    0040 9201      ST	R0,Z+
    0041 CFFB      RJMP	0x003D
    0042 8300      STD	Z+0,R16
    0043 E6E2      LDI	R30,0x62
    0044 E0F0      LDI	R31,0
    0045 E6A0      LDI	R26,0x60
    0046 E0B0      LDI	R27,0
    0047 E010      LDI	R17,0
    0048 36E2      CPI	R30,0x62
    0049 07F1      CPC	R31,R17
    004A F021      BEQ	0x004F
    004B 95C8      LPM
    004C 9631      ADIW	R30,1
    004D 920D      ST	R0,X+
    004E CFF9      RJMP	0x0048
    004F 940E0181  CALL	_main
_exit:
    0051 CFFF      RJMP	_exit
FILE: d:\MYDOCU~1\ac10-2\ac10-2.c
(0001) #include <iom16v.h>			
(0002) #define uchar unsigned char	
(0003) #define uint  unsigned int
(0004) #define OUT1_0  (PORTB=PORTB&0xfe) 
(0005) #define OUT1_1  (PORTB=PORTB|0x01) 
(0006) #define OUT2_0  (PORTB=PORTB&0xfd) 
(0007) #define OUT2_1  (PORTB=PORTB|0x02) 
(0008) uchar const SEG7[10]={0x3f,0x06,0x5b,
(0009) 0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f};
(0010) uchar const ACT[4]={0xfe,0xfd,0xfb,0xf7};
(0011) uint value,dis_val; 
(0012) uchar i,flag; 
(0013) /****************************************/
(0014) void port_init(void)	
(0015) {						
(0016)  PORTA = 0x7F;	
_port_init:
    0052 E78F      LDI	R24,0x7F
    0053 BB8B      OUT	0x1B,R24
(0017)  DDRA  = 0x7F;		
    0054 BB8A      OUT	0x1A,R24
(0018)  PORTB = 0xFF;		
    0055 EF8F      LDI	R24,0xFF
    0056 BB88      OUT	0x18,R24
(0019)  DDRB  = 0xFF;
    0057 BB87      OUT	0x17,R24
(0020)  PORTC = 0xFF; 			
    0058 BB85      OUT	0x15,R24
(0021)  DDRC  = 0xFF;		
    0059 BB84      OUT	0x14,R24
(0022)  PORTD = 0xFF;			
    005A BB82      OUT	0x12,R24
(0023)  DDRD  = 0xFF;			
    005B BB81      OUT	0x11,R24
    005C 9508      RET
(0024) }				
(0025) /************************************/
(0026) void timer0_init(void) 
(0027) {
(0028)  TCNT0 = 0x83; 	
_timer0_init:
    005D E883      LDI	R24,0x83
    005E BF82      OUT	0x32,R24
(0029)  OCR0  = 0x7D;
    005F E78D      LDI	R24,0x7D
    0060 BF8C      OUT	0x3C,R24
(0030)  TCCR0 = 0x03; 	
    0061 E083      LDI	R24,3
    0062 BF83      OUT	0x33,R24
    0063 9508      RET
_timer0_ovf_isr:
    0064 922A      ST	R2,-Y
    0065 930A      ST	R16,-Y
    0066 931A      ST	R17,-Y
    0067 932A      ST	R18,-Y
    0068 933A      ST	R19,-Y
    0069 938A      ST	R24,-Y
    006A 939A      ST	R25,-Y
    006B 93EA      ST	R30,-Y
    006C 93FA      ST	R31,-Y
    006D B62F      IN	R2,0x3F
    006E 922A      ST	R2,-Y
    006F 940E027B  CALL	push_gset1
(0031) }
(0032) /*************************************/
(0033) #pragma interrupt_handler timer0_ovf_isr:10 
(0034) void timer0_ovf_isr(void)
(0035) {
(0036)  TCNT0 = 0x83; 	
    0071 E883      LDI	R24,0x83
    0072 BF82      OUT	0x32,R24
(0037)  if(++i>3)i=0;	
    0073 91800061  LDS	R24,i
    0075 5F8F      SUBI	R24,0xFF
    0076 2E28      MOV	R2,R24
    0077 92200061  STS	i,R2
    0079 E083      LDI	R24,3
    007A 1582      CP	R24,R2
    007B F418      BCC	0x007F
    007C 2422      CLR	R2
    007D 92200061  STS	i,R2
(0038)  switch(i) 		
    007F 91400061  LDS	R20,i
    0081 2755      CLR	R21
    0082 3040      CPI	R20,0
    0083 0745      CPC	R20,R21
    0084 F079      BEQ	0x0094
    0085 3041      CPI	R20,1
    0086 E0E0      LDI	R30,0
    0087 075E      CPC	R21,R30
    0088 F0F9      BEQ	0x00A8
    0089 3042      CPI	R20,2
    008A E0E0      LDI	R30,0
    008B 075E      CPC	R21,R30
    008C F409      BNE	0x008E
    008D C032      RJMP	0x00C0
    008E 3043      CPI	R20,3
    008F E0E0      LDI	R30,0
    0090 075E      CPC	R21,R30
    0091 F409      BNE	0x0093
    0092 C045      RJMP	0x00D8
    0093 C057      RJMP	0x00EB
(0039)  {
(0040)  case 0:PORTA=SEG7[dis_val%10];PORTC=ACT[0];break;
    0094 E02A      LDI	R18,0xA
    0095 E030      LDI	R19,0
    0096 91000062  LDS	R16,dis_val
    0098 91100063  LDS	R17,dis_val+1
    009A 940E01B0  CALL	mod16u
    009C 01F8      MOVW	R30,R16
    009D E584      LDI	R24,0x54
    009E E090      LDI	R25,0
    009F 0FE8      ADD	R30,R24
    00A0 1FF9      ADC	R31,R25
    00A1 91E4      LPM	R30,0(Z)
    00A2 BBEB      OUT	0x1B,R30
    00A3 E5EE      LDI	R30,0x5E
    00A4 E0F0      LDI	R31,0
    00A5 91E4      LPM	R30,0(Z)
    00A6 BBE5      OUT	0x15,R30
    00A7 C043      RJMP	0x00EB
(0041)  case 1:PORTA=SEG7[(dis_val/10)%10];PORTC=ACT[1];break;
    00A8 E02A      LDI	R18,0xA
    00A9 E030      LDI	R19,0
    00AA 91000062  LDS	R16,dis_val
    00AC 91100063  LDS	R17,dis_val+1
    00AE 940E01B2  CALL	div16u
    00B0 E02A      LDI	R18,0xA
    00B1 E030      LDI	R19,0
    00B2 940E01B0  CALL	mod16u
    00B4 01F8      MOVW	R30,R16
    00B5 E584      LDI	R24,0x54
    00B6 E090      LDI	R25,0
    00B7 0FE8      ADD	R30,R24
    00B8 1FF9      ADC	R31,R25
    00B9 91E4      LPM	R30,0(Z)
    00BA BBEB      OUT	0x1B,R30
    00BB E5EF      LDI	R30,0x5F
    00BC E0F0      LDI	R31,0
    00BD 91E4      LPM	R30,0(Z)
    00BE BBE5      OUT	0x15,R30
    00BF C02B      RJMP	0x00EB
(0042)  case 2:PORTA=SEG7[(dis_val/100)%10];PORTC=ACT[2];break;
    00C0 E624      LDI	R18,0x64
    00C1 E030      LDI	R19,0
    00C2 91000062  LDS	R16,dis_val
    00C4 91100063  LDS	R17,dis_val+1
    00C6 940E01B2  CALL	div16u
    00C8 E02A      LDI	R18,0xA
    00C9 E030      LDI	R19,0
    00CA 940E01B0  CALL	mod16u
    00CC 01F8      MOVW	R30,R16
    00CD E584      LDI	R24,0x54
    00CE E090      LDI	R25,0
    00CF 0FE8      ADD	R30,R24
    00D0 1FF9      ADC	R31,R25
    00D1 91E4      LPM	R30,0(Z)
    00D2 BBEB      OUT	0x1B,R30
    00D3 E6E0      LDI	R30,0x60
    00D4 E0F0      LDI	R31,0
    00D5 91E4      LPM	R30,0(Z)
    00D6 BBE5      OUT	0x15,R30
    00D7 C013      RJMP	0x00EB
(0043)  case 3:PORTA=SEG7[dis_val/1000];PORTC=ACT[3];break;
    00D8 EE28      LDI	R18,0xE8
    00D9 E033      LDI	R19,3
    00DA 91000062  LDS	R16,dis_val
    00DC 91100063  LDS	R17,dis_val+1
    00DE 940E01B2  CALL	div16u
    00E0 01F8      MOVW	R30,R16
    00E1 E584      LDI	R24,0x54
    00E2 E090      LDI	R25,0
    00E3 0FE8      ADD	R30,R24
    00E4 1FF9      ADC	R31,R25
    00E5 91E4      LPM	R30,0(Z)
    00E6 BBEB      OUT	0x1B,R30
    00E7 E6E1      LDI	R30,0x61
    00E8 E0F0      LDI	R31,0
    00E9 91E4      LPM	R30,0(Z)
    00EA BBE5      OUT	0x15,R30
(0044)  default:break;
    00EB 940E027E  CALL	pop_gset1
    00ED 9029      LD	R2,Y+
    00EE BE2F      OUT	0x3F,R2
    00EF 91F9      LD	R31,Y+
    00F0 91E9      LD	R30,Y+
    00F1 9199      LD	R25,Y+
    00F2 9189      LD	R24,Y+
    00F3 9139      LD	R19,Y+
    00F4 9129      LD	R18,Y+
    00F5 9119      LD	R17,Y+
    00F6 9109      LD	R16,Y+
    00F7 9029      LD	R2,Y+
    00F8 9518      RETI
(0045)  }
(0046) }
(0047) /************************************/
(0048) void timer1_init(void) 	
(0049) {
(0050)  TCNT1H = 0xE7; 	
_timer1_init:
    00F9 EE87      LDI	R24,0xE7
    00FA BD8D      OUT	0x2D,R24
(0051)  TCNT1L = 0x96;
    00FB E986      LDI	R24,0x96
    00FC BD8C      OUT	0x2C,R24
(0052)  TCCR1B = 0x03; 	
    00FD E083      LDI	R24,3
    00FE BD8E      OUT	0x2E,R24
    00FF 9508      RET
_timer1_ovf_isr:
    0100 938A      ST	R24,-Y
    0101 B78F      IN	R24,0x3F
    0102 938A      ST	R24,-Y
(0053) }
(0054) /***************************************************/
(0055) #pragma interrupt_handler timer1_ovf_isr:9 
(0056) void timer1_ovf_isr(void)
(0057) {
(0058)  TCNT1H = 0xE7; 		
    0103 EE87      LDI	R24,0xE7
    0104 BD8D      OUT	0x2D,R24
(0059)  TCNT1L = 0x96; 
    0105 E986      LDI	R24,0x96
    0106 BD8C      OUT	0x2C,R24
    0107 9189      LD	R24,Y+
    0108 BF8F      OUT	0x3F,R24
    0109 9189      LD	R24,Y+
    010A 9518      RETI
(0060)  }
(0061) /****************************************************/
(0062) void adc_init(void) 
(0063) {
(0064)  ADMUX = 0x07; 
_adc_init:
    010B E087      LDI	R24,7
    010C B987      OUT	0x07,R24
(0065)  ACSR  = 0x80; 
    010D E880      LDI	R24,0x80
    010E B988      OUT	0x08,R24
(0066)  ADCSR = 0xE9; 
    010F EE89      LDI	R24,0xE9
    0110 B986      OUT	0x06,R24
    0111 9508      RET
_adc_isr:
    0112 922A      ST	R2,-Y
    0113 923A      ST	R3,-Y
    0114 924A      ST	R4,-Y
    0115 925A      ST	R5,-Y
    0116 938A      ST	R24,-Y
    0117 B62F      IN	R2,0x3F
    0118 922A      ST	R2,-Y
(0067) }
(0068) /****************************************************/
(0069) #pragma interrupt_handler adc_isr:15 
(0070) void adc_isr(void)
(0071) {
(0072)  //conversion complete, read value (int) using...
(0073)   value=ADCL;            
    0119 B024      IN	R2,0x04
    011A 2433      CLR	R3
    011B 92300065  STS	value+1,R3
    011D 92200064  STS	value,R2
(0074)   value|=(int)ADCH << 8; 
    011F B025      IN	R2,0x05
    0120 2433      CLR	R3
    0121 2C32      MOV	R3,R2
    0122 2422      CLR	R2
    0123 90400064  LDS	R4,value
    0125 90500065  LDS	R5,value+1
    0127 2842      OR	R4,R2
    0128 2853      OR	R5,R3
    0129 92500065  STS	value+1,R5
    012B 92400064  STS	value,R4
(0075)   flag=1;	
    012D E081      LDI	R24,1
    012E 93800060  STS	flag,R24
    0130 9029      LD	R2,Y+
    0131 BE2F      OUT	0x3F,R2
    0132 9189      LD	R24,Y+
    0133 9059      LD	R5,Y+
    0134 9049      LD	R4,Y+
    0135 9039      LD	R3,Y+
    0136 9029      LD	R2,Y+
    0137 9518      RETI
(0076) }
(0077) /***************************************/
(0078) void init_devices(void) 
(0079) {
(0080)  port_init();	
_init_devices:
    0138 DF19      RCALL	_port_init
(0081)  timer0_init();	
    0139 DF23      RCALL	_timer0_init
(0082)  timer1_init();	
    013A DFBE      RCALL	_timer1_init
(0083)  adc_init();	
    013B DFCF      RCALL	_adc_init
(0084)  TIMSK = 0x05; 
    013C E085      LDI	R24,5
    013D BF89      OUT	0x39,R24
(0085)  SREG=0x80; 
    013E E880      LDI	R24,0x80
    013F BF8F      OUT	0x3F,R24
    0140 9508      RET
_delay:
  i                    --> R20
  j                    --> R22
  k                    --> R16
    0141 940E0279  CALL	push_gset2
(0086) }
(0087) /***************************************/
(0088) void delay(uint k) 
(0089) {
(0090) uint i,j;
(0091) 	 for(i=0;i<k;i++)
    0143 2744      CLR	R20
    0144 2755      CLR	R21
    0145 C00B      RJMP	0x0151
(0092) 	 {	 
(0093) 	 for(j=0;j<140;j++); 
    0146 2766      CLR	R22
    0147 2777      CLR	R23
    0148 C002      RJMP	0x014B
    0149 5F6F      SUBI	R22,0xFF
    014A 4F7F      SBCI	R23,0xFF
    014B 386C      CPI	R22,0x8C
    014C E0E0      LDI	R30,0
    014D 077E      CPC	R23,R30
    014E F3D0      BCS	0x0149
    014F 5F4F      SUBI	R20,0xFF
    0150 4F5F      SBCI	R21,0xFF
    0151 1740      CP	R20,R16
    0152 0751      CPC	R21,R17
    0153 F390      BCS	0x0146
    0154 940E026D  CALL	pop_gset2
    0156 9508      RET
_conv:
  y                    --> R10
  x                    --> Y+0
  i                    --> R10
    0157 940E0277  CALL	push_gset3
    0159 0158      MOVW	R10,R16
    015A 9724      SBIW	R28,4
(0094) 	 }
(0095) }
(0096) /******************************************/
(0097) uint conv(uint i)