📄 ac9-3.lst
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__text_start:
__start:
0031 E5CF LDI R28,0x5F
0032 E0D4 LDI R29,4
0033 BFCD OUT 0x3D,R28
0034 BFDE OUT 0x3E,R29
0035 51C0 SUBI R28,0x10
0036 40D0 SBCI R29,0
0037 EA0A LDI R16,0xAA
0038 8308 STD Y+0,R16
0039 2400 CLR R0
003A E6E0 LDI R30,0x60
003B E0F0 LDI R31,0
003C E010 LDI R17,0
003D 36E4 CPI R30,0x64
003E 07F1 CPC R31,R17
003F F011 BEQ 0x0042
0040 9201 ST R0,Z+
0041 CFFB RJMP 0x003D
0042 8300 STD Z+0,R16
0043 E6E2 LDI R30,0x62
0044 E0F0 LDI R31,0
0045 E6A0 LDI R26,0x60
0046 E0B0 LDI R27,0
0047 E010 LDI R17,0
0048 36E2 CPI R30,0x62
0049 07F1 CPC R31,R17
004A F021 BEQ 0x004F
004B 95C8 LPM
004C 9631 ADIW R30,1
004D 920D ST R0,X+
004E CFF9 RJMP 0x0048
004F 940E0168 CALL _main
_exit:
0051 CFFF RJMP _exit
FILE: d:\MYDOCU~1\ac9-3\ac9-3.c
(0001) #include <iom16v.h>
(0002) #define uchar unsigned char
(0003) #define uint unsigned int
(0004) uchar const SEG7[10]={0x3f,0x06,0x5b,
(0005) 0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f};
(0006) uchar const ACT[4]={0xfe,0xfd,0xfb,0xf7};
(0007) uint cnt;
(0008) uchar start_flag;
(0009) uchar i;
(0010) #define S1 (PIND&0x10)
(0011)
(0012) void port_init(void)
(0013) {
(0014) PORTA = 0x00;
_port_init:
0052 2422 CLR R2
0053 BA2B OUT 0x1B,R2
(0015) DDRA = 0xFF;
0054 EF8F LDI R24,0xFF
0055 BB8A OUT 0x1A,R24
(0016) PORTC = 0xFF;
0056 BB85 OUT 0x15,R24
(0017) DDRC = 0xFF;
0057 BB84 OUT 0x14,R24
(0018) PORTD = 0xFF;
0058 BB82 OUT 0x12,R24
(0019) DDRD = 0x00;
0059 BA21 OUT 0x11,R2
005A 9508 RET
(0020) }
(0021)
(0022) void timer0_init(void)
(0023) {
(0024) TCNT0 = 0x83;
_timer0_init:
005B E883 LDI R24,0x83
005C BF82 OUT 0x32,R24
(0025) TCCR0 = 0x03;
005D E083 LDI R24,3
005E BF83 OUT 0x33,R24
005F 9508 RET
_timer0_ovf_isr:
0060 922A ST R2,-Y
0061 930A ST R16,-Y
0062 931A ST R17,-Y
0063 932A ST R18,-Y
0064 933A ST R19,-Y
0065 938A ST R24,-Y
0066 939A ST R25,-Y
0067 93EA ST R30,-Y
0068 93FA ST R31,-Y
0069 B62F IN R2,0x3F
006A 922A ST R2,-Y
006B 940E019D CALL push_gset1
(0026) }
(0027)
(0028) #pragma interrupt_handler timer0_ovf_isr:10
(0029) void timer0_ovf_isr(void)
(0030) {
(0031) SREG=0x80;
006D E880 LDI R24,0x80
006E BF8F OUT 0x3F,R24
(0032) TCNT0 = 0x83;
006F E883 LDI R24,0x83
0070 BF82 OUT 0x32,R24
(0033) if(++i>3)i=0;
0071 91800060 LDS R24,i
0073 5F8F SUBI R24,0xFF
0074 2E28 MOV R2,R24
0075 92200060 STS i,R2
0077 E083 LDI R24,3
0078 1582 CP R24,R2
0079 F418 BCC 0x007D
007A 2422 CLR R2
007B 92200060 STS i,R2
(0034) switch(i)
007D 91400060 LDS R20,i
007F 2755 CLR R21
0080 3040 CPI R20,0
0081 0745 CPC R20,R21
0082 F079 BEQ 0x0092
0083 3041 CPI R20,1
0084 E0E0 LDI R30,0
0085 075E CPC R21,R30
0086 F121 BEQ 0x00AB
0087 3042 CPI R20,2
0088 E0E0 LDI R30,0
0089 075E CPC R21,R30
008A F409 BNE 0x008C
008B C03C RJMP 0x00C8
008C 3043 CPI R20,3
008D E0E0 LDI R30,0
008E 075E CPC R21,R30
008F F409 BNE 0x0091
0090 C055 RJMP 0x00E6
0091 C06C RJMP 0x00FE
(0035) {
(0036) case 0: PORTA=SEG7[cnt%10]; PORTC=ACT[i];break;
0092 E02A LDI R18,0xA
0093 E030 LDI R19,0
0094 91000062 LDS R16,cnt
0096 91100063 LDS R17,cnt+1
0098 940E0179 CALL mod16u
009A 01F8 MOVW R30,R16
009B E584 LDI R24,0x54
009C E090 LDI R25,0
009D 0FE8 ADD R30,R24
009E 1FF9 ADC R31,R25
009F 91E4 LPM R30,0(Z)
00A0 BBEB OUT 0x1B,R30
00A1 E58E LDI R24,0x5E
00A2 E090 LDI R25,0
00A3 91E00060 LDS R30,i
00A5 27FF CLR R31
00A6 0FE8 ADD R30,R24
00A7 1FF9 ADC R31,R25
00A8 91E4 LPM R30,0(Z)
00A9 BBE5 OUT 0x15,R30
00AA C053 RJMP 0x00FE
(0037) case 1: PORTA=SEG7[(cnt/10)%10]; PORTC=ACT[i];break;
00AB E02A LDI R18,0xA
00AC E030 LDI R19,0
00AD 91000062 LDS R16,cnt
00AF 91100063 LDS R17,cnt+1
00B1 940E017B CALL div16u
00B3 E02A LDI R18,0xA
00B4 E030 LDI R19,0
00B5 940E0179 CALL mod16u
00B7 01F8 MOVW R30,R16
00B8 E584 LDI R24,0x54
00B9 E090 LDI R25,0
00BA 0FE8 ADD R30,R24
00BB 1FF9 ADC R31,R25
00BC 91E4 LPM R30,0(Z)
00BD BBEB OUT 0x1B,R30
00BE E58E LDI R24,0x5E
00BF E090 LDI R25,0
00C0 91E00060 LDS R30,i
00C2 27FF CLR R31
00C3 0FE8 ADD R30,R24
00C4 1FF9 ADC R31,R25
00C5 91E4 LPM R30,0(Z)
00C6 BBE5 OUT 0x15,R30
00C7 C036 RJMP 0x00FE
(0038) case 2: PORTA=SEG7[(cnt/100)%10]|0x80; PORTC=ACT[i];break;
00C8 E624 LDI R18,0x64
00C9 E030 LDI R19,0
00CA 91000062 LDS R16,cnt
00CC 91100063 LDS R17,cnt+1
00CE 940E017B CALL div16u
00D0 E02A LDI R18,0xA
00D1 E030 LDI R19,0
00D2 940E0179 CALL mod16u
00D4 01F8 MOVW R30,R16
00D5 E584 LDI R24,0x54
00D6 E090 LDI R25,0
00D7 0FE8 ADD R30,R24
00D8 1FF9 ADC R31,R25
00D9 91E4 LPM R30,0(Z)
00DA 68E0 ORI R30,0x80
00DB BBEB OUT 0x1B,R30
00DC E58E LDI R24,0x5E
00DD E090 LDI R25,0
00DE 91E00060 LDS R30,i
00E0 27FF CLR R31
00E1 0FE8 ADD R30,R24
00E2 1FF9 ADC R31,R25
00E3 91E4 LPM R30,0(Z)
00E4 BBE5 OUT 0x15,R30
00E5 C018 RJMP 0x00FE
(0039) case 3: PORTA=SEG7[cnt/1000]; PORTC=ACT[i];break;
00E6 EE28 LDI R18,0xE8
00E7 E033 LDI R19,3
00E8 91000062 LDS R16,cnt
00EA 91100063 LDS R17,cnt+1
00EC 940E017B CALL div16u
00EE 01F8 MOVW R30,R16
00EF E584 LDI R24,0x54
00F0 E090 LDI R25,0
00F1 0FE8 ADD R30,R24
00F2 1FF9 ADC R31,R25
00F3 91E4 LPM R30,0(Z)
00F4 BBEB OUT 0x1B,R30
00F5 E58E LDI R24,0x5E
00F6 E090 LDI R25,0
00F7 91E00060 LDS R30,i
00F9 27FF CLR R31
00FA 0FE8 ADD R30,R24
00FB 1FF9 ADC R31,R25
00FC 91E4 LPM R30,0(Z)
00FD BBE5 OUT 0x15,R30
(0040) default:break;
00FE 940E01A0 CALL pop_gset1
0100 9029 LD R2,Y+
0101 BE2F OUT 0x3F,R2
0102 91F9 LD R31,Y+
0103 91E9 LD R30,Y+
0104 9199 LD R25,Y+
0105 9189 LD R24,Y+
0106 9139 LD R19,Y+
0107 9129 LD R18,Y+
0108 9119 LD R17,Y+
0109 9109 LD R16,Y+
010A 9029 LD R2,Y+
010B 9518 RETI
(0041) }
(0042) }
(0043)
(0044) void timer1_init(void)
(0045) {
(0046) TCNT1H = 0xD8;
_timer1_init:
010C ED88 LDI R24,0xD8
010D BD8D OUT 0x2D,R24
(0047) TCNT1L = 0xF0;
010E EF80 LDI R24,0xF0
010F BD8C OUT 0x2C,R24
0110 9508 RET
_timer1_ovf_isr:
0111 922A ST R2,-Y
0112 923A ST R3,-Y
0113 938A ST R24,-Y
0114 939A ST R25,-Y
0115 B62F IN R2,0x3F
0116 922A ST R2,-Y
(0048) }
(0049)
(0050) #pragma interrupt_handler timer1_ovf_isr:9
(0051) void timer1_ovf_isr(void)
(0052) {
(0053) TCNT1H = 0xD8;
0117 ED88 LDI R24,0xD8
0118 BD8D OUT 0x2D,R24
(0054) TCNT1L = 0xF0;
0119 EF80 LDI R24,0xF0
011A BD8C OUT 0x2C,R24
(0055) if(++cnt>9999)cnt=0;
011B 91800062 LDS R24,cnt
011D 91900063 LDS R25,cnt+1
011F 9601 ADIW R24,1
0120 011C MOVW R2,R24
0121 92300063 STS cnt+1,R3
0123 92200062 STS cnt,R2
0125 E08F LDI R24,0xF
0126 E297 LDI R25,0x27
0127 1582 CP R24,R2
0128 0593 CPC R25,R3
0129 F430 BCC 0x0130
012A 2422 CLR R2
012B 2433 CLR R3
012C 92300063 STS cnt+1,R3
012E 92200062 STS cnt,R2
0130 9029 LD R2,Y+
0131 BE2F OUT 0x3F,R2
0132 9199 LD R25,Y+
0133 9189 LD R24,Y+
0134 9039 LD R3,Y+
0135 9029 LD R2,Y+
0136 9518 RETI
_int0_isr:
0137 922A ST R2,-Y
0138 938A ST R24,-Y
0139 939A ST R25,-Y
013A 93EA ST R30,-Y
013B B62F IN R2,0x3F
013C 922A ST R2,-Y
(0056) }
(0057)
(0058) #pragma interrupt_handler int0_isr:2
(0059) void int0_isr(void)
(0060) {
(0061) if(cnt<10)start_flag=0xff;
013D 91800062 LDS R24,cnt
013F 91900063 LDS R25,cnt+1
0141 308A CPI R24,0xA
0142 E0E0 LDI R30,0
0143 079E CPC R25,R30
0144 F420 BCC 0x0149
0145 EF8F LDI R24,0xFF
0146 93800061 STS start_flag,R24
0148 C003 RJMP 0x014C
(0062) else start_flag=0x00;
0149 2422 CLR R2
014A 92200061 STS start_flag,R2
014C 9029 LD R2,Y+
014D BE2F OUT 0x3F,R2
014E 91E9 LD R30,Y+
014F 9199 LD R25,Y+
0150 9189 LD R24,Y+
0151 9029 LD R2,Y+
0152 9518 RETI
(0063) }
(0064)
(0065) void init_devices(void)
(0066) {
(0067) port_init();
_init_devices:
0153 DEFE RCALL _port_init
(0068) timer0_init();
0154 DF06 RCALL _timer0_init
(0069) timer1_init();
0155 DFB6 RCALL _timer1_init
(0070) MCUCR = 0x02;
0156 E082 LDI R24,2
0157 BF85 OUT 0x35,R24
(0071) GICR = 0x40;
0158 E480 LDI R24,0x40
0159 BF8B OUT 0x3B,R24
(0072) TIMSK = 0x05;
015A E085 LDI R24,5
015B BF89 OUT 0x39,R24
(0073) SREG=0x80;
015C E880 LDI R24,0x80
015D BF8F OUT 0x3F,R24
015E 9508 RET
(0074) }
(0075)
(0076) void scan_s1(void)
(0077) {
(0078) if(S1==0)cnt=0;
_scan_s1:
015F 9984 SBIC 0x10,4
0160 C006 RJMP 0x0167
0161 2422 CLR R2
0162 2433 CLR R3
0163 92300063 STS cnt+1,R3
0165 92200062 STS cnt,R2
0167 9508 RET
(0079) }
(0080)
(0081) void main(void)
(0082) {
(0083) init_devices();
_main:
0168 DFEA RCALL _init_devices
0169 C00D RJMP 0x0177
(0084) while(1)
(0085) {
(0086) if(start_flag==0xff)TCCR1B = 0x02;
016A 91800061 LDS R24,start_flag
016C 3F8F CPI R24,0xFF
016D F411 BNE 0x0170
016E E082 LDI R24,2
016F BD8E OUT 0x2E,R24
(0087) if(start_flag==0x00){TCCR1B = 0x00;scan_s1();}
FILE: <library>
0170 90200061 LDS R2,start_flag
0172 2022 TST R2
0173 F419 BNE 0x0177
0174 2422 CLR R2
0175 BC2E OUT 0x2E,R2
0176 DFE8 RCALL _scan_s1
0177 CFF2 RJMP 0x016A
0178 9508 RET
mod16u:
0179 9468 BSET 6
017A C001 RJMP xdiv16u
div16u:
017B 94E8 BCLR 6
xdiv16u:
017C 92EA ST R14,-Y
017D 92FA ST R15,-Y
017E 938A ST R24,-Y
017F 24EE CLR R14
0180 24FF CLR R15
0181 E180 LDI R24,0x10
0182 0F00 LSL R16
0183 1F11 ROL R17
0184 1CEE ROL R14
0185 1CFF ROL R15
0186 16E2 CP R14,R18
0187 06F3 CPC R15,R19
0188 F018 BCS 0x018C
0189 1AE2 SUB R14,R18
018A 0AF3 SBC R15,R19
018B 9503 INC R16
018C 958A DEC R24
018D F7A1 BNE 0x0182
018E F416 BRTC 0x0191
018F 2D0E MOV R16,R14
0190 2D1F MOV R17,R15
0191 9189 LD R24,Y+
0192 90F9 LD R15,Y+
0193 90E9 LD R14,Y+
0194 9508 RET
push_gset5:
0195 92FA ST R15,-Y
0196 92EA ST R14,-Y
push_gset4:
0197 92DA ST R13,-Y
0198 92CA ST R12,-Y
push_gset3:
0199 92BA ST R11,-Y
019A 92AA ST R10,-Y
push_gset2:
019B 937A ST R23,-Y
019C 936A ST R22,-Y
push_gset1:
019D 935A ST R21,-Y
019E 934A ST R20,-Y
019F 9508 RET
pop_gset1:
01A0 E0E1 LDI R30,1
pop:
01A1 9149 LD R20,Y+
01A2 9159 LD R21,Y+
01A3 FDE0 SBRC R30,0
01A4 9508 RET
01A5 9169 LD R22,Y+
01A6 9179 LD R23,Y+
01A7 FDE1 SBRC R30,1
01A8 9508 RET
01A9 90A9 LD R10,Y+
01AA 90B9 LD R11,Y+
01AB FDE2 SBRC R30,2
01AC 9508 RET
01AD 90C9 LD R12,Y+
01AE 90D9 LD R13,Y+
01AF FDE3 SBRC R30,3
01B0 9508 RET
01B1 90E9 LD R14,Y+
01B2 90F9 LD R15,Y+
01B3 9508 RET
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