📄 softuart.lst
字号:
519 3 if (SW_RX1) // If SW_RX=1,
520 3 RXSHIFT1 |= 0x80; // shift '1' into RXSHIFT msb
521 3 PCA_TEMP1 = (PCA0CPH3 << 8); // Read module 3 contents into
522 3 PCA_TEMP1 |= PCA0CPL3; // PCA_TEMP.
523 3 PCA_TEMP1 += UART3_TIMER; // Add 1 bit time to PCA_TEMP
524 3 PCA0CPL3 = PCA_TEMP1; // Restore PCA0CPL0 and PCA0CPH0
525 3 PCA0CPH3 = (PCA_TEMP1 >> 8); // with the updated value
526 3 SURXST1++; // Update RX state variable.
527 3 break;
528 3 case 9:
529 3 RDR1 = RXSHIFT1; // Move received data to receive register.
530 3 SRI1 = 1; // Set receive complete indicator.
531 3 PCA0CPM3 = 0x11; // Switch module 0 to negative capture
532 3 // mode; interrupt enabled for START detection.
533 3 SURXST1 = 0; // Reset RX state variable.
534 3 if (SES1){ // If user-level interrupt support enabled
535 4 EIE2 |= 0x20; // Enable IE7.
536 4 P3IF |= 0x80; // Trigger IE7.
537 4 }
538 3 break;
539 3 }
540 2 }
541 1 else if (CCF2){
542 2 CCF2 = 0; // Clear interrupt flag
543 2 switch (SUTXST1){
544 3 case 0:
545 3 SW_TX1 = 0; // Drop TX pin as START bit.
546 3 PCA_TEMP1 = PCA0L; // Read PCA counter value into
547 3 PCA_TEMP1 |= (PCA0H << 8); // PCA_TEMP.
548 3 PCA_TEMP1 += UART3_TIMER; // Add 1 bit time.
549 3 PCA0CPL2 = PCA_TEMP1; // Store updated match value into
550 3 PCA0CPH2 = (PCA_TEMP1 >> 8); // module 1 capture/compare registers.
551 3 PCA0CPM2 |= 0x48; // Enable module 1 software timer.
C51 COMPILER V6.23a SOFTUART 04/15/2002 18:18:05 PAGE 10
552 3 SUTXST1++; // Update TX state variable.
553 3 break;
554 3 case 1:
555 3 case 2:
556 3 case 3:
557 3 case 4:
558 3 case 5:
559 3 case 6:
560 3 case 7:
561 3 case 8:
562 3 case 9:
563 3 SW_TX1 = (TDR1 & 0x01); // Output LSB of TDR onto SW_TX pin.
564 3 TDR1 >>= 1; // Shift TDR right 1 bit.
565 3 TDR1 |= 0x80; // Shift '1' into MSB of TDR for
566 3 // STOP bit in State 9.
567 3 PCA_TEMP1 = (PCA0CPH2 << 8); // Read module 1 contents into
568 3 PCA_TEMP1 |= PCA0CPL2; // PCA_TEMP.
569 3 PCA_TEMP1 += UART3_TIMER; // Add 1 bit time to PCA_TEMP
570 3 PCA0CPL2 = PCA_TEMP1; // Restore PCA0CPL1 and PCA0CPH1
571 3 PCA0CPH2 = (PCA_TEMP1 >> 8); // with the updated value
572 3 SUTXST1++; // Update TX state variable.
573 3 break;
574 3 case 10:
575 3 STI1 = 1; // Indicate TX complete.
576 3 SUTXST1 = 0; // Reset TX state.
577 3 SW_TX1 = 1; // SW_TX should remain high.
578 3 PCA0CPM2 = 0x01; // Disable module 1 software timer; leave
579 3 // interrupt enabled for next transmit.
580 3 if (SES1){ // If user-level interrupt support enabled:
581 4 EIE2 |= 0x20; // Enable IE7.
582 4 P3IF |= 0x80; // Trigger IE7.
583 4 }
584 3 STXBSY1 = 0; // SW_UART TX free.
585 3 break;
586 3 }
587 2 }
588 1
589 1
590 1 }
591
592 //----------------------------------------------------------------------------------------
593 // USER_ISR: User SW_UART Interrupt Service Routine (IE7 ISR)
594 // If interrupt-mode test code is enabled, this ISR
595 // transmits 15 characters and receives 15 characters. This routine is triggered each
596 // time a SW_UART transmit or receive is completed.
597 // - Checks receive complete indicator, and services.
598 // - Checks transmit complete indicator, and services.
599 // - Checks for transmits or receives that completed during the ISR; if so, triggers the
600 // interrupt again.
601 //
602
603 void USER_ISR(void) interrupt 19 { // IE7 Interrupt Service Routine
604 1 P3IF &= ~(0x80); // Clear IE7 interrupt flag
605 1 if (SRI0)
606 1 {
607 2 SRI0 = 0;
608 2 CommRecBuffer2[CommRecBufferTail2]=RDR0;
609 2 CommRecBufferTail2++;
610 2 if (CommRecBufferTail2==DB_RECMAXSIZE2)
611 2 {
612 3 CommRecBufferTail2=0;
613 3 }
C51 COMPILER V6.23a SOFTUART 04/15/2002 18:18:05 PAGE 11
614 2 FlagRecComm2=1;
615 2 }
616 1 else
617 1 if (STI0)
618 1 {
619 2 STI0 = 0;
620 2 CommSendBufferHead2++;
621 2 if (CommSendBufferHead2==DB_SENDMAXSIZE2)
622 2 {
623 3 CommSendBufferHead2=0;
624 3 }
625 2 if (CommSendBufferHead2!=CommSendBufferTail2)
626 2 {
627 3 STXBSY0 = 1;
628 3 TDR0=CommSendBuffer2[CommSendBufferHead2];
629 3 CCF0 = 1;
630 3 SendItComm2=0;
631 3 }
632 2 else
633 2 {
634 3 SendItComm2=1;
635 3 }
636 2 }
637 1 if (SRI1)
638 1 {
639 2 SRI1 = 0;
640 2 CommRecBuffer3[CommRecBufferTail3]=RDR1;
641 2 CommRecBufferTail3++;
642 2 if (CommRecBufferTail3==DB_RECMAXSIZE3)
643 2 {
644 3 CommRecBufferTail3=0;
645 3 }
646 2 FlagRecComm3=1;
647 2 }
648 1 else
649 1 if (STI1)
650 1 {
651 2 STI1 = 0;
652 2 CommSendBufferHead3++;
653 2 if (CommSendBufferHead3==DB_SENDMAXSIZE3)
654 2 {
655 3 CommSendBufferHead3=0;
656 3 }
657 2 if (CommSendBufferHead3!=CommSendBufferTail3)
658 2 {
659 3 STXBSY1 = 1;
660 3 TDR1=CommSendBuffer2[CommSendBufferHead2];
661 3 CCF2 = 1;
662 3 SendItComm3=0;
663 3 }
664 2 else
665 2 {
666 3 SendItComm3=1;
667 3 }
668 2 }
669 1 if (STI0|SRI0) // If SRI or STI is set, re-trigger
670 1 P3IF |= 0x80; // interrupt to service.
671 1 if (STI1|SRI1) // If SRI or STI is set, re-trigger
672 1 P3IF |= 0x80; // interrupt to service.
673 1
674 1 }
675
C51 COMPILER V6.23a SOFTUART 04/15/2002 18:18:05 PAGE 12
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 1155 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = 960 ----
PDATA SIZE = ---- ----
DATA SIZE = 18 8
IDATA SIZE = ---- ----
BIT SIZE = 14 ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -