📄 softuart.lst
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344 //
345 void PCA_ISR(void) interrupt 9
346 {
347 1 static char SUTXST0 = 0; // SW_UART TX state variable
348 1 static char SURXST0 = 0; // SW_UART RX state variable
349 1 static unsigned char RXSHIFT0; // SW_UART RX Shift Register
350 1
351 1 unsigned int PCA_TEMP0; // Temporary storage variable for manipulating PCA module high & low bytes.
352 1 // Check receive interrupt flag first; service if CCF0 is set.
353 1
354 1 static char SUTXST1 = 0; // SW_UART TX state variable
355 1 static char SURXST1 = 0; // SW_UART RX state variable
356 1 static unsigned char RXSHIFT1; // SW_UART RX Shift Register
357 1
358 1 unsigned int PCA_TEMP1; // Temporary storage variable for manipulating PCA module high & low bytes.
359 1 // Check receive interrupt flag first; service if CCF0 is set.
360 1
361 1
362 1 if (CCF1){
363 2 CCF1 = 0; // Clear interrupt flag.
364 2 switch (SURXST0){
365 3 // State 0: START bit received.
C51 COMPILER V6.23a SOFTUART 04/15/2002 18:18:05 PAGE 7
366 3 // In this state, a negative edge on SW_TX has caused the interrupt,
367 3 // meaning a START has been detected and the PCA0CP0 registers have
368 3 // captured the value of PCA0.
369 3 // - Check for receive enable and good START bit
370 3 // - Switch PCA module 0 to software timer mode
371 3 // - Add 3/2 bit time to module 0 capture registers to sample LSB.
372 3 // - Increment RX state variable.
373 3 case 0:
374 3 if (SREN0 & ~SW_RX0){ // Check for receive enable and a good START bit.
375 4
376 4 PCA_TEMP0 = (PCA0CPH1 << 8); // Read module 0 contents into
377 4 PCA_TEMP0 |= PCA0CPL1; // PCA_TEMP.
378 4 PCA_TEMP0 += UART2_STARTTIME;// Add 3/2 bit times to PCA_TEMP
379 4 PCA0CPL1 = PCA_TEMP0; // Restore PCA0CPL0 and PCA0CPH0
380 4 PCA0CPH1 = (PCA_TEMP0 >> 8); // with the updated value
381 4 PCA0CPM1 = 0x49; // Change module 0 to software timer mode, interrupts enabled.
382 4 SURXST0++; // Update RX state variable.
383 4 }
384 3 break;
385 3 // States 1-8: Bit Received
386 3 // - Sample SW_RX pin
387 3 // - Shift new bit into RXSHIFT
388 3 // - Add 1 bit time to module 0 capture registers
389 3 // - Increment RX state variable
390 3 case 1:
391 3 case 2:
392 3 case 3:
393 3 case 4:
394 3 case 5:
395 3 case 6:
396 3 case 7:
397 3 case 8:
398 3 RXSHIFT0 = RXSHIFT0 >> 1; // Shift right 1 bit
399 3 if (SW_RX0) // If SW_RX=1,
400 3 RXSHIFT0 |= 0x80; // shift '1' into RXSHIFT msb
401 3 PCA_TEMP0 = (PCA0CPH1 << 8); // Read module 0 contents into
402 3 PCA_TEMP0 |= PCA0CPL1; // PCA_TEMP.
403 3 PCA_TEMP0 += UART2_TIMER; // Add 1 bit time to PCA_TEMP
404 3 PCA0CPL1 = PCA_TEMP0; // Restore PCA0CPL0 and PCA0CPH0
405 3 PCA0CPH1 = (PCA_TEMP0 >> 8); // with the updated value
406 3 SURXST0++; // Update RX state variable.
407 3 break;
408 3 // State 9: 8-bits received, Capture STOP bit.
409 3 // - Move RXSHIFT into RDR.
410 3 // - Set SRI (indicate receive complete).
411 3 // - Prepare module 0 for next transfer.
412 3 // - Reset RX state variable.
413 3 // - Trigger IE7 if user-level interrupt support is enabled.
414 3 case 9:
415 3 RDR0 = RXSHIFT0; // Move received data to receive register.
416 3 SRI0 = 1; // Set receive complete indicator.
417 3 PCA0CPM1 = 0x11; // Switch module 0 to negative capture
418 3 // mode; interrupt enabled for START detection.
419 3 SURXST0 = 0; // Reset RX state variable.
420 3 if (SES0){ // If user-level interrupt support enabled
421 4 EIE2 |= 0x20; // Enable IE7.
422 4 P3IF |= 0x80; // Trigger IE7.
423 4 }
424 3 break;
425 3 }
426 2 }
427 1 // Check Transmit interrupt; service if CCF1 is set.
C51 COMPILER V6.23a SOFTUART 04/15/2002 18:18:05 PAGE 8
428 1 else if (CCF0){
429 2 CCF0 = 0; // Clear interrupt flag
430 2 switch (SUTXST0){
431 3 // State 0: Transmit Initiated.
432 3 // Here, the user has loaded a byte to transmit into TDR, and set the
433 3 // module 1 interrupt to initiate the transfer.
434 3 // - Transmit START bit (drop SW_TX)
435 3 // - Read PCA0, add one bit time, & store in module 1 capture registers
436 3 // for first bit.
437 3 // - Increment TX state variable.
438 3 case 0:
439 3 SW_TX0 = 0; // Drop TX pin as START bit.
440 3 PCA_TEMP0 = PCA0L; // Read PCA counter value into
441 3 PCA_TEMP0 |= (PCA0H << 8); // PCA_TEMP.
442 3 PCA_TEMP0 += UART2_TIMER; // Add 1 bit time.
443 3 PCA0CPL0 = PCA_TEMP0; // Store updated match value into
444 3 PCA0CPH0 = (PCA_TEMP0 >> 8); // module 1 capture/compare registers.
445 3 PCA0CPM0 |= 0x48; // Enable module 1 software timer.
446 3 SUTXST0++; // Update TX state variable.
447 3 break;
448 3 // States 1-9: Transmit Bit.
449 3 // - Output LSB of TDR onto TX
450 3 // - Shift TDR 1 bit right.
451 3 // - Shift a '1' into MSB of TDR for STOP bit in State 9.
452 3 // - Add 1 bit time to module 1 capture register
453 3 case 1:
454 3 case 2:
455 3 case 3:
456 3 case 4:
457 3 case 5:
458 3 case 6:
459 3 case 7:
460 3 case 8:
461 3 case 9:
462 3 SW_TX0 = (TDR0 & 0x01); // Output LSB of TDR onto SW_TX pin.
463 3 TDR0 >>= 1; // Shift TDR right 1 bit.
464 3 TDR0 |= 0x80; // Shift '1' into MSB of TDR for
465 3 // STOP bit in State 9.
466 3 PCA_TEMP0 = (PCA0CPH0 << 8); // Read module 1 contents into
467 3 PCA_TEMP0 |= PCA0CPL0; // PCA_TEMP.
468 3 PCA_TEMP0 += UART2_TIMER; // Add 1 bit time to PCA_TEMP
469 3 PCA0CPL0 = PCA_TEMP0; // Restore PCA0CPL1 and PCA0CPH1
470 3 PCA0CPH0 = (PCA_TEMP0 >> 8); // with the updated value
471 3 SUTXST0++; // Update TX state variable.
472 3 break;
473 3 // State 10: Last bit has been transmitted. Transmit STOP bit
474 3 // and end transfer.
475 3 // - Transmit STOP bit
476 3 // - Set TX Complete indicator, clear Busy flag
477 3 // - Reset TX state
478 3 // - Prepare module 1 for next transfer.
479 3 // - Trigger IE7 interrupt if user-level interrupts enabled.
480 3 case 10:
481 3 STI0 = 1; // Indicate TX complete.
482 3 SUTXST0 = 0; // Reset TX state.
483 3 SW_TX0 = 1; // SW_TX should remain high.
484 3 PCA0CPM0 = 0x01; // Disable module 1 software timer; leave
485 3 // interrupt enabled for next transmit.
486 3 if (SES0){ // If user-level interrupt support enabled:
487 4 EIE2 |= 0x20; // Enable IE7.
488 4 P3IF |= 0x80; // Trigger IE7.
489 4 }
C51 COMPILER V6.23a SOFTUART 04/15/2002 18:18:05 PAGE 9
490 3 STXBSY0 = 0; // SW_UART TX free.
491 3 break;
492 3 }
493 2 }
494 1 //第二个串行口
495 1 if (CCF3){
496 2 CCF3 = 0; // Clear interrupt flag.
497 2 switch (SURXST1){
498 3 case 0:
499 3 if (SREN1 & ~SW_RX1){ // Check for receive enable and a good START bit.
500 4
501 4 PCA_TEMP1 = (PCA0CPH3 << 8); // Read module 3 contents into
502 4 PCA_TEMP1 |= PCA0CPL3; // PCA_TEMP.
503 4 PCA_TEMP1 += UART3_STARTTIME;// Add 3/2 bit times to PCA_TEMP
504 4 PCA0CPL3 = PCA_TEMP1; // Restore PCA0CPL0 and PCA0CPH0
505 4 PCA0CPH3 = (PCA_TEMP1 >> 8); // with the updated value
506 4 PCA0CPM3 = 0x49; // Change module 0 to software timer mode, interrupts enabled.
507 4 SURXST1++; // Update RX state variable.
508 4 }
509 3 break;
510 3 case 1:
511 3 case 2:
512 3 case 3:
513 3 case 4:
514 3 case 5:
515 3 case 6:
516 3 case 7:
517 3 case 8:
518 3 RXSHIFT1 = RXSHIFT1 >> 1; // Shift right 1 bit
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