fs7805reg.h

12864液晶显示

/*
*********************************************************************************************************
* File:     FS7805REG.H
* Contents:
*
* $Date:    04/06/06    Kimi    v0.1
*           01/05/07    kevin   v0.2
*           01/08/07    kevin   v0.3
*
* Copyright (c) 2007 Fameg, Inc. All rights reserved
*********************************************************************************************************
*/
#ifndef __FS7805_H__
#define __FS7805_H__

#ifdef ALLOCATE_EXTERN
#define EXTERN
#define _AT_ _at_
#else
#define EXTERN extern
#define _AT_ ;/ ## /
#endif

#define BULK
//#define ISOCHRONOUS
//#define INTERRUPT

#define TRUE  1
#define FALSE 0

typedef unsigned char  BOOLEAN;
typedef bit            BOOL;                     /* Unsigned  1 bit quantity                           */
typedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */
typedef signed   char  INT8S;                    /* Signed    8 bit quantity                           */
typedef unsigned int   INT16U;                   /* Unsigned 16 bit quantity                           */
typedef signed   int   INT16S;                   /* Signed   16 bit quantity                           */
typedef unsigned long  INT32U;                   /* Unsigned 32 bit quantity                           */
typedef signed   long  INT32S;                   /* Signed   32 bit quantity                           */
typedef float          FP32;                     /* Single precision floating point                    */

typedef unsigned char uchar;
typedef unsigned int uint;
typedef unsigned long ulong;


#define STATUS         INT8U
#define byte           INT8U
#define BYTE           INT8U                     /* Define data types for backward compatibility       */
#define WORD           INT16U
#define DWORD          INT32U

#define VendorIDL       0x21
#define VendorIDH       0x51
#define ProductIDL      0x12
#define ProductIDH      0x12
#define NumEP           0x02

#define bmBIT0          0x01
#define bmBIT1          0x02
#define bmBIT2          0x04
#define bmBIT3          0x08
#define bmBIT4          0x10
#define bmBIT5          0x20
#define bmBIT6          0x40
#define bmBIT7          0x80

//Chip Interrupt Enable Register
#define bmDMA_IE            bmBIT0    // DMA Interrupt Event Enable
#define bmTDES_IE           bmBIT1    // TDES Interrupt Event Enable
#define bmRNG_IE            bmBIT2    // RNG Interrupt Event Enable
#define bmSPI_IE            bmBIT3    // SPI Interrupt Event Enable
#define bmSDMI_IE           bmBIT4    // SDMI Interrupt Event Enable
#define bmI2C_IE            bmBIT5    // I2C Interrupt Event Enable
#define bmWDT_IE            bmBIT6    // WDT Interrupt Event Enable

//USB General Control Register
#define bmPLUG              bmBIT1    // Plug USB Device
#define bmSUSPEND           bmBIT2    // Suspend Enable
#define bmHS_DETECTED       bmBIT6    // USB HS Detect Complete
#define bmSPEED             bmBIT7    // USB Device Speed

//USB Endpoint Interrupt Register
#define bmRX0INT            bmBIT0    // EP0 USB RX Event Interrupt
#define bmTX0INT            bmBIT1    // EP0 USB TX Event Interrupt
#define bmIN0INT            bmBIT2    // EP0 USB IN Token Event Interrupt
#define bmEPAINT            bmBIT3    // EPA Interrupt
#define bmEPBINT            bmBIT4    // EPB Interrupt
#define bmEPCINT            bmBIT5    // EPC Interrupt
#define bmEPDINT            bmBIT6    // EPD Interrupt
#define bmSOFINT            bmBIT7    // SOF Interrupt

//USB Endpoint Interrupt Enable Register
#define bmRX0IE             bmBIT0    // EP0 USB RX Event Interrupt Enable
#define bmTX0IE             bmBIT1    // EP0 USB TX Event Interrupt Enable
#define bmIN0IE             bmBIT2    // EP0 USB IN Token Event Interrupt Enable
#define bmEPAIE             bmBIT3    // EPA Interrupt Enable
#define bmEPBIE             bmBIT4    // EPB Interrupt Enable
#define bmEPCIE             bmBIT5    // EPC Interrupt Enable
#define bmEPDIE             bmBIT6    // EPD Interrupt Enable
#define bmSOFIE             bmBIT7    // SOF Interrupt Enable

//USB State Interrupt Enable Register
#define bmUSBRSTIE          bmBIT0    // USB Bus Reset Interrupt Enable
#define bmIDLE3MIE          bmBIT1    // USB Bus Suspend Interrupt Enable
#define bmRESUMEIE          bmBIT2    // USB Bus Resume Interrupt Enable
#define bmLIMITIE           bmBIT7    // Error Count Limit interrupt Enable, high-active

//USB State Interrupt Event Register
#define bmUSBRSTINT         bmBIT0    // USB Bus Reset Event Detected
#define bmIDLE3MSINT        bmBIT1    // USB Bus Suspend 3ms Detected
#define bmRESUMEINT         bmBIT2    // USB Bus Resume Detected
#define bmLIMITINT          bmBIT7    // Error Count interrupt

//USB Endpoint 0 Receive Token Status Register
#define bmEP0_OUT           bmBIT0    // RX OUT packet
#define bmEP0_SETUP         bmBIT1    // RX SETUP packet
#define bmEP0_SETUPOW       bmBIT2    // SETUP Overwrite

//USB Endpoint 0 Receive Command/Status Register
#define bmRX0_EN            bmBIT0    // RX Enable
#define bmRX0_SESTALL       bmBIT1    // Send STALL
#define bmRX0_TOGGLE        bmBIT2    // Data Toggle Bit
#define bmRX0_TOGERR        bmBIT3    // Data Toggle Error
#define bmRX0_ACK           bmBIT4    // ACK Status
#define bmRX0_STALL         bmBIT5    // STALL Status
#define bmRX0_STSERR        bmBIT6    // Error Status
#define bmRX0_CLRTOG        bmBIT7    // Clear EP0 Data Toggle Bit

//USB Endpoint 0 Transmit Command/Status Register
#define bmTX0_EN            bmBIT0    // TX Enable
#define bmTX0_SESTALL       bmBIT1    // Send STALL
#define bmTX0_TOGGLE        bmBIT2    // Data Toggle Bit
#define bmTX0_ACK           bmBIT4    // ACK Status
#define bmTX0_STALL         bmBIT5    // STALL Status
#define bmTX0_STSERR        bmBIT6    // Error Status
#define bmTX0_CLRTOG        bmBIT7    // Clear EP0 Data Toggle Bit

//USB Endpoint A,B,C,D Command/Status Register
#define bmEP_RXTXEN         bmBIT0    // TX Enable, RX Enable
#define bmEP_SESTALL        bmBIT1    // Send STALL
#define bmEP_TOG            bmBIT2    // Data Toggle Bit
#define bmEP_TOGERR         bmBIT3    // Data Toggle error
#define bmEP_ACK            bmBIT4    // ACK Status
#define bmEP_STALL          bmBIT5    // STALL Status
#define bmEP_STSERR         bmBIT6    // Error Status
#define bmEP_CLRTOG         bmBIT7    // Clear Data Toggle Bit

//USB Endpoint A,B,C,D FIFO Control/Status Register
#define bmFIFO_TOG          bmBIT0    // FIFO number for the current transaction
#define bmFIFO0_FULL        bmBIT2    // FIFO0 full status
#define bmFIFO1_FULL        bmBIT3    // FIFO1 full status
#define bmFIFO_TOG_WE       bmBIT4    // Write Enable of FIFO_TOG
#define bmFIFO0_FULL_WE     bmBIT6    // Write Enable of FIFO0_FULL
#define bmFIFO1_FULL_WE     bmBIT7    // Write Enable of FIFO1_FULL

//Endpoint A,B,C,D Ping-Pong FIFO  Count High-Byte Register
#define bmCNT0HWEN          bmBIT3    // Write Enable of EP_CNT0[10:8]
#define bmCNT1HWEN          bmBIT7    // Write Enable of EP_CNT0[10:8]

EXTERN xdata volatile BYTE PRODUCTIDL        _AT_ 0xFE00;  // Product ID Low-Byte Register
EXTERN xdata volatile BYTE PRODUCTIDH        _AT_ 0xFE01;  // Product ID Byte-Byte Register
EXTERN xdata volatile BYTE VERSION           _AT_ 0xFE02;  // Product Version Register
EXTERN xdata volatile BYTE CHIPINT           _AT_ 0xFE03;  // Chip Interrupt Status Register
EXTERN xdata volatile BYTE CHIPINTE          _AT_ 0xFE04;  // Chip Interrupt Mask Register
EXTERN xdata volatile BYTE SYS_CFG           _AT_ 0xFE05;  // System Configuration Register
EXTERN xdata volatile BYTE SYSIO_CFG         _AT_ 0xFE06;  // System IO Configuration Register
EXTERN xdata volatile BYTE P0CFG             _AT_ 0xFE07;  // GPIO P0 Configuration Register
EXTERN xdata volatile BYTE P3CFG             _AT_ 0xFE08;  // GPIO P3 Configuration Register
EXTERN xdata volatile BYTE P0OE              _AT_ 0xFE09;  // GPIO P0 Output Enable Register
EXTERN xdata volatile BYTE P1OE              _AT_ 0xFE0A;  // GPIO P1 Output Enable Register
EXTERN xdata volatile BYTE P2OE              _AT_ 0xFE0B;  // GPIO P2 Output Enable Register
EXTERN xdata volatile BYTE P3OE              _AT_ 0xFE0C;  // GPIO P3 Output Enable Register
EXTERN xdata volatile BYTE P4OE              _AT_ 0xFE0D;  // GPIO P4 Output Enable Register
EXTERN xdata volatile BYTE P5OE              _AT_ 0xFE0E;  // GPIO P5 Output Enable Register
EXTERN xdata volatile BYTE PDCTL             _AT_ 0xFE0F;  // GPIO P0-P5 Direction Control Register

EXTERN xdata volatile BYTE P4                _AT_ 0xFE10;  // GPIO P4 Data
EXTERN xdata volatile BYTE P5                _AT_ 0xFE11;  // GPIO P5 Data
EXTERN xdata volatile BYTE TEST              _AT_ 0xFE12;  // DIT Function Configure and SBT IBT Result Register
EXTERN xdata volatile BYTE SW_RST            _AT_ 0xFE13;  // Software Reset Control Register
EXTERN xdata volatile BYTE RMWEN             _AT_ 0xFE14;  // Port Remote Wakeup Enable Control Register
EXTERN xdata volatile BYTE P0PUCTL           _AT_ 0xFE15;  // Port0 Pull-up Control Register
EXTERN xdata volatile BYTE P1PUCTL           _AT_ 0xFE16;  // Port1 Pull-up Control Register
EXTERN xdata volatile BYTE P2PUCTL           _AT_ 0xFE17;  // Port2 Pull-up Control Register
EXTERN xdata volatile BYTE P3PUCTL           _AT_ 0xFE18;  // Port3 Pull-up Control Register
EXTERN xdata volatile BYTE P4PUCTL           _AT_ 0xFE19;  // Port4 Pull-up Control Register
EXTERN xdata volatile BYTE P5PUCTL           _AT_ 0xFE1A;  // Port5 Pull-up Control Register