sleep.c

Samsung S3C2443 Test program source code

/***************************************************************

  NAME: sleep.c
  DESC: Sleep mode test
  HISTORY:
  08.24.2002:purnnamu
	LCDVFn is connected the analog circuit in LCD. 
	So, this signal should be output L.
  05.xx.2003:DonGo modifid for 2442X, Power-off -> Sleep. naming change.

 ****************************************************************/
 
#include "def.h"
#include "option.h"
#include "System.h"
#include "Console.h" 
#include "2443addr.h"

//#include "lcdlib.h"
#include "sleep.h"




#define TESTYEAR    (0x00)
#define TESTMONTH   (0x12)
#define TESTDATE    (0x31)
#define TESTDAY	    (0x06)  // SUN:1 MON:2 TUE:3 WED:4 THU:5 FRI:6 SAT:7   
#define TESTHOUR    (0x23)
#define TESTMIN	    (0x59)
#define TESTSEC	    (0x59)

#define TESTYEAR2   (0x01)
#define TESTMONTH2  (0x01)
#define TESTDATE2   (0x01)
#define TESTDAY2    (0x07)  // SUN:1 MON:2 TUE:3 WED:4 THU:5 FRI:6 SAT:7   
#define TESTHOUR2   (0x00)
#define TESTMIN2    (0x00)
#define TESTSEC2    (0x00)

#define CHECK_SDRAM_SELFREFRESH	(1)
#define EXTERNAL_BUS_HOLDER	(1)  
//The SMDK2442X board has external databus buffer with bus hold function.
#define CHOOSE_EINT_TYPE	(1)
#define ALARM_WAKEDN		(1)

void SelectEintType(void);
#define SLEEP_COUNT (*(volatile unsigned int *)0x32000000)

void Batt_Sleep(void);

extern void Manual_Register_Set(void);



void SetAlarmWakeUp2(void)
{
	rRTCCON = 0x1;	// R/W enable, 1/32768, Normal(merge), No reset

	rBCDYEAR = TESTYEAR;
	rBCDMON  = TESTMONTH;
	rBCDDAY  = TESTDAY;	// SUN:1 MON:2 TUE:3 WED:4 THU:5 FRI:6 SAT:7
	rBCDDATE = TESTDATE;
	rBCDHOUR = TESTHOUR;
	rBCDMIN  = TESTMIN;
	rBCDSEC  = TESTSEC;
	
	rALMYEAR=TESTYEAR2 ;
	rALMMON =TESTMONTH2;
	rALMDATE=TESTDATE2  ;
	rALMHOUR=TESTHOUR2 ;
	rALMMIN =TESTMIN2  ;
	rALMSEC =TESTSEC2+0x03;

	rRTCALM=0x7f;

	rRTCCON=0x0;   // R/W disable, 1/32768, Normal(merge), No reset
}


//===========================================================================
static void __irq Eint0Int(void)
{
	rINTMSK =BIT_ALLMSK;
	ClearPending(BIT_EINT0);
	printf("[WU]EINT0 interrDNt is occurred for Sleep mode wake-DN.\n");
}


//===========================================================================
static void __irq Eint8_23Int(void)
{
	rINTMSK =BIT_ALLMSK;
	rEINTPEND=(1<<11); //EINT11 sub-pending bit.	
	ClearPending(BIT_EINT8_23);
	printf("[WU]EINT8_23 interrDNt is occurred for Sleep mode wake-DN.\n");
}


//===========================================================================
static void __irq Eint8_23Int_100Hz(void)
{
	rEINTPEND=(1<<11); //EINT11 sub-pending bit.	
	ClearPending(BIT_EINT8_23);
	printf("wui\n");
}


//===========================================================================
static void __irq AlarmInt(void)
{
	printf("INTPND:%x, SRCPND:%x \n", rINTPND, rSRCPND);
	ClearPending(BIT_RTC);
	printf("[WU]ALARM interrDNt is occurred for Sleep mode wake-DN.\n");
}


//===============S3C2413X RTC TIck wakeDN in STOP mode=============================
static void __irq Tick_WakeDN(void)
{
	rINTMSK = BIT_ALLMSK;
	printf("INTPND:%x, SRCPND:%x \n", rINTPND, rSRCPND);
	ClearPending(BIT_TICK);
	printf("[WU]RTC TICK interrupt is occurred for Stop  mode wake-UP.\n");
}



//===========================================================================
void Test_InitSDRAM(void)
//Initialize SDRAM for SDRAM self-refresh test.
{
	int i;
	
	printf("[SDRAM Initialization]\n");
	printf("Fill SDRAM for self-refresh test.\n");
	for(i=_NONCACHE_STARTADDRESS;i<(_NONCACHE_STARTADDRESS+0x400000);i+=4)
		*((U32 *)i)=i^0x55555555;
	printf("Filling SDRAM is completed.\n");

	*((volatile U32 *)0x33e00000)=0x0;  //for Initialize the counter in Check_SleepWakeDN_100Hz(). 
}


//===========================================================================



//===========================================================================
void ConfigSleepGPIO(void)
{


	// USB2.0 and PHY power
	rUSB_PHYPWR |= (0xf<<0);
	rPWRCFG &= ~(1<<4);
	
///////////////////////////////////////////////////////////////////////////////////////////	
	// VDD_OP1 IO
	// GPF[7:0], GPG[7:0], GPE[15:14], GPE[4:0]

	
	//GPF
	rGPFCON &=~(0xffff<<0);
	rGPFCON |= ((0x1<<14)|(0x1<<12)|(0x1<<10)|(0x1<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x2<<0));
	           
	rGPFUDP &=~(0xffff<<0);
	rGPFUDP |= ((0x2<<14)|(0x2<<12)|(0x2<<10)|(0x2<<8)|(0x1<<6)|(0x1<<4)|(0x2<<2)|(0x1<<0));
	
	rGPFDAT &=~ (0xff<<0);
	rGPFDAT |= ((0x0<<7)|(0x0<<6)|(0x0<<5)|(0x0<<4)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	
	//GPG
	rGPGCON &=~(0xffff<<0);
	rGPGCON |= ((0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x2<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));
	           
	rGPGUDP &=~(0xffff<<0);
	rGPGUDP |= ((0x2<<14)|(0x2<<12)|(0x1<<10)|(0x1<<8)|(0x1<<6)|(0x1<<4)|(0x1<<2)|(0x1<<0));
	
	rGPGDAT &=~ (0xff<<0);
	rGPGDAT |= ((0x1<<7)|(0x0<<6)|(0x1<<5)|(0x1<<4)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	
	//GPA
	rGPACON &=~(0x1<<21);
	rGPACON |= ((0x0<<21));
	
	rGPADAT &=~ (0x7<<21);
	rGPADAT |= ((0x1<<21));

	
	// DP0 / DN0
	rMISCCR |= (1<<12);
	

	
///////////////////////////////////////////////////////////////////////////////////////////	
	// VDD_OP2 IO
	// GPB[10:0], GPH[12:0], GPE[15:14], GPE[4:0]

	
	//GPB
	rGPBCON &=~(0x3fffff<<0);
	rGPBCON |= ((0x0<<20)|(0x0<<18)|(0x0<<16)|(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x1<<6)|(0x1<<4)|(0x0<<2)|(0x1<<0));
	
	rGPBUDP = (rGPBUDP &=~(0x3fffff<<0));
	rGPBUDP |= ((0x1<<20)|(0x1<<18)|(0x1<<16)|(0x1<<14)|(0x1<<12)|(0x1<<10)|(0x1<<8)|(0x2<<6)|(0x2<<4)|(0x1<<2)|(0x2<<0));          
	
	rGPBDAT &=~ (0x7ff<<0);
	rGPBDAT |= ((0x1<<10)|(0x1<<9)|(0x1<<8)|(0x1<<7)|(0x1<<6)|(0x1<<5)|(0x1<<4)|(0x1<<3)|(0x0<<2)|(0x0<<1)|(0x0<<0));
	
	printf("rgPBcon=%08x, rgPBUDP=%08x, rGPBDAT=%08x\n", rGPBCON,rGPBUDP,rGPBDAT);
	
	
	//GPE
	rGPECON &=~((0xf<<28)|(0x3ff<<0));
	rGPECON |= ((0x0<<30)|(0x0<<28)|(0x1<<8)|(0x0<<6)|(0x1<<4)|(0x0<<2)|(0x0<<0));
	
	rGPEUDP &=~((0xf<<28)|(0x3ff<<0));
	rGPEUDP |= ((0x2<<30)|(0x2<<28)|(0x2<<8)|(0x1<<6)|(0x2<<4)|(0x1<<2)|(0x1<<0));          
	
	rGPEDAT &=~ (0xffff<<0);
	rGPEDAT |= ((0x1<<15)|(0x1<<14)|(0x1<<4)|(0x1<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	rGPEDAT = 0;
	printf("rgPEcon=%08x, rgPEUDP=%08x, rGPeDAT=%08x\n", rGPECON,rGPEUDP,rGPEDAT);
	
	
	//GPG
	rGPGCON &=~(0xffff<<16);
	rGPGCON |= ((0x0<<30)|(0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16));
	
	rGPGUDP &=~(0xffff<<16);
	rGPGUDP |= ((0x0<<30)|(0x1<<28)|(0x1<<26)|(0x1<<24)|(0x1<<22)|(0x2<<20)|(0x2<<18)|(0x1<<16));
	
	rGPGDAT &=~ (0xff<<8);
	rGPGDAT |= ((0x0<<15)|(0x0<<14)|(0x0<<13)|(0x0<<12)|(0x0<<11)|(0x0<<10)|(0x0<<9)|(0x0<<8));


	
	//GPH
	rGPHCON &=~(0x3fffffff<<0);
	rGPHCON |= ((0x1<<28)|(0x0<<26)|(0x0<<24)|(0x1<<22)|(0x0<<20)|(0x1<<18)|(0x0<<16)|(0x0<<6)|(0x1<<4)|(0x0<<2)|(0x1<<0));
	
	rGPHUDP &=~(0x3fffffff<<0);
	rGPHUDP |= ((0x2<<28)|(0x1<<26)|(0x1<<24)|(0x2<<22)|(0x1<<20)|(0x2<<18)|(0x1<<16)|(0x1<<6)|(0x2<<4)|(0x1<<2)|(0x2<<0));
	
	rGPHDAT &=~ (0x7fff<<0);
	rGPHDAT |= ((0x0<<14)|(0x1<<13)|(0x0<<12)|(0x1<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	
	

///////////////////////////////////////////////////////////////////////////////////////////
	// VDD_SD IO
	// GPE[13:5], GPL[14:0], GPJ[15:13]
	
	//GPE
	rGPECON &=~(0x3ffff<<10);
	rGPECON |= ((0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)\
	           |(0x0<<14)|(0x0<<12)|(0x0<<10));
	
	rGPEUDP &=~(0x3ffff<<10);
	rGPEUDP |= ((0x1<<26)|(0x1<<24)|(0x1<<22)|(0x2<<20)|(0x2<<18)|(0x2<<16)\
	           |(0x2<<14)|(0x2<<12)|(0x1<<10));
	
	rGPEDAT &=~ (0x1ff<<5);
	rGPEDAT |= ((0x0<<13)|(0x0<<12)|(0x0<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|(0x0<<7)|(0x1<<6)|(0x1<<5));

	
	//GPL
	rGPLCON &=~(0x3fffffff<<0);
	rGPLCON |= ((0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)\
	           |(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x1<<0));
	
	rGPLUDP &=~(0x3fffffff<<0);
	rGPLUDP |= ((0x1<<28)|(0x1<<26)|(0x1<<24)|(0x1<<22)|(0x1<<20)|(0x1<<18)|(0x2<<16)\
	           |(0x2<<14)|(0x2<<12)|(0x2<<10)|(0x2<<8)|(0x1<<6)|(0x2<<4)|(0x2<<2)|(0x2<<0));
	
	rGPLDAT &=~ (0x1fff<<0);
	rGPLDAT |= ((0x0<<14)|(0x0<<13)|(0x0<<12)|(0x0<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|(0x1<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	
	
	//GPJ
	rGPJCON &=~(0x3f<<26);
	rGPJCON |= ((0x1<<30)|(0x1<<28)|(0x1<<26));
	
	rGPJUDP &=~(0x3f<<26);
	rGPJUDP |= ((0x2<<30)|(0x2<<28)|(0x2<<26));
	
	rGPJDAT &=~ (0x7<<13);
	rGPJDAT |= ((0x1<<15)|(0x1<<14)|(0x1<<13));



///////////////////////////////////////////////////////////////////////////////////////////	
	// VDD_LCD IO
	// GPC[15:0], GPD[15:0]
	
	//GPC
	rGPCCON &=~(0xffffffff<<0);
	rGPCCON |= ((0x0<<30)|(0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)\
	           |(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));
	
	rGPCUDP &=~(0xffffffff<<0);
	rGPCUDP |= ((0x0<<30)|(0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)\
	           |(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));
	
	rGPCDAT &=~ (0x1fff<<0);
	rGPCDAT |= ((0x0<<14)|(0x1<<13)|(0x0<<12)|(0x1<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));

	//GPD
	rGPDCON &=~(0xffffffff<<0);
	rGPDCON |= ((0x0<<30)|(0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)\
	           |(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));
	           
	rGPDUDP &=~(0xffffffff<<0);
	rGPDUDP |= ((0x0<<30)|(0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)\
	           |(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));
	
	rGPDDAT &=~ (0xffff<<0);
	rGPDDAT |= ((0x0<<14)|(0x1<<13)|(0x0<<12)|(0x1<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));