c_isr.c

关于测试at91sam9260的各种驱动和功能的测试源代码。

/*************************************** Copyright (c) *************************************************
*
*			            POLAR STAR
*				   北天星国际有限公司
*				   http://www.po-star.com
*
*文 件 名: c_isr.c    
*
*编译环境：ADS1.2
*
********************************************************************************************************/



#include "main.h"
#include "lib_audio.h"

//*----------------------------------------------------------------------------
//* \fn    AT91F_I2S_Handler
//* \brief This function is invoked by AT91F_ASM_I2S_Handler
//* This function updates the next SSC PDC pointer to send the next buffer
//*----------------------------------------------------------------------------
void AT91F_I2S_Handler(void)
{
	volatile unsigned int status;
	
	//* Get status and acknowledge IT
	status = pSSC->SSC_SR;
	
	AT91F_PDC_SetNextTx ((AT91PS_PDC) &(pSSC->SSC_RPR),	// PDC SSC base address
						 (char *)(sdram_file +1),/*(char *)wav_file, 	*/			// pointer to next data
						 0x7fff/*AT91C_WAV_FILE_SIZE/2*/); 		// Number of 16 bits words
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_I2S_Init_Handler
//* \brief This function is invoked by AT91F_ASM_I2S_INIT_Handler
//* This function initializes the synchronization between left and right channels
//*----------------------------------------------------------------------------
void AT91F_I2S_Init_Handler(void)
{
	volatile unsigned int status;
	
	// Disable all interrupts
	AT91F_SSC_DisableIt (pSSC, 0xFFFFFFFF);
	
	// Configure AIC controller for the next SSC interrupts
	AT91F_AIC_ConfigureIt (
		AT91C_BASE_AIC,                        // AIC base address
		AT91C_ID_SSC0,                         // System peripheral ID
		AT91C_IRQ_LEVEL_I2S,               	   // Max priority
		AT91C_AIC_SRCTYPE_EXT_HIGH_LEVEL, 	   // Level sensitive
		AT91F_ASM_I2S_Handler );	
	
	// Enable SSC interrupt in AIC
	AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_SSC0);
	
	// Get status
	status = pSSC->SSC_SR;
	
	// Wait the next frame beginning (SYNC)
	while (status & AT91C_SSC_TXSYN == 0){
		status = pSSC->SSC_SR;
	}
	
	// Select next interrupt type
	AT91F_SSC_EnableIt (pSSC, AT91C_SSC_ENDTX);
	
	// ============================= Configure PDC associated to SSC1 =============================
	// PDC already opened in SSC_Configure function 
	
	AT91F_PDC_SetNextTx ((AT91PS_PDC) &(pSSC->SSC_RPR),	// PDC SSC base address
						 (char *)(sdram_file +1),/*(char *)wav_file,*/ 				// pointer to next data
						 0x7fff/*AT91C_WAV_FILE_SIZE/2*/); 		// Number of 16 bits words
						 
	AT91F_PDC_SetTx ((AT91PS_PDC) &(pSSC->SSC_RPR),		// PDC SSC base address	
					 (char *)(sdram_file +1),/*(char *)wav_file,*/					// pointer to data
					0x7fff/* AT91C_WAV_FILE_SIZE/2*/);  			// Number of 16 bits words

	AT91F_PDC_EnableTx ((AT91PS_PDC) &(pSSC->SSC_RPR));	// Start music !!!
}