vsema.v

来自「这是韩国EQUATOR公司提供的DEMO程序」· Verilog 代码 · 共 72 行

/**
*** Copyright (c) 2001 Equator Technologies, Inc.
**/

//
// vsema.v
//
// Abstract:
//
// 	Writes some status data to vlmem, then clears semaphore before
//        entering exit loop.
//
// Notes :
//    ~ To view the 'status' buffer, on egdb do :
//        (egdb) eti dump pio 0x3a1010 8
//

#include "vas.h"

//
// main()
//
main: {
    nop; // Must have 4 nops at start of main()!!
    nop;
    nop;
    nop;

    setacc 0xa1;
    setacc D0_STATUS+0;
    st lastAcc, acc; 
    nop;
	
I_SEMA:

    setacc 0;
    setacc D0_SEMA;
    st lastAcc, acc; // Clear semaphore so vliw will unhalt
    nop;

I_EXIT:

    // Write STATUS buffer
    setacc 0xaf;
    setacc D0_STATUS+2;
    st lastAcc, acc; 
    nop;

I_EXIT_2:

    // Always put a 'while(1)' loop at end of vlx program
    nop;
    nop;
    br I_EXIT_2;
    nop;

} // end main()

//----------------------------------------------------------------//

//
// Lower Data Memory
//
_data0;

D0_SEMA @16:
data 0x1234 (4);
data 0x0 (4);

D0_STATUS:
data 0x0 (8);