📄 接受.s
字号:
.module _接受.c
.area text(rom, con, rel)
.dbfile F:\915M\接受\接受.c
.area data(ram, con, rel)
.dbfile F:\915M\接受\接受.c
_count1::
.blkb 2
.area idata
.word 0
.area data(ram, con, rel)
.dbfile F:\915M\接受\接受.c
.dbsym e count1 _count1 i
_count2::
.blkb 2
.area idata
.word 0
.area data(ram, con, rel)
.dbfile F:\915M\接受\接受.c
.dbsym e count2 _count2 i
_speed::
.blkb 2
.area idata
.word 50
.area data(ram, con, rel)
.dbfile F:\915M\接受\接受.c
.dbsym e speed _speed i
.area text(rom, con, rel)
.dbfile F:\915M\接受\接受.c
.dbfunc e RFXX_PORT_INIT _RFXX_PORT_INIT fV
.even
_RFXX_PORT_INIT::
.dbline -1
.dbline 58
; #include <iom8v.h>
; #include <macros.h>
; #include <stdio.h>
; #define DDR_IN 0
; #define DDR_OUT 1
; #define PORT_SEL PORTB
; #define PIN_SEL PINB
; #define DDR_SEL DDRB
;
; #define PORT_SDI PORTB
; #define PIN_SDI PINB
; #define DDR_SDI DDRB
;
; #define PORT_SCK PORTB
; #define PIN_SCK PINB
; #define DDR_SCK DDRB
;
; #define PORT_SDO PORTB
; #define PIN_SDO PINB
; #define DDR_SDO DDRB
;
; #define PB7 7
; #define PB6 6
; #define RFXX_SCK 5
; #define RFXX_SDO 4
; #define RFXX_SDI 3
; #define RFXX_SEL 2
; #define RFXX_DATA 1
; #define PB0 0
;
; #define SEL_OUTPUT() DDR_SEL|=(1<<RFXX_SEL)
; #define HI_SEL() PORT_SEL|=(1<<RFXX_SEL)
; #define LOW_SEL() PORT_SEL&=~(1<<RFXX_SEL)
;
; #define SDI_OUTPUT() DDR_SDI|=(1<<RFXX_SDI)
; #define HI_SDI() PORT_SDI|=(1<<RFXX_SDI)
; #define LOW_SDI() PORT_SDI&=~(1<<RFXX_SDI)
;
; #define SDO_INPUT() DDR_SDO&=~(1<<RFXX_SDO)
; #define SDO_HI() PIN_SDO&=(1<<RFXX_SDO)
; #define SCK_OUTPUT() DDR_SCK|=(1<<RFXX_SCK)
; #define HI_SCK() PORT_SCK|=(1<<RFXX_SCK)
; #define LOW_SCK() PORT_SCK&=~(1<<RFXX_SCK)
;
; #define baud 19200
; #define fosc 8000000
;
; #define uchar unsigned char
; #define uint unsigned int
;
; uchar RF_RXBUF[4];
; uchar ch0,ch1,ch2,ch3; //j,k,l,m;
; uint count1=0,count2=0,speed=50;
;
;
; /*接受芯片端口初始化*/
; void RFXX_PORT_INIT(void)
; {
.dbline 59
; HI_SEL();
sbi 0x18,2
.dbline 60
; HI_SDI();
sbi 0x18,3
.dbline 61
; LOW_SCK();
cbi 0x18,5
.dbline 62
; SEL_OUTPUT();
sbi 0x17,2
.dbline 63
; SDI_OUTPUT();
sbi 0x17,3
.dbline 64
; SDO_INPUT();
cbi 0x17,4
.dbline 65
; SCK_OUTPUT();
sbi 0x17,5
.dbline -2
L1:
.dbline 0 ; func end
ret
.dbend
.dbfunc e RFXX_WRT_CMD _RFXX_WRT_CMD fV
; temp -> R20,R21
; i -> R22
; aCmd -> R16,R17
.even
_RFXX_WRT_CMD::
rcall push_xgsetF000
.dbline -1
.dbline 70
; }
;
; //接受芯片命令写入
; void RFXX_WRT_CMD(uint aCmd)
; {
.dbline 73
; uchar i;
; uint temp;
; LOW_SCK();
cbi 0x18,5
.dbline 74
; LOW_SEL();
cbi 0x18,2
.dbline 75
; for(i=0;i<16;i++)
clr R22
rjmp L6
L3:
.dbline 76
; {
.dbline 77
; temp<<=1;
lsl R20
rol R21
.dbline 78
; if(SDO_HI())
in R24,0x16
andi R24,16
out 0x16,R24
tst R24
breq L7
X0:
.dbline 79
; { temp|=0x0001; }
.dbline 79
ori R20,1
.dbline 79
L7:
.dbline 80
; LOW_SCK();
cbi 0x18,5
.dbline 82
;
; if(aCmd&0x8000) HI_SDI();
sbrs R17,7
rjmp L9
X1:
.dbline 82
sbi 0x18,3
rjmp L10
L9:
.dbline 83
; else LOW_SDI();
cbi 0x18,3
L10:
.dbline 85
;
; HI_SCK();
sbi 0x18,5
.dbline 86
; aCmd<<=1;
lsl R16
rol R17
.dbline 87
; }
L4:
.dbline 75
inc R22
L6:
.dbline 75
cpi R22,16
brlo L3
X2:
.dbline 88
; LOW_SCK();
cbi 0x18,5
.dbline 89
; HI_SEL();
sbi 0x18,2
.dbline -2
L2:
.dbline 0 ; func end
rjmp pop_xgsetF000
.dbsym r temp 20 i
.dbsym r i 22 c
.dbsym r aCmd 16 i
.dbend
.dbfunc e RF01_RDFIFO _RF01_RDFIFO fc
; Result -> R16
; i -> R18
.even
_RF01_RDFIFO::
.dbline -1
.dbline 95
; // return(temp);
; }
;
; /*接受数据*/
; uchar RF01_RDFIFO(void)
; {
.dbline 97
; uchar i,Result;
; LOW_SCK();
cbi 0x18,5
.dbline 98
; LOW_SDI();
cbi 0x18,3
.dbline 99
; LOW_SEL();
cbi 0x18,2
.dbline 100
; for(i=0;i<16;i++)
clr R18
rjmp L15
L12:
.dbline 101
; {
.dbline 102
; HI_SCK();
sbi 0x18,5
.dbline 103
; HI_SCK();
sbi 0x18,5
.dbline 104
; LOW_SCK();
cbi 0x18,5
.dbline 105
; LOW_SCK();
cbi 0x18,5
.dbline 106
; }
L13:
.dbline 100
inc R18
L15:
.dbline 100
cpi R18,16
brlo L12
X3:
.dbline 107
; Result=0;
clr R16
.dbline 108
; for(i=0;i<8;i++)
clr R18
rjmp L19
L16:
.dbline 109
; {
.dbline 110
; Result<<=1;
lsl R16
.dbline 111
; if(SDO_HI())
in R24,0x16
andi R24,16
out 0x16,R24
tst R24
breq L20
X4:
.dbline 112
; { Result|=1; }
.dbline 112
ori R16,1
.dbline 112
L20:
.dbline 113
; HI_SCK();
sbi 0x18,5
.dbline 114
; HI_SCK();
sbi 0x18,5
.dbline 115
; LOW_SCK();
cbi 0x18,5
.dbline 116
; LOW_SCK();
cbi 0x18,5
.dbline 117
; }
L17:
.dbline 108
inc R18
L19:
.dbline 108
cpi R18,8
brlo L16
X5:
.dbline 118
; HI_SEL();
sbi 0x18,2
.dbline 119
; return(Result);
.dbline -2
L11:
.dbline 0 ; func end
ret
.dbsym r Result 16 c
.dbsym r i 18 c
.dbend
.dbfunc e Transmit _Transmit fV
; Send_Data -> R16
.even
_Transmit::
.dbline -1
.dbline 124
; }
;
; /*字符输出函数*/
; void Transmit(uchar Send_Data)
; {
L23:
.dbline 125
; while (!(UCSRA & (1<<UDRE)));//判断是否发送完成
L24:
.dbline 125
sbis 0xb,5
rjmp L23
X6:
.dbline 126
; UDR=Send_Data;//发送数据
out 0xc,R16
.dbline -2
L22:
.dbline 0 ; func end
ret
.dbsym r Send_Data 16 c
.dbend
.dbfunc e uart_init _uart_init fV
.even
_uart_init::
.dbline -1
.dbline 131
; }
;
; /*USART初始化*/
; void uart_init(void)
; {
.dbline 132
; UCSRA=0x00;
clr R2
out 0xb,R2
.dbline 133
; UCSRB=(1<<RXEN)|(1<<TXEN);//允许发送和接收
ldi R24,24
out 0xa,R24
.dbline 134
; UCSRC=(1<<URSEL)|0x06;//8bit,1stop
ldi R24,134
out 0x20,R24
.dbline 135
; UBRRL=(fosc/baud/16-1)%256;//设置波特率寄存器低位字节
ldi R24,25
out 0x9,R24
.dbline 136
; UBRRH=(fosc/baud/16-1)/256;//设置波特率寄存器高位字节
out 0x20,R2
.dbline -2
L26:
.dbline 0 ; func end
ret
.dbend
.dbfunc e init_main _init_main fV
.even
_init_main::
.dbline -1
.dbline 141
; }
;
; /*系统初始化*/
; void init_main(void)
; {
.dbline 142
; uart_init();
rcall _uart_init
.dbline 143
; DDRC|=0x30; //PORTC4,PORTC5输出高电平
in R24,0x14
ori R24,48
out 0x14,R24
.dbline 144
; PORTC|=0x30;
in R24,0x15
ori R24,48
out 0x15,R24
.dbline 145
; DDRB|=0x03; //PORTB0，PORTB1输出高电平
in R24,0x17
ori R24,3
out 0x17,R24
.dbline 146
; PORTB|=0x03;
in R24,0x18
ori R24,3
out 0x18,R24
.dbline 147
; DDRD|=0xE0; //d
in R24,0x11
ori R24,224
out 0x11,R24
.dbline 148
; RFXX_PORT_INIT();
rcall _RFXX_PORT_INIT
.dbline 150
;
; RFXX_WRT_CMD(0x0000);
clr R16
clr R17
rcall _RFXX_WRT_CMD
.dbline 151
; RFXX_WRT_CMD(0x998A); //915BAND,134KHZ,998A
ldi R16,39306
ldi R17,153
rcall _RFXX_WRT_CMD
.dbline 152
; RFXX_WRT_CMD(0xA7D0); //915MHZ
ldi R16,42960
ldi R17,167
rcall _RFXX_WRT_CMD
.dbline 153
; RFXX_WRT_CMD(0xC847); //4.8kbps,47
ldi R16,51271
ldi R17,200
rcall _RFXX_WRT_CMD
.dbline 154
; RFXX_WRT_CMD(0xC69B); //AFC setting
ldi R16,50843
ldi R17,198
rcall _RFXX_WRT_CMD
.dbline 155
; RFXX_WRT_CMD(0xC42C); //Clowck recovery manuel control,Digital filter,DQD=4
ldi R16,50220
ldi R17,196
rcall _RFXX_WRT_CMD
.dbline 156
; RFXX_WRT_CMD(0xC240); //output 1.66MHz
ldi R16,49728
ldi R17,194
rcall _RFXX_WRT_CMD
.dbline 157
; RFXX_WRT_CMD(0xC080);
ldi R16,49280
ldi R17,192
rcall _RFXX_WRT_CMD
.dbline 158
; RFXX_WRT_CMD(0xCE88); //
ldi R16,52872
ldi R17,206
rcall _RFXX_WRT_CMD
.dbline 159
; RFXX_WRT_CMD(0xCE8B); //use FIFO
ldi R16,52875
ldi R17,206
rcall _RFXX_WRT_CMD
.dbline 160
; RFXX_WRT_CMD(0xC081); //open RX
ldi R16,49281
ldi R17,192
rcall _RFXX_WRT_CMD
.dbline 162
;
; DDRB|=(1<<RFXX_DATA);
sbi 0x17,1
.dbline 163
; DDRD&=~(1<<2);
cbi 0x11,2
.dbline 165
;
; MCUCR=0x00;
clr R2
out 0x35,R2
.dbline 166
; GICR=0x00;
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