emhwlib_properties_1000.h

Sigma SMP8634 Mrua v. 2.8.2.0

/******************************************************/
/* This file is generated automatically, DO NOT EDIT! */
/******************************************************/
/*
 * include/emhwlib_properties_1000.h
 *
 * Copyright (c) 2001-2003 Sigma Designs, Inc. 
 * All Rights Reserved. Proprietary and Confidential.
 *
 */
 
/**
  @file include/emhwlib_properties_1000.h
  @brief emhwlib generated file
   
  @author Jacques Mahe, Christian Wolff, Julien Soulier, Emmanuel Michon
  @ingroup hwlproperties
*/

#ifndef __EMHWLIB_PROPERTIES_1000_H__
#define __EMHWLIB_PROPERTIES_1000_H__

/** Module Enum Default */
enum RMSystemBlockPropertyID {
	/** SystemBlock_GPIO_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_GPIO = 4001,
	/** SystemBlock_QueryGPIO_in_type and SystemBlock_QueryGPIO_out_type, (R/W Exchange) @par 
		Enum Default; */
	RMSystemBlockPropertyID_QueryGPIO = 4002,
	/** SystemBlock_PWM_type, (W) @par 
		control of the pulse width modulation generators on GPIO pins 14 and 15 */
	RMSystemBlockPropertyID_PWM = 4003,
	/** SystemBlock_QueryPWM_in_type and SystemBlock_QueryPWM_out_type, (R/W Exchange) @par 
		status information on the pulse width modulation generators on GPIO pins 14 and 15 */
	RMSystemBlockPropertyID_QueryPWM = 4004,
	/** SystemBlock_DRAMSize_in_type and SystemBlock_DRAMSize_out_type, (R/W Exchange) @par 
		Enum Default; */
	RMSystemBlockPropertyID_DRAMSize = 4005,
	/** SystemBlock_DRAMConfig_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_DRAMConfig = 4006,
	/** SystemBlock_DRAMDelay_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_DRAMDelay = 4007,
	/** SystemBlock_DRAMDelayAuto_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_DRAMDelayAuto = 4008,
	/** SystemBlock_BWMonitorSelection_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_BWMonitorSelection = 4575,
	/** SystemBlock_BWMonitorEnable_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_BWMonitorEnable = 4577,
	/** ::struct EMhwlibBWMonitorSample, (R) @par 
		Enum Default; */
	RMSystemBlockPropertyID_BWMonitorSample = 4576,
	/** ::RMuint32, (R) @par 
		Enum Default; */
	RMSystemBlockPropertyID_Version = 1001,
};

/** Module Enum Default */
enum RMCPUBlockPropertyID {
	/** CPUBlock_State_enum, (R/W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_State = 1,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_IRQHandler = 3001,
	/** CPUBlock_ProcessInterrupt_type, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_ProcessInterrupt = 1002,
	/** CPUBlock_AddDataFifoXferTask_type, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_AddDataFifoXferTask = 1003,
	/** CPUBlock_AddRawDataXferTask_type, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_AddRawDataXferTask = 1004,
	/** CPUBlock_AddSoftIrqTask_type, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_AddSoftIrqTask = 1005,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_DelTransferTask = 1006,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_DelSoftIrqTask = 1007,
	/** CPUBlock_DataFifoTransferTaskSize_in_type and CPUBlock_DataFifoTransferTaskSize_out_type, (R/W Exchange) @par 
		Enum Default; */
	RMCPUBlockPropertyID_DataFifoTransferTaskSize = 1008,
	/** CPUBlock_RawDataTransferTaskSize_in_type and CPUBlock_RawDataTransferTaskSize_out_type, (R/W Exchange) @par 
		Enum Default; */
	RMCPUBlockPropertyID_RawDataTransferTaskSize = 1009,
	/** ::RMuint32, (R) @par 
		Enum Default; */
	RMCPUBlockPropertyID_SoftIrqTaskSize = 1010,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_FlushTransferTask = 1011,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_EndOfStreamTransferTask = 1012,
	/** CPUBlock_DataFifoChunk_type, (R/W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_DataFifoChunk = 1013,
	/** CPUBlock_RawDataChunk_type, (R/W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_RawDataChunk = 1014,
	/** CPUBlock_AddDataFifoReadBuffer_type, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_AddDataFifoReadBuffer = 1015,
	/** CPUBlock_AddRawDataReadBuffer_type, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_AddRawDataReadBuffer = 1016,
	/** CPUBlock_ProgramRawDataXfer_type, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_ProgramRawDataXfer = 4009,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_DisableTransferTask = 1017,
	/** ::struct SoftIrqTaskEvent, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_SetSoftIrqTaskEvent = 1018,
	/** ::struct SoftIrqTaskEvent, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_ClearSoftIrqTaskEvent = 1019,
	/** ::struct SoftIrqTaskEvent, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_EnableSoftIrqTaskEvent = 1020,
	/** ::struct SoftIrqTaskEvent, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_DisableSoftIrqTaskEvent = 1021,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_PCIEnableInterrupt = 3002,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_PCIDisableInterrupt = 3003,
	/** CPUBlock_Error_type, (R) @par 
		Enum Default; */
	RMCPUBlockPropertyID_Error = 4010,
	/** CPUBlock_EMhwlibError_type, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_EMhwlibError = 1023,
	/** CPUBlock_HeartBeatCounters_in_type and CPUBlock_HeartBeatCounters_out_type, (R/W Exchange) @par 
		Enum Default; */
	RMCPUBlockPropertyID_HeartBeatCounters = 4534,
	/** CPUBlock_ReadBufferThreshold_type, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_ReadBufferThreshold = 1106,
};

/** Module Enum Default */
enum RMXPUBlockPropertyID {
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMXPUBlockPropertyID_DoXrpc = 3005,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMXPUBlockPropertyID_UnloadIrqHandler = 3006,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMXPUBlockPropertyID_ZeroIrqHandlerAPI = 3007,
	/** XPUBlock_Error_type, (R) @par 
		Enum Default; */
	RMXPUBlockPropertyID_Error = 4011,
};

/** Module Enum Default */
enum RMIPUBlockPropertyID {
	/** IPUBlock_Error_type, (R) @par 
		Enum Default; */
	RMIPUBlockPropertyID_Error = 4598,
};

/** Module Enum Default */
enum RMDisplayBlockPropertyID {
	/** DisplayBlock_VsyncApiInfo_type, (R) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_VsyncApiInfo = 4012,
	/** DisplayBlock_SurfaceSize_in_type and DisplayBlock_SurfaceSize_out_type, (R/W Exchange) @par 
		returns the required DRAM size, in bytes, as well as the buffer sizes for luma and chroma for a given format and image size. also allots space for vsync surface struct. the chroma plane has to follow the luma plane immediately in memory */
	RMDisplayBlockPropertyID_SurfaceSize = 4013,
	/** DisplayBlock_PictureSize_in_type and DisplayBlock_PictureSize_out_type, (R/W Exchange) @par 
		returns the required DRAM size, in bytes, as well as the buffer sizes for luma and chroma for a given format and image size. also allots space for vsync surface struct. the chroma plane has to follow the luma plane immediately in memory */
	RMDisplayBlockPropertyID_PictureSize = 4014,
	/** DisplayBlock_MultiplePictureSurfaceSize_in_type and DisplayBlock_MultiplePictureSurfaceSize_out_type, (R/W Exchange) @par 
		returns the required DRAM size, in bytes, as well as the buffer sizes for luma and chroma for a given format and image size. also allots space for vsync surface struct. the chroma plane has to follow the luma plane immediately in memory */
	RMDisplayBlockPropertyID_MultiplePictureSurfaceSize = 4015,
	/** DisplayBlock_InitSurface_in_type and DisplayBlock_InitSurface_out_type, (R/W Exchange) @par 
		initialize a static surface */
	RMDisplayBlockPropertyID_InitSurface = 6001,
	/** DisplayBlock_InitMultiplePictureSurface_type, (W) @par 
		initialize a picture fifo surface */
	RMDisplayBlockPropertyID_InitMultiplePictureSurface = 6002,
	/** DisplayBlock_InitMultiplePictureSurfaceX_type, (W) @par 
		initialize a picture fifo surface */
	RMDisplayBlockPropertyID_InitMultiplePictureSurfaceX = 6191,
	/** DisplayBlock_InitPicture_in_type and DisplayBlock_InitPicture_out_type, (R/W Exchange) @par 
		returns the required DRAM size, in bytes, as well as the buffer sizes for luma and chroma for a given format and image size. also allots space for vsync surface struct. the chroma plane has to follow the luma plane immediately in memory */
	RMDisplayBlockPropertyID_InitPicture = 4016,
	/** DisplayBlock_InitPictureX_in_type and DisplayBlock_InitPictureX_out_type, (R/W Exchange) @par 
		returns the required DRAM size, in bytes, as well as the buffer sizes for luma and chroma for a given format and image size. also allots space for vsync surface struct. the chroma plane has to follow the luma plane immediately in memory */
	RMDisplayBlockPropertyID_InitPictureX = 4470,
	/** DisplayBlock_SurfaceInfo_in_type and DisplayBlock_SurfaceInfo_out_type, (R/W Exchange) @par 
		Get the surface fields */
	RMDisplayBlockPropertyID_SurfaceInfo = 6003,
	/** DisplayBlock_PictureInfo_in_type and DisplayBlock_PictureInfo_out_type, (R/W Exchange) @par 
		Get some picture fields */
	RMDisplayBlockPropertyID_PictureInfo = 6183,
	/** DisplayBlock_InsertPictureInSurfaceFifo_type, (W) @par 
		insert a picture inside the surface picture's fifo */
	RMDisplayBlockPropertyID_InsertPictureInSurfaceFifo = 4017,
	/** DisplayBlock_SetPaletteOnPicture_type, (W) @par 
		insert a picture inside the surface picture's fifo */
	RMDisplayBlockPropertyID_SetPaletteOnPicture = 4471,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_ErasePicturesInSurfaceFifo = 4018,
	/** DisplayBlock_SurfaceAspectRatio_type, (W) @par 
		initialize a static surface */
	RMDisplayBlockPropertyID_SurfaceAspectRatio = 6004,
	/** DisplayBlock_SurfaceSTC_type, (W) @par 
		Set/Get the STC Module ID attached to a surface */
	RMDisplayBlockPropertyID_SurfaceSTC = 6204,
	/** DisplayBlock_ForcePictureBufferAddress_type, (W) @par 
		force the picture buffer address */
	RMDisplayBlockPropertyID_ForcePictureBufferAddress = 6005,
	/** DisplayBlock_EnableGFXInteraction_type, (W) @par