emhwlib_propertytypes.h

Sigma SMP8634 Mrua v. 2.8.2.0

	/** Member default */
	RMuint32 surface;
	/** picture aspect ratio (default), pixel aspect ratio or display aspect ratio */
	enum EMhwlibAspectRatioType type;
	/** pixel or display aspect ratio of the surface, value ignored when picture aspect ratio is selected as type */
	struct EMhwlibAspectRatio ar;
};

/** Set/Get the STC Module ID attached to a surface */
struct DisplayBlock_SurfaceSTC_type {
	/** Member default */
	RMuint32 surface;
	/** Member default */
	RMuint32 STCModuleId;
};

/** force the picture buffer address */
struct DisplayBlock_ForcePictureBufferAddress_type {
	/** Member default */
	RMuint32 Surface;
	/** Member default */
	RMuint32 LumaAddress;
	/** Member default */
	RMuint32 ChromaAddress;
};

/** initialize a static surface */
struct DisplayBlock_EnableGFXInteraction_type {
	/** Member default */
	RMuint32 Surface;
	/** Member default */
	RMbool Enable;
};

/** Configure which GPIO pin at which polarity is used with property AlternateOutput */
struct DisplayBlock_AltOutConfig_type {
	/** number of the GPIO pin used to switch the alternate output, -1 to disable GPIO usage */
	RMint32 GPIO;
	/** Polarity the GPIO, FALSE: GPIO-High switches to the alternate out, TRUE: GPIO-Low switches to the alternate out */
	RMbool Invert;
};

/**  */
struct DisplayBlock_AnalogSDParams_type {
	/** gbus address of struct vsync_analog_SD_registers */
	struct vsync_analog_SD_registers * Struct;
	/** Member default */
	struct EMhwlibTVFormatAnalog * Format;
};

/**  */
struct DisplayBlock_AnalogHDParams_type {
	/** gbus address of struct vsync_analog_HD_registers */
	struct vsync_analog_HD_registers * Struct;
	/** Member default */
	struct EMhwlibTVFormatAnalog * Format;
};

/**  */
struct DisplayBlock_AnalogOffsetParams_type {
	/** gbus address of struct vsync_analog_Offset_registers */
	struct vsync_analog_Offset_registers * Struct;
	/** Member default */
	struct EMhwlibTVFormatAnalog * Format;
};

/**  */
struct DisplayBlock_DigitalParams_type {
	/** gbus address of struct vsync_digital_registers */
	struct vsync_digital_registers * Struct;
	/** Member default */
	struct EMhwlibTVFormatDigital * Format;
};

/** @note Used to program the VBUS bandwidth arbiter */
struct DisplayBlock_VBUSBandwidth_type {
	/** Member default */
	struct BWArbiterParam VideoIn;
	/** Member default */
	struct BWArbiterParam GraphicsIn;
	/** Member default */
	struct BWArbiterParam MainVideoScalerLuma;
	/** Member default */
	struct BWArbiterParam MainVideoScalerChroma;
	/** Member default */
	struct BWArbiterParam GFXScalerLuma;
	/** Member default */
	struct BWArbiterParam GFXScalerChroma;
	/** Member default */
	struct BWArbiterParam VCRScalerLuma;
	/** Member default */
	struct BWArbiterParam VCRScalerChroma;
	/** Member default */
	struct BWArbiterParam CRTScalerLuma;
	/** Member default */
	struct BWArbiterParam CRTScalerChroma;
	/** Member default */
	struct BWArbiterParam OSDScaler;
	/** Member default */
	struct BWArbiterParam SPUScaler;
	/** Member default */
	struct BWArbiterParam GFXEngineX;
	/** Member default */
	struct BWArbiterParam GFXEngineY;
	/** Member default */
	struct BWArbiterParam GFXEngineNX;
};

/** enum Default */
enum DisplayBlock_HDMIState_type {
	/** Normal operation */
	DisplayBlock_HDMIState_Running = 0,
	/** Reset HDMI configuration in SiI9030 */
	DisplayBlock_HDMIState_ResetHDMI = 1,
	/** Reset I2C block and key memeory @note: don't use from CPU, if keymem is protected */
	DisplayBlock_HDMIState_ResetKeymemI2C = 2,
	/** Reset complete SiI9030, I2C and keymem @note: don't use from CPU, if keymem is protected */
	DisplayBlock_HDMIState_ResetConfig = 3,
};

/** struct Default */
struct DisplayBlock_HDMIConfig_type {
	/** HDMI clk divider @note: FALSE = clk, TRUE = clk / 2 */
	RMbool ClkDiv;
	/** State of the external physical transmitter @note: FALSE = power down, TRUE = normal operation */
	RMbool PowerUpPhy;
	/** Selects which pads are routet to the VO0 output pins @note: FALSE = DigitalOut (bypassing HDMI), TRUE = HDMI */
	RMbool OutputSelect;
	/** Whether to invert the audio SClk @note: FALSE = not inverted, TRUE = inverted */
	RMbool AudioClkInv;
};

/** struct Default */
struct DisplayBlock_PixelClock_type {
	/** ModuleID of the output block */
	RMuint32 OutputModuleID;
	/** Frequency of the pixel clock needed at the output block */
	RMuint32 PixelClock;
	/** PLL to be used (PLL or CD) */
	enum PLLGen PLL;
	/** PLL output to be used */
	enum PLLOut PLLOut;
	/** Whether the pixel clock for the Analog output for this mode is 4 times oversampled */
	RMbool Analog4XOver;
	/** Pointer (Has to be effectively a GBus address) to the PLL register struct in the Info struct */
	struct PLLRegSet * pConfigPLL;
};

/** struct Default */
struct DisplayBlock_SurfaceDefaultColorSpaceAlgorithm_type {
	/** surface to set the default colorspace algo */
	RMuint32 Surface;
	/** default colorspace algorithm */
	enum EMhwlibDefaultColorSpaceAlgorithm Algorithm;
};

/** Sets the OSD scaling mode */
struct DispOSDScaler_ScalingConfig_type {
	/** Member default */
	RMbool AdaptativeEnable;
	/** Member default range 0 -> 1 */
	RMuint32 Taps;
	/** Member default range 0 -> 3 */
	RMuint32 AntiFlickerColor;
	/** Member default range 0 -> 3 */
	RMuint32 AntiFlickerAlpha;
};

/** struct Default */
struct DispHardwareCursor_Size_type {
	/** Horizontal dimension of the cursor range 0 -> 255 */
	RMuint32 Width;
	/** Vertical dimension of the cursor range 0 -> 255 */
	RMuint32 Height;
};

/** Sets the proportion of field N-1 to generate frame N */
struct DispMainVideoScaler_DeinterlacingProportion_type {
	/** Member default range 0 -> 16 */
	RMuint32 NewLineProportion;
	/** Member default range 0 -> 16 */
	RMuint32 ExistingLineProportion;
};

/** Sets the alpha motion modulation function */
struct DispMainVideoScaler_DeinterlacingMotionConfig_type {
	/** Member default range 0 -> 255 */
	RMuint32 Value0;
	/** Member default range 0 -> 255 */
	RMuint32 Value8;
	/** Member default range 0 -> 255 */
	RMuint32 Value16;
	/** Member default range 0 -> 255 */
	RMuint32 Value32;
};

/** Sets the scaling filter selection boundaries */
struct DispMainVideoScaler_FilterSelection_type {
	/** Member default */
	RMuint32 Boundary_0_1;
	/** Member default */
	RMuint32 Boundary_1_2;
	/** Member default */
	RMuint32 Boundary_2_3;
};

/** Sets the SPU scaling mode */
struct DispSubPictureScaler_ScalingConfig_type {
	/** Member default */
	RMbool AdaptativeEnable;
	/** Member default range 0 -> 3 */
	RMuint32 AntiFlickerColor;
	/** Member default range 0 -> 3 */
	RMuint32 AntiFlickerAlpha;
};

/** @note Only a maximum of 4 planes can be blended per pixel. A transparent pixel is not considered as alpha blended.@note Layer 7 is reserved for the Hardware Cursor */
struct DispMainMixer_LayerOrder_type {
	/** Top alpha layer */
	RMuint32 Layer6SourceModuleID;
	/** Member default */
	RMuint32 Layer5SourceModuleID;
	/** Member default */
	RMuint32 Layer4SourceModuleID;
	/** Member default */
	RMuint32 Layer3SourceModuleID;
	/** Member default */
	RMuint32 Layer2SourceModuleID;
	/** Member default */
	RMuint32 Layer1SourceModuleID;
	/** Bottom alpha layer */
	RMuint32 Layer0SourceModuleID;
};

/** @note Only a maximum of 4 planes can be blended per pixel. A transparent pixel is not considered as alpha blended.@note Layer 7 is reserved for the Hardware Cursor */
struct DispVCRMixer_LayerOrder_type {
	/** Member default */
	RMuint32 Layer3SourceModuleID;
	/** Member default */
	RMuint32 Layer2SourceModuleID;
	/** Member default */
	RMuint32 Layer1SourceModuleID;
	/** Bottom alpha layer */
	RMuint32 Layer0SourceModuleID;
};

/** struct Default */
struct DispRouting_Route_type {
	/** Member default */
	RMuint32 SourceModuleID;
	/** Member default */
	RMuint32 DestinationModuleID;
	/** Member default */
	RMuint32 Enable;
};

/** struct Default */
struct DispRouting_Routing_type {
	/** Member default */
	RMbool DigitalOutputEnable;
	/** Member default */
	RMuint32 DigitalOutputSourceModuleID;
	/** Member default */
	RMbool MainAnalogOutputEnable;
	/** Member default */
	RMuint32 MainAnalogOutputSourceModuleID;
	/** Member default */
	RMbool ComponentOutputEnable;
	/** Member default */
	RMuint32 ComponentOutputSourceModuleID;
	/** Member default */
	RMbool CompositeOutputEnable;
	/** Member default */
	RMuint32 CompositeOutputSourceModuleID;
};

/** struct Default */
struct DispVideoInput_Open_type {
	/** format mode of the image */
	enum EMhwlibColorMode ColorMode;
	/** format submode of the image */
	enum EMhwlibColorFormat ColorFormat;
	/** Chroma mode of the image */
	enum EMhwlibSamplingMode SamplingMode;
	/** width of the image in pixel range 0 -> 4095 */
	RMuint32 Width;
	/** height of the image in pixel range 0 -> 4095 */
	RMuint32 Height;
	/** number of picture buffers range 0 -> 10 */
	RMuint32 NumBuffer;
	/** adress of data that was allocated by the application */
	RMuint32 BufferAddress;
	/** amount of data that was allocated by the application */
	RMuint32 BufferSize;
	/** color space of the surface */
	enum EMhwlibColorSpace ColorSpace;
	/** pixel aspect ratio of the surface */
	struct EMhwlibAspectRatio PixelAspectRatio;
	/** Number of the STC timer used for this input */
	RMuint32 STCIndex;
};

/** struct Default */
struct DispVideoInput_InputFormat_type {
	/** Member default */
	RMbool ProtocolV;
	/** Member default */
	RMbool ProtocolM;
	/** Member default */
	RMbool ComponentOrderReverse;
	/** Member default */
	RMbool TrailingEdge;
	/** Member default */
	RMbool VSyncDelay;
};

/** struct Default */
struct DispGraphicInput_Open_type {
	/** format mode of the image */
	enum EMhwlibColorMode ColorMode;
	/** format submode of the image */
	enum EMhwlibColorFormat ColorFormat;
	/** Chroma mode of the image */
	enum EMhwlibSamplingMode SamplingMode;
	/** width of the image in pixel range 0 -> 4095 */
	RMuint32 Width;
	/** height of the image in pixel range 0 -> 4095 */
	RMuint32 Height;
	/** number of picture buffers range 0 -> 10 */
	RMuint32 NumBuffer;
	/** adress of data that was allocated by the application */
	RMuint32 BufferAddress;
	/** amount of data that was allocated by the application */
	RMuint32 BufferSize;
	/** color space of the surface */
	enum EMhwlibColorSpace ColorSpace;
	/** pixel aspect ratio of the surface */
	struct EMhwlibAspectRatio PixelAspectRatio;
	/** Number of the STC timer used for this input */
	RMuint32 STCIndex;
};

/** Subset for video input. For all features of graphics input, use Format property. */
struct DispGraphicInput_InputFormat_type {
	/** Member default */
	enum EMhwlibInputColorFormat InputColorFormat;
	/** Member default */
	RMbool ProtocolV;
	/** Member default */
	RMbool ProtocolL;
	/** Member default */
	RMbool ProtocolP;
	/** Member default */
	RMbool ComponentOrderRBG;
	/** Member default */
	RMbool TrailingEdge;
	/** Member default */
	RMbool VSyncDelay;
};

/** Specifies the output surface characteristics */
struct DispGraphicInput_OutputFormat_type {
	/** Member default */
	RMuint32 OutRouteModuleID;
	/** storage size of a pixel, 8, 16 or 32 bit range 8 -> 32 */
	RMuint32 BusSize;
	/** Member default range 0 -> 255 */
	RMuint32 Alpha0;
	/** Member default range 0 -> 255 */
	RMuint32 Alpha1;
	/** Member default */
	RMbool FadingEnable;
	/** Member default */
	RMbool DualEdgeInvert;
	/** Member default */
	RMbool DualEdge;
	/** Member default */
	RMbool DualEdgeWidth;
};

/** struct Default */
struct DispGraphicInput_KeyColor_type {
	/** Member default */
	RMbool KeyEnable;
	/** Member default range 0 -> 255 */
	RMuint32 KeyColorRCr;
	/** Member default range 0 -> 255 */
	RMuint32 KeyColorGY;
	/** Member default range 0 -> 255 */
	RMuint32 KeyColorBCb;
	/** Member default range 0 -> 15 */
	RMuint32 KeyColorRange;
};

/** Luma or RGB components are clipped between 16 and 235, chroma is clipped from 16 to 240, if active. */
enum DispDigitalOut_ClippingLevel_type {
	/** In Enum default */
	DispDigitalOut_ClippingLevel_Clip_16_240 = 1,
	/** In Enum default */
	DispDigitalOut_ClippingLevel_Clip_1_254 = 2,
};

/** Several output options - OBSOLETE, use PadsControl/QueryPadsControl instead! */
struct DispDigitalOut_PadsConfig_type {
	/** Member default */
	RMbool InvertClock;
	/** Member default */
	RMbool DDRdout;
	/** Member default */
	RMbool InvertCaptureClock;
	/** Member default range 0 -> 7 */
	RMuint32 DDRdelay;
	/** Member default */
	RMbool DisableDataDelay;
};

/** Several input options - OBSOLETE, use PadsControl/QueryPadsControl instead! */
struct DispDigitalOut_InputPadsConfig_type {
	/** Select V2 pads as the input pins for the DispVideoInput */
	RMbool VideoInputV2;