emhwlib_globaltypes.h

Sigma SMP8634 Mrua v. 2.8.2.0

#define EMHWLIB_DECODE_BW_MPEG2_SD   80*1024
#define EMHWLIB_DECODE_BW_MPEG4_SD   80*1024
#define EMHWLIB_DECODE_BW_DIVX3      80*1024
#define EMHWLIB_DECODE_BW_VC1_HD    880*1024
#define EMHWLIB_DECODE_BW_WMV_HD    880*1024
#define EMHWLIB_DECODE_BW_VC1_LHD   780*1024
#define EMHWLIB_DECODE_BW_WMV_LHD   780*1024
#define EMHWLIB_DECODE_BW_VC1_SD    150*1024
#define EMHWLIB_DECODE_BW_WMV_SD    150*1024
#define EMHWLIB_DECODE_BW_H264_HD   880*1024
#define EMHWLIB_DECODE_BW_H264_SD   400*1024
#define EMHWLIB_DECODE_BW_JPEG             0

#if 1
/* Demux modules cleanup.
   Structures generated in previous emhwlib_propertytypes.h are still used
   in current applications. Until we get rid of them we define these types here.*/

/* added for DCCHD backward compatibility */
struct DemuxProgram_TransportParameters_type {
	RMuint16 VideoPID;
	RMuint16 AudioPID;
	RMuint16 PCRPID;
};

struct DemuxProgram_ProgramParameters_type {
	RMuint8 VideoSID;
	RMuint8 AudioSID;
	RMuint8 AudioSSID;
	RMuint8 SubpictureSID;
	RMuint8 SubpictureSSID;
};

struct DemuxProgram_OutputControl_type {
	RMbool Video;
	RMbool Audio;
	RMbool Subpicture;
	RMbool VideoPts;
	RMbool AudioPts;
	RMbool SubpicturePts;
	enum DemuxTriggerType Trigger;
};

enum Demux_Command_type {
	Demux_Command_Play,
	Demux_Command_Pause,
	Demux_Command_Stop,
};

enum Demux_State_type {
	Demux_State_Playing,
	Demux_State_Paused,
	Demux_State_Stopped,
	Demux_State_PlayPending,
	Demux_State_PausePending,
	Demux_State_StopPending,
};

struct Demux_InputParameters_type {
	enum DemuxSpiType Spi;
	enum DemuxSourceType SourceType;
};
#endif /* end demux modules cleanup */

struct EMhwlibMemoryBlockDescriptor{
 	RMuint32 Address;
 	RMuint32 Size;
};

struct EMhwlibMemoryBlockList{
	RMuint32 BlockCount;
	struct EMhwlibMemoryBlockDescriptor Blocks[64];
};


typedef RMstatus (*emhwlib_ppf_get_engine_mem_func)(struct EMhwlibMemoryBlockList *requiredmemblocks);
typedef RMstatus (*emhwlib_ppf_set_engine_mem_func)(struct EMhwlibMemoryBlockList *allocatedmemblocks);
typedef RMstatus (*emhwlib_ppf_get_output_mem_func)(RMuint32 output_slot, struct EMhwlibMemoryBlockList *requiredmemblocks);
typedef RMstatus (*emhwlib_ppf_set_output_mem_func)(RMuint32 output_slot, struct EMhwlibMemoryBlockList *allocatedmemblocks);
typedef RMstatus (*emhwlib_ppf_get_output_func)(RMuint32 output_slot, RMuint32 *output_surface);
typedef RMstatus (*emhwlib_ppf_set_input_func)(RMuint32 input_slot, RMuint32 input_surface);
typedef RMstatus (*emhwlib_ppf_set_command_func)(void *command_param, RMuint32 param_size, void *command_result, RMuint32 result_size);
/* these are not part of the handler */
typedef RMuint32 (*emhwlib_ppf_run_filter_func)(void *pE, RMuint32 ModuleID, RMuint32 mask);
typedef RMstatus (*emhwlib_ppf_init_func)(void);
typedef RMstatus (*emhwlib_ppf_deinit_func)(void);

struct EMhwlibPPFHandle {
	emhwlib_ppf_get_engine_mem_func get_engine_mem;

	emhwlib_ppf_set_engine_mem_func set_engine_mem;

	emhwlib_ppf_get_output_mem_func get_output_mem;

	emhwlib_ppf_set_output_mem_func set_output_mem;
	emhwlib_ppf_set_input_func set_input;
	emhwlib_ppf_get_output_func get_output;
	emhwlib_ppf_set_command_func set_command;
/* 	emhwlib_ppf_run_filter_func run_filter; */
/* 	emhwlib_ppf_init_func init; */
/* 	emhwlib_ppf_deinit_func deinit; */
};

/** Device settings for the I2C bus */
struct EMhwlibI2CDeviceParameter {
	/** Set to 1 (used for future extensions) */
	RMuint32 APIVersion;
	/** GPIO of the I2C data line (software I2C only) */
	enum GPIOId_type Clock;
	/** GPIO of the I2C clock line (software I2C only) */
	enum GPIOId_type Data;
	/** I2C device address (write uses DevAddr, read uses DevAddr + 1) */
	RMuint8 DevAddr;
	/** I2C delay, in uSec */
	RMuint32 Delay;
	/** frequency of the I2C bit transfer, in kHz (e.g. 100 or 400) */
	RMuint32 Speed;
};

#define PID_USED_IN_PID_BANK    1
#define PID_USED_AS_HWPCR       2
#define PID_USED_AS_PAT         4
#define PID_USED_AS_CAT         8
#define PID_USED_AS_MGT      0x10

struct EMhwlibPidUsage_type {
	RMuint32 flags; /* combination of any of PID_USED_IN_PID_BANK, PID_USED_AS_HWPCR,
	                   PID_USED_AS_PAT, PID_USED_AS_CAT, PID_USED_AS_MGT.*/
	RMuint32 count; /* number of pid entries already set with the same pid value.
	                   Count can be greater than 4, maximum size of the array returned. */
	RMuint32x4 pid_entries; /* array of maximum 4 pid entries. The valid count
	                           of these entries is RMmin(count, 4). */
};

enum DiscontinuityProcessingMethod_type {
	DiscontinuityProcessingMethod_1 = 1, /* As soon as the demux sends a discontinuity interrupt or RMSTCPropertyID_Discontinuity
	                                  is called the pcr is set in the master timer.
	                                  When video or audio inband comes the current master timer is set in video/audio timers.
					  The issue is that video and audio will skip frames in order to resynchronize.
					  The result is worse when the video/audio fifo is big. */
	DiscontinuityProcessingMethod_2, /* As soon as the demux sends a discontinuity interrupt or RMSTCPropertyID_Discontinuity
	                                  is called the pcr value is stored internally but the master timer is not modified.
					  When first discontinuity inband interrupt comes from any of the decoders
					  the stored pcr is set in the master timer and also in the corresponding decoder's timer.
					  The other timer will be set when the inband will come, using the current master timer.
					  This method should drastically reduce the number of frames skipped at discontinuity point. */
};


enum EMhwlibPictureOrientation{
	EMhwlibPictureOrientation_HFlip,
	EMhwlibPictureOrientation_VFlip,
	EMhwlibPictureOrientation_BLDiagonalFlip,
	EMhwlibPictureOrientation_TLDiagonalFlip,
	EMhwlibPictureOrientation_90,
	EMhwlibPictureOrientation_180,
	EMhwlibPictureOrientation_270,
};

enum EMhwlibPictureTransformType{
	EMhwlibPictureTransformType_Orientation,
};

struct EMhwlibBWMonitorSample{
	RMuint32 DRAMControllerId;
	RMuint32 TotalTransfers;
	RMuint32 SelectedTransfers;
	RMuint32 Interval;
	RMuint32 SampleRef;
};

#define BWM_VOID                     0xff
#define BWM_ALL_BUSES_W              0x1e
#define BWM_ALL_BUSES_R              0x9e              

#define BWM_MBUS_HOST0_R             0x80
#define BWM_MBUS_HOST1_R             0x81
#define BWM_MBUS_AUDIO0_R            0x82
#define BWM_MBUS_AUDIO1_R            0x83
#define BWM_MBUS_TRANSPORT_R         0x84
#define BWM_MBUS_VIDEO_MISC0_R       0x85
#define BWM_MBUS_VIDEO_MISC1_R       0x86
#define BWM_MBUS_VIDEO_DBLK0_R       0x87
#define BWM_MBUS_VIDEO_DBLK1_R       0x88
#define BWM_MBUS_VIDEO_STORE0_R      0x89
#define BWM_MBUS_VIDEO_STORE1_R      0x8a
#define BWM_MBUS_ALL_R               0x9d

#define BWM_MBUS_HOST0_W             0x00
#define BWM_MBUS_HOST1_W             0x01
#define BWM_MBUS_AUDIO0_W            0x02
#define BWM_MBUS_AUDIO1_W            0x03
#define BWM_MBUS_TRANSPORT_W         0x04
#define BWM_MBUS_VIDEO_MISC0_W       0x05
#define BWM_MBUS_VIDEO_MISC1_W       0x06
#define BWM_MBUS_VIDEO_DBLK0_W       0x07
#define BWM_MBUS_VIDEO_DBLK1_W       0x08
#define BWM_MBUS_VIDEO_STORE0_W      0x09
#define BWM_MBUS_VIDEO_STORE1_W      0x0a
#define BWM_MBUS_ALL_W               0x1d

#define BWM_VBUS_MV_L_R              0xa0     
#define BWM_VBUS_MV_C_R              0xa1
#define BWM_VBUS_VCR_L_R             0xa2
#define BWM_VBUS_VCR_C_R             0xa3
#define BWM_VBUS_VP_R                0xa4
#define BWM_VBUS_HDSD_R              0xa5
#define BWM_VBUS_GFX_L_R             0xa6
#define BWM_VBUS_GFX_C_R             0xa7
#define BWM_VBUS_OSD_R               0xa8
#define BWM_VBUS_SPU_R               0xa9
#define BWM_VBUS_GACC_Y_R            0xaa
#define BWM_VBUS_GACC_X_R            0xab
#define BWM_VBUS_ALL_R               0xbd

#define BWM_VBUS_GRAPH_IN_W          0x20
#define BWM_VBUS_VIDEO_IN_W          0x21
#define BWM_VBUS_GACC_W              0x22
#define BWM_VBUS_HDSD_W              0x23
#define BWM_VBUS_ALL_W               0x3d

#define BWM_GBUS_R                   0xdd
#define BWM_GBUS_W                   0x5d

#define BWM_DLBUS_R                  0xfd
#define BWM_DLBUS_W                  0x7d



struct EMhwlibChunk256 {
	RMuint32 size;
	RMuint8 data[256];
};

enum EMhwlibReadBufferCompletionMode {
	EMhwlibReadBufferCompletionMode_Full,        /* complete the buffer when it is full; default behavior */
	EMhwlibReadBufferCompletionMode_NoDelay,     /* complete the buffer as soon as the microcode sends data.
	                                                This can guarantee one or multiple access units in the data.
							 Note. Access unit can be: section, PES, user data, etc. */
	EMhwlibReadBufferCompletionMode_MinimumSize, /* complete the buffer when the buffer has more than the threshold value */
	EMhwlibReadBufferCompletionMode_ExactSize,   /* complete the buffer when the buffer has exactly the threshold value */
};

struct EMhwlibReadBufferCompletion {
	/** By default the DMA buffers are completed when they are full. */
	enum EMhwlibReadBufferCompletionMode mode;
	/** Limited to max 1MB=0x100000. Used only when the mode is ..._MinimumSize or ..._ExactSize. */
	RMuint32 threshold;
};

enum EMhwlibRecipherMode {
	EMhwlibRecipher_passthrough, /* It reciphers only the encrypted TS packets. */
	EMhwlibRecipher_always       /* It reciphers all TS packets - clear or encrypted. */
};


struct EMhwlibTTXFifoInfo {
	RMuint32 base;
	RMuint32 size;
	RMuint32 readable;
	RMuint32 writable;
};

/*Logic OR-ed flags needed for RMVideoDecoderPropertyID_SequenceEndCodeResetFlags */
#define VIDEO_SEQUENCE_END_CODE_RESET_REFERENCES        1 /* It prevents prediction across the boundaries of video sequences */
#define VIDEO_SEQUENCE_END_CODE_RESET_DISPLAY_SIZE      2 /* It prevents display size propagation across the boundaries of video sequences */
#define VIDEO_SEQUENCE_END_CODE_RESET_COLOR_DESCRIPTION 4 /* It prevents color description propagation across the boundaries of video sequences */

enum EMhwlibInbandPanScanMode {
	EMhwlibInbandPanScan_DefaultPicture = 0, /* the window coordinates are ignored */
	EMhwlibInbandPanScan_AbsoluteWindow,     /* the window coordinates are in 1/16 pixel accuracy. For an image width of 720 pixels the coordinate should be 720*16. */
	EMhwlibInbandPanScan_RelativeWindow,     /* the window coordinates are relative to the decoded picture, on a scale of 4096. 100% = 4096. */
	EMhwlibInbandPanScan_LetterBox_Center,   /* the window coordinates are ignored */
	EMhwlibInbandPanScan_LetterBox_Top,      /* the window coordinates are ignored */
};

struct EMhwlibInbandPanScan {
	enum EMhwlibInbandPanScanMode mode;
	struct EMhwlibWindow window;
};


#define MAX_TIMER_COUNTER 9
#define AUDIO_DECODERS_MAX 4

#define AUDIO_ENGINE0_DECODER0_PTS_VALID_MASK 	0x01
#define AUDIO_ENGINE0_DECODER1_PTS_VALID_MASK 	0x02
#define AUDIO_ENGINE1_DECODER0_PTS_VALID_MASK 	0x04
#define AUDIO_ENGINE1_DECODER1_PTS_VALID_MASK 	0x08

#define VIDEO_COMPONENT_PTS_VALID_MASK 			0x10
#define VIDEO_DIGITAL_PTS_VALID_MASK   			0x20
#define VIDEO_ANALOG_PTS_VALID_MASK    			0x40

#define MAIN_VIDEO_SCALER_PTS_VALID_MASK 		0x80
#define OSD_SCALER_PTS_VALID_MASK 				0x100
#define SPU_SCALER_PTS_VALID_MASK 				0x200
#define GFX_SCALER_PTS_VALID_MASK 				0x400
#define VCR_SCALER_PTS_VALID_MASK 				0x800
#define VIDEO_PLANE_PTS_VALID_MASK  			0x1000


struct EMhwlibAvSyncSample {
	RMuint32 sample_id;  // counter 
    RMuint32 pts_valid_flags;  			//  a mask for which value is valid
    RMuint32 main_video_scaler_pts;
    RMuint32 gfx_scaler_pts;
    RMuint32 osd_scaler_pts;
    RMuint32 vcr_scaler_pts;
	RMuint32 spu_scaler_pts;
	RMuint32 video_plane_pts;
    // 
    RMuint32 audio_pts[AUDIO_DECODERS_MAX];
    // 
	RMuint32 timer[MAX_TIMER_COUNTER];
};


/* HDMI CEC API definitions. This is shared between the emhwlib and the HDMI driver. */

struct CEC_Frame {
	RMuint32 Initiator;    // 0..15
	RMuint32 Destination;  // 0..15
	RMuint32 Size;  // 0..16, size of Opcode plus Operands
	RMuint8 Opcode;
	RMuint8 Operand[15];
};

struct CEC_Status {
	RMbool PowerChanged;    // TRUE: the power status has changed
	RMbool PowerStatus;     // current state of the power
	RMbool HotPlugChanged;  // TRUE: the hot plug state has changed
	RMbool HotPlugStatus;   // current state of the hot plug signal
	RMbool MessageReceived; // TRUE: a message has been received
	RMbool RxErrorStartBit;
	RMbool RxErrorShortPulse;
	RMbool RxErrorFIFOOverrun;
	RMbool MessageSent;     // TRUE: a message has been sent and acknowledged by receiver
	RMbool TxErrorRetransmitCountExceeded;  // TRUE: message could not be sent
	RMbool TxFIFOEmpty;     // TRUE: Another message can now be sent
};

enum CEC_Opcode {
	CEC_Opcode_FeatureAbort = 0x00, 
	CEC_Opcode_ImageViewOn = 0x04, 
	CEC_Opcode_TunerStepIncrement = 0x05, 
	CEC_Opcode_TunerStepDecrement = 0x06, 
	CEC_Opcode_TunerDeviceStatus = 0x07, 
	CEC_Opcode_GiveTunerDeviceStatus = 0x08, 
	CEC_Opcode_RecordOn = 0x09, 
	CEC_Opcode_RecordStatus = 0x0A, 
	CEC_Opcode_RecordOff = 0x0B, 
	CEC_Opcode_TextViewOn = 0x0D, 
	CEC_Opcode_RecordTVScreen = 0x0F, 
	CEC_Opcode_GiveDeckStatus = 0x1A, 
	CEC_Opcode_DeckStatus = 0x1B, 
	CEC_Opcode_SetMenuLanguage = 0x32, 
	CEC_Opcode_ClearAnalogueTimer = 0x33, 
	CEC_Opcode_SetAnalogueTimer = 0x34, 
	CEC_Opcode_TimerStatus = 0x35, 
	CEC_Opcode_Standby = 0x36, 
	CEC_Opcode_Play = 0x41, 
	CEC_Opcode_DeckControl = 0x42, 
	CEC_Opcode_TimerClearedStatus = 0x43, 
	CEC_Opcode_UserControlPressed = 0x44, 
	CEC_Opcode_UserControlReleased = 0x45, 
	CEC_Opcode_GiveOSDName = 0x46, 
	CEC_Opcode_SetOSDName = 0x47, 
	CEC_Opcode_SetOSDString = 0x64, 
	CEC_Opcode_SetTimerProgramTitle = 0x67, 
	CEC_Opcode_SystemAudioModeRequest = 0x70, 
	CEC_Opcode_GiveAudioStatus = 0x71, 
	CEC_Opcode_SetSystemAudioMode = 0x72, 
	CEC_Opcode_ReportAudioStatus = 0x7A, 
	CEC_Opcode_GiveSystemAudioModeStatus = 0x7D, 
	CEC_Opcode_SystemAudioModeStatus = 0x7E, 
	CEC_Opcode_RoutingChange = 0x80, 
	CEC_Opcode_RoutingInformation = 0x81, 
	CEC_Opcode_ActiveSource = 0x82, 
	CEC_Opcode_GivePhysicalAddress = 0x83, 
	CEC_Opcode_ReportPhysicalAddress = 0x84, 
	CEC_Opcode_RequestActiveSource = 0x85, 
	CEC_Opcode_SetStreamPath = 0x86, 
	CEC_Opcode_DeviceVendorID = 0x87, 
	CEC_Opcode_VendorCommand = 0x89, 
	CEC_Opcode_VendorRemoteButtonDown = 0x8A, 
	CEC_Opcode_VendorRemoteButtonUp = 0x8B,