emhwlib_properties_3000.h

Sigma SMP8634 Mrua v. 2.8.2.0

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/* This file is generated automatically, DO NOT EDIT! */
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/*
 * include/emhwlib_properties_3000.h
 *
 * Copyright (c) 2001-2003 Sigma Designs, Inc. 
 * All Rights Reserved. Proprietary and Confidential.
 *
 */
 
/**
  @file include/emhwlib_properties_3000.h
  @brief emhwlib generated file
   
  @author Jacques Mahe, Christian Wolff, Julien Soulier, Emmanuel Michon
  @ingroup hwlproperties
*/

#ifndef __EMHWLIB_PROPERTIES_3000_H__
#define __EMHWLIB_PROPERTIES_3000_H__

/** Module Enum Default */
enum RMSystemBlockPropertyID {
	/** SystemBlock_GPIO_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_GPIO = 4001,
	/** SystemBlock_QueryGPIO_in_type and SystemBlock_QueryGPIO_out_type, (R/W Exchange) @par 
		Enum Default; */
	RMSystemBlockPropertyID_QueryGPIO = 4002,
	/** SystemBlock_PWM_type, (W) @par 
		control of the pulse width modulation generators on GPIO pins 14 and 15 */
	RMSystemBlockPropertyID_PWM = 4003,
	/** SystemBlock_QueryPWM_in_type and SystemBlock_QueryPWM_out_type, (R/W Exchange) @par 
		status information on the pulse width modulation generators on GPIO pins 14 and 15 */
	RMSystemBlockPropertyID_QueryPWM = 4004,
	/** SystemBlock_DRAMSize_in_type and SystemBlock_DRAMSize_out_type, (R/W Exchange) @par 
		Enum Default; */
	RMSystemBlockPropertyID_DRAMSize = 4005,
	/** SystemBlock_DRAMConfig_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_DRAMConfig = 4006,
	/** SystemBlock_DRAMDelay_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_DRAMDelay = 4007,
	/** SystemBlock_DRAMDelayAuto_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_DRAMDelayAuto = 4008,
	/** SystemBlock_BWMonitorSelection_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_BWMonitorSelection = 4575,
	/** SystemBlock_BWMonitorEnable_type, (W) @par 
		Enum Default; */
	RMSystemBlockPropertyID_BWMonitorEnable = 4577,
	/** ::struct EMhwlibBWMonitorSample, (R) @par 
		Enum Default; */
	RMSystemBlockPropertyID_BWMonitorSample = 4576,
};

/** Module Enum Default */
enum RMCPUBlockPropertyID {
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_IRQHandler = 3001,
	/** CPUBlock_ProgramRawDataXfer_type, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_ProgramRawDataXfer = 4009,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_PCIEnableInterrupt = 3002,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMCPUBlockPropertyID_PCIDisableInterrupt = 3003,
	/** CPUBlock_Error_type, (R) @par 
		Enum Default; */
	RMCPUBlockPropertyID_Error = 4010,
	/** CPUBlock_HeartBeatCounters_in_type and CPUBlock_HeartBeatCounters_out_type, (R/W Exchange) @par 
		Enum Default; */
	RMCPUBlockPropertyID_HeartBeatCounters = 4534,
};

/** Module Enum Default */
enum RMXPUBlockPropertyID {
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMXPUBlockPropertyID_DoXrpc = 3005,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMXPUBlockPropertyID_UnloadIrqHandler = 3006,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMXPUBlockPropertyID_ZeroIrqHandlerAPI = 3007,
	/** XPUBlock_Error_type, (R) @par 
		Enum Default; */
	RMXPUBlockPropertyID_Error = 4011,
};

/** Module Enum Default */
enum RMIPUBlockPropertyID {
	/** IPUBlock_Error_type, (R) @par 
		Enum Default; */
	RMIPUBlockPropertyID_Error = 4598,
};

/** Module Enum Default */
enum RMDisplayBlockPropertyID {
	/** DisplayBlock_VsyncApiInfo_type, (R) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_VsyncApiInfo = 4012,
	/** DisplayBlock_SurfaceSize_in_type and DisplayBlock_SurfaceSize_out_type, (R/W Exchange) @par 
		returns the required DRAM size, in bytes, as well as the buffer sizes for luma and chroma for a given format and image size. also allots space for vsync surface struct. the chroma plane has to follow the luma plane immediately in memory */
	RMDisplayBlockPropertyID_SurfaceSize = 4013,
	/** DisplayBlock_PictureSize_in_type and DisplayBlock_PictureSize_out_type, (R/W Exchange) @par 
		returns the required DRAM size, in bytes, as well as the buffer sizes for luma and chroma for a given format and image size. also allots space for vsync surface struct. the chroma plane has to follow the luma plane immediately in memory */
	RMDisplayBlockPropertyID_PictureSize = 4014,
	/** DisplayBlock_MultiplePictureSurfaceSize_in_type and DisplayBlock_MultiplePictureSurfaceSize_out_type, (R/W Exchange) @par 
		returns the required DRAM size, in bytes, as well as the buffer sizes for luma and chroma for a given format and image size. also allots space for vsync surface struct. the chroma plane has to follow the luma plane immediately in memory */
	RMDisplayBlockPropertyID_MultiplePictureSurfaceSize = 4015,
	/** DisplayBlock_InitSurface_in_type and DisplayBlock_InitSurface_out_type, (R/W Exchange) @par 
		initialize a static surface */
	RMDisplayBlockPropertyID_InitSurface = 6001,
	/** DisplayBlock_InitMultiplePictureSurface_type, (W) @par 
		initialize a picture fifo surface */
	RMDisplayBlockPropertyID_InitMultiplePictureSurface = 6002,
	/** DisplayBlock_InitMultiplePictureSurfaceX_type, (W) @par 
		initialize a picture fifo surface */
	RMDisplayBlockPropertyID_InitMultiplePictureSurfaceX = 6191,
	/** DisplayBlock_InitPicture_in_type and DisplayBlock_InitPicture_out_type, (R/W Exchange) @par 
		returns the required DRAM size, in bytes, as well as the buffer sizes for luma and chroma for a given format and image size. also allots space for vsync surface struct. the chroma plane has to follow the luma plane immediately in memory */
	RMDisplayBlockPropertyID_InitPicture = 4016,
	/** DisplayBlock_InitPictureX_in_type and DisplayBlock_InitPictureX_out_type, (R/W Exchange) @par 
		returns the required DRAM size, in bytes, as well as the buffer sizes for luma and chroma for a given format and image size. also allots space for vsync surface struct. the chroma plane has to follow the luma plane immediately in memory */
	RMDisplayBlockPropertyID_InitPictureX = 4470,
	/** DisplayBlock_SurfaceInfo_in_type and DisplayBlock_SurfaceInfo_out_type, (R/W Exchange) @par 
		Get the surface fields */
	RMDisplayBlockPropertyID_SurfaceInfo = 6003,
	/** DisplayBlock_PictureInfo_in_type and DisplayBlock_PictureInfo_out_type, (R/W Exchange) @par 
		Get some picture fields */
	RMDisplayBlockPropertyID_PictureInfo = 6183,
	/** DisplayBlock_InsertPictureInSurfaceFifo_type, (W) @par 
		insert a picture inside the surface picture's fifo */
	RMDisplayBlockPropertyID_InsertPictureInSurfaceFifo = 4017,
	/** DisplayBlock_SetPaletteOnPicture_type, (W) @par 
		insert a picture inside the surface picture's fifo */
	RMDisplayBlockPropertyID_SetPaletteOnPicture = 4471,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_ErasePicturesInSurfaceFifo = 4018,
	/** DisplayBlock_SurfaceAspectRatio_type, (W) @par 
		initialize a static surface */
	RMDisplayBlockPropertyID_SurfaceAspectRatio = 6004,
	/** DisplayBlock_SurfaceSTC_type, (W) @par 
		Set/Get the STC Module ID attached to a surface */
	RMDisplayBlockPropertyID_SurfaceSTC = 6204,
	/** DisplayBlock_ForcePictureBufferAddress_type, (W) @par 
		force the picture buffer address */
	RMDisplayBlockPropertyID_ForcePictureBufferAddress = 6005,
	/** DisplayBlock_EnableGFXInteraction_type, (W) @par 
		initialize a static surface */
	RMDisplayBlockPropertyID_EnableGFXInteraction = 6006,
	/** ::RMbool, (W) @par 
		Locks the display to activate several properties at once during vertical blanking.@note Failure to lock may cause artifacts created by partial output settings. */
	RMDisplayBlockPropertyID_Lock = 5006,
	/** DisplayBlock_AltOutConfig_type, (W) @par 
		Configure which GPIO pin at which polarity is used with property AlternateOutput */
	RMDisplayBlockPropertyID_AltOutConfig = 5007,
	/** ::RMbool, (W) @par 
		Sets GPIO4 to redirect the video to a different output.@note This property is board dependent. */
	RMDisplayBlockPropertyID_AlternateOutput = 5008,
	/** DisplayBlock_VBUSBandwidth_type, (R/W) @par 
		@note Used to program the VBUS bandwidth arbiter */
	RMDisplayBlockPropertyID_VBUSBandwidth = 6007,
	/** ::RMbool, (R/W) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_EnableDirtyBits = 4021,
	/** ::RMbool, (R/W) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_EnableVBUSArbiter = 4022,
	/** DisplayBlock_HDMIState_enum, (R/W) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_HDMIState = 4023,
	/** DisplayBlock_HDMIConfig_type, (R/W) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_HDMIConfig = 4024,
	/** ::RMuint32, (W) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_ErasePicture = 4548,
	/** DisplayBlock_SequencePicture_in_type and DisplayBlock_SequencePicture_out_type, (R/W Exchange) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_SequencePicture = 4589,
	/** DisplayBlock_SurfaceDefaultColorSpaceAlgorithm_type, (W) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_SurfaceDefaultColorSpaceAlgorithm = 4590,
	/** DisplayBlock_ConnectReader_in_type and DisplayBlock_ConnectReader_out_type, (R/W Exchange) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_ConnectReader = 6197,
	/** ::struct EMhwlibSurfaceReader, (W) @par 
		Enum Default; */
	RMDisplayBlockPropertyID_DisconnectReader = 6198,
};

/** Module Enum Default */
enum RMDispOSDScalerPropertyID {
	/** DispOSDScaler_ScalingConfig_type, (R/W) @par 
		Sets the OSD scaling mode */
	RMDispOSDScalerPropertyID_ScalingConfig = 6014,
};

/** The hardware cursor block generates a small picture to the main mixer block.@n An arbitrary bitmap is stored in 4 bit/pixel format in  a 512x32 on-chip SRAM. Thus no external memory bandwidth is required to support the cursor.@n On chips earlier than SMP8634, each 4-bit pixel is fed to a 16x6x4 lookup table to produce an output stream of 24-bit (6-6-6-6 format) aYcbCr pixels.@note Each video component is multiplied by four, and the akpha value is extended to 8 bits before being sent to the main mixer.@n On SMP8634 and later chips, each 4-bit pixel is fed to a 16x32 look-up table which outputs 32 bit 8888 aYCbCr pixels.@n The horizontal and vertical dimensions of the cursor picture is constrained as follows: @li X size less than or equal to 255 @li Y size less than or equal to 255 */
enum RMDispHardwareCursorPropertyID {
	/** ::RMCursorPix, (W) @par 
		Enum Default; */
	RMDispHardwareCursorPropertyID_Bitmap = 6031,
	/** ::RMCursorLut, (W) @par 
		Enum Default; */
	RMDispHardwareCursorPropertyID_Lut = 6032,
	/** DispHardwareCursor_Size_type, (W) @par 
		Enum Default; */
	RMDispHardwareCursorPropertyID_Size = 6033,
};

/** The main video scaler is similar in general structure to the multi-format scalers with several important differences:\n @li Only video input data formats are supported (no graphics) @li 4-tap H and V-scalers are implemented rather than 2-tap @li A special deinterlacing mode supports vertical scaling using a 2-tap filter combining previous field and current field data @li HD (ITU 709) <-> SD (ITU 601) colorimetry conversion is supported  (both directions).\n\n The main video scaler supports deinterlacing using either of two algorithms, Type 1 and Type 2.\n\n @li In the Type 1 algorithm, output frame N is constructed from both the current (field N) and previous field (field N-1). Each field has  its missing lines reconstructed by a linear interpolation of its neighboring lines. For each output line, the actual (or interpolated) data from field N is combined with the interpolated (or actual) data from field N-1, using the weighted summation: @n @verbatim Lnew = [A* LN-1 + (16 A)* LN] / 16  or Lnew = [B* LN-1 + (16-B)* LN] / 16 @endverbatim where A and B are programmed parameters. Parameter A is used when Lnew exists in the current field (N); parameter B is used when Lnew exists in the previous field (N-1).@li Type 2 deinterlacing uses 3 fields, and is motion-adaptive. Output frame N is built from frame N-1, N, and N+1. Field N-1 and N+1 luma values are compared over 4x2 pixel blocks, resulting in a localized motion detection. Fields N-1 and N are both upscaled, and information from field N-1 is inserted into the output frame depending on how much motion is detected. In other words, the algorithm shifts between inter-field (weave) deinterlacing in regions with little motion, and intra-field (bob) deinterlacing in regions with significant motion.  The Type 2 algorithm supports concurrent deinterlacing and resizing, such as converting 480i input to 720p format. Implementing the Type 2 algorithm involves a coordinated usage of the main video scaler, an available multi-scaler, and the primary mixer block. */
enum RMDispMainVideoScalerPropertyID {
	/** ::enum EMhwlibDeinterlacingMode, (R/W) @par 
		Sets the deinterlacing mode (0,1,2) */
	RMDispMainVideoScalerPropertyID_DeinterlacingMode = 6045,
	/** DispMainVideoScaler_DeinterlacingProportion_type, (R/W) @par 
		Sets the proportion of field N-1 to generate frame N */
	RMDispMainVideoScalerPropertyID_DeinterlacingProportion = 6046,
	/** DispMainVideoScaler_DeinterlacingMotionConfig_type, (R/W) @par 
		Sets the alpha motion modulation function */
	RMDispMainVideoScalerPropertyID_DeinterlacingMotionConfig = 6047,
	/** ::RMuint32, (R/W) @par