audio.fnsim.qmsg

来自「ALTERA的语音芯片程序」· QMSG 代码 · 共 13 行

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Functional Simulation Netlist Generation Quartus II " "Info: Running Quartus II Functional Simulation Netlist Generation" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Dec 15 22:10:57 2008 " "Info: Processing started: Mon Dec 15 22:10:57 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off audio -c audio --generate_functional_sim_netlist " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off audio -c audio --generate_functional_sim_netlist" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "audiochip.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file audiochip.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 audiochip-bhv " "Info: Found design unit 1: audiochip-bhv" {  } { { "audiochip.vhd" "" { Text "G:/debug/audio/audiochip.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 audiochip " "Info: Found entity 1: audiochip" {  } { { "audiochip.vhd" "" { Text "G:/debug/audio/audiochip.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "changer.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file changer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 changer-bhv " "Info: Found design unit 1: changer-bhv" {  } { { "changer.vhd" "" { Text "G:/debug/audio/changer.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 changer " "Info: Found entity 1: changer" {  } { { "changer.vhd" "" { Text "G:/debug/audio/changer.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "clock.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file clock.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 clock-bhv " "Info: Found design unit 1: clock-bhv" {  } { { "clock.vhd" "" { Text "G:/debug/audio/clock.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 clock " "Info: Found entity 1: clock" {  } { { "clock.vhd" "" { Text "G:/debug/audio/clock.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fifo.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file fifo.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 myfifo-bhv " "Info: Found design unit 1: myfifo-bhv" {  } { { "fifo.vhd" "" { Text "G:/debug/audio/fifo.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 myfifo " "Info: Found entity 1: myfifo" {  } { { "fifo.vhd" "" { Text "G:/debug/audio/fifo.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "keyvol.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file keyvol.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 keyvol-bhv " "Info: Found design unit 1: keyvol-bhv" {  } { { "keyvol.vhd" "" { Text "G:/debug/audio/keyvol.vhd" 8 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 keyvol " "Info: Found entity 1: keyvol" {  } { { "keyvol.vhd" "" { Text "G:/debug/audio/keyvol.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "source_serial_parallel.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file source_serial_parallel.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 source_serial_parallel-shift " "Info: Found design unit 1: source_serial_parallel-shift" {  } { { "source_serial_parallel.vhd" "" { Text "G:/debug/audio/source_serial_parallel.vhd" 11 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 source_serial_parallel " "Info: Found entity 1: source_serial_parallel" {  } { { "source_serial_parallel.vhd" "" { Text "G:/debug/audio/source_serial_parallel.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "source_serial_parallel " "Info: Elaborating entity \"source_serial_parallel\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "bitcount source_serial_parallel.vhd(29) " "Warning (10492): VHDL Process Statement warning at source_serial_parallel.vhd(29): signal \"bitcount\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "source_serial_parallel.vhd" "" { Text "G:/debug/audio/source_serial_parallel.vhd" 29 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Functional Simulation Netlist Generation 0 s 1  Quartus II " "Info: Quartus II Functional Simulation Netlist Generation was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Dec 15 22:11:01 2008 " "Info: Processing ended: Mon Dec 15 22:11:01 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}