📄 main.c
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//------------------------------------------------------------------------------
// main.c
//------------------------------------------------------------------------------
// Copyright (C) 2005 Silicon Laboratories, Inc.
//
// Date: 08/02/06 10:35:31
// Target: C8051F34x
//
// Description:
// This example shows how to store web server content in the CP220x
// Flash Memory.
//
// This file contains the main routine, MCU initialization code, and
// callback functions used by the TCP/IP Library.
//
// How to run this example:
//
// 1. Build and download the code to a PoE_VOICE_EB
//
// 2. Connect the device to a Network (or use a loopback cable).
//
// 3. The Red and Green LEDs should start blinking once programming
//
//
// Modifying this example for use in a different application:
//
// 1. Add the .h file corresponding to the web content to the include
// list. This .h file is generated by the HTML2C utility.
//
// 2. Add the .c file corresponding to the web content to the project
// and add to build.
//
// 3. Add a corresponding mn_vf_set_entry() call to add the web content
// to the virtual file system.
//
// 4. Adjust <num_vf_pages> to at least the number of files you are adding
// to the virtual file system.
//
// 5. Adjust the parameter passed to Store_File() to indicate the number
// of files you would like to program in CP220x Flash. Be careful that
// the size of files you are adding does not exceed 7424 bytes. Also, you
// can add appoximately 12 files before running out of space to store the
// file system lookup table.
//
// Generated by TCP/IP Configuration Wizard Version 3.1
//
#include "mn_userconst.h" // TCP/IP Library Constants
#include "mn_stackconst.h" // TCP/IP Library Constants
#include "mn_errs.h" // Library Error Codes
#include "mn_defs.h" // Library Type definitions
#include "mn_funcs.h" // Library Function Prototypes
#include <c8051F340.h> // Device-specific SFR Definitions
#include "Store_File.h" // CP220x Flash Programming
//------------------------------------------------------------------------------
// Header Files for Virtual File System
//------------------------------------------------------------------------------
#include "VFILE_DIR\logo.h"
#include "VFILE_DIR\features1.h"
#include "VFILE_DIR\features2.h"
#include "VFILE_DIR\features3.h"
//------------------------------------------------------------------------------
// Global Constants
//------------------------------------------------------------------------------
sbit RED_LED = P2^4;
sbit GREEN_LED = P2^5;
sbit YELLOW_LED = P2^7;
#define SYSCLK 49000000
//------------------------------------------------------------------------------
// Function Prototypes
//------------------------------------------------------------------------------
// Initialization Routines
void PORT_Init (void);
void SYSCLK_Init (void);
void EMIF_Init(void);
int establish_network_connection();
//-----------------------------------------------------------------------------
// Main Routine
//-----------------------------------------------------------------------------
void main(void)
{
long delay;
// Disable watchdog timer
PCA0MD = 0x00;
// Initialize the MCU
PORT_Init();
SYSCLK_Init();
EMIF_Init();
while(1)
{
// Initialize the TCP/IP stack.
if (mn_init() < 0)
{
// If code execution enters this while(1) loop, the stack failed to initialize.
// Verify that all boards are connected and powered properly.
while(1);
}
// Turn Off LEDs
RED_LED = 0;
GREEN_LED = 0;
// Connect to the network
establish_network_connection();
// Add web page to virtual file system.
// These web pages will be stored in CP220x Flash
mn_vf_set_entry((byte *)"logo.gif", LOGO_SIZE, logo_gif, VF_PTYPE_FLASH);
mn_vf_set_entry((byte *)"features1.html", FEATURES1_SIZE, features1_html, VF_PTYPE_FLASH);
mn_vf_set_entry((byte *)"features2.html", FEATURES2_SIZE, features2_html, VF_PTYPE_FLASH);
mn_vf_set_entry((byte *)"features3.html", FEATURES3_SIZE, features3_html, VF_PTYPE_FLASH);
// Store the above files in CP220x Flash
Store_File(4);
// Blink the Green and Red LEDs
while(1)
{
RED_LED = 0;
GREEN_LED = 1;
for(delay = 0; delay < SYSCLK/1000; delay++);
RED_LED = 1;
GREEN_LED = 0;
for(delay = 0; delay < SYSCLK/1000; delay++);
}
}
}
//-----------------------------------------------------------------------------
// establish_network_connection
//-----------------------------------------------------------------------------
//
// This function calls mn_ether_init() to initialize the CP2200 and attach to
// the network.
//
// If there is a network connection, the function returns 1.
//
// In the call to mn_ether_init(), NUM_AUTONEG_ATTEMPTS is set to 0, so the
// function will not return until it successfully auto-negotiates.
//
// mn_ether_init() will not be a blocking call if NUM_AUTONEG_ATTEMPTS is set
// to a value greater than 0.
//
int establish_network_connection()
{
int retval;
do
{
// mn_ether_init() initializes the Ethernet controller.
// AUTO_NEG indicates that the controller will auto-negotiate.
retval = mn_ether_init(AUTO_NEG, 0, 1);
// If there is no link, poll link_status until it sets or the
// CP2200 resets and then call mn_ether_init() again.
if (retval == LINK_FAIL)
{
while(!link_status && !ether_reset);
}
// If retval is less than zero and is not LINK_FAIL, there is a
// hardware error.
else if (retval < 0)
{
// Verify that the Ethernet controller is connected and powered properly.
// Verity that the EMIF has been configured at a speed compatible with the
// Ethernet controller.
while(1);
} else
{
YELLOW_LED = 1;
}
}while(retval < 0);
return (1);
}
//-----------------------------------------------------------------------------
// Initialization Routines
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// PORT_Init
//-----------------------------------------------------------------------------
//
// Configure the Crossbar and GPIO ports for the PoE-VOICE-EB
//
// P0.2 -
// P0.3 -
//
// P0.4 - UART TX
// P0.5 - UART RX
// P0.6 - /RST
// P0.7 - /INT
//
// P1.3 - ALE
//
// P1.5 - VREF (analog input)
// P1.6 - /RD
// P1.7 - /WR
//
// P2.2 - LIGHT_SENSE (analog input)
// P2.4 - RED_LED
// P2.5 - GREEN_LED
// P2.6 - /LS_EN
// P2.7 - YELLOW_LED
//
// P3.7 - /A15_CS
// P4 - Address/Data Bus
//
void PORT_Init (void)
{
IT01CF = 0x67; // Enable Interrupt 0 on P0.7
// Enable Interrupt 1 on P0.6
PX0 = 1; // Set Interrupt 0 (Ethernet Interrupt)
// to High Priority
XBR0 = 0x01; // Enable UART on P0.4(RX) and P0.5(TX
P0MDOUT |= 0x10; // Enable TX0 as push-pull output
XBR1 = 0x40; // Enable crossbar and enable
// weak pull-ups
P1MDOUT |= 0xC8; // /WR and /RD and ALE are push-pull
P2MDOUT |= 0xF0; // LEDs and /LS_EN are push-pull
P2 &= ~0xB0; // LEDs initially off
P2 &= ~0x40; // LS initially on
P0MDOUT &= ~0x40; // Reset is open-drain
P0 &= ~0x40; // Reset initially zero
P1MDIN &= ~0x20; // P1.5 Vref is analog input
P2MDIN &= ~0x04; // P2.2 is an analog input
P2MDIN &= ~0x01; // P2.0 is an analog input
// Set EMIF pins to push pull
P3MDOUT |= 0x80; // ALE is push-pull
P4MDOUT |= 0xFF; // Data Bus
}
//-----------------------------------------------------------------------------
// EMIF_Init
//-----------------------------------------------------------------------------
//
// Configure the External Memory Interface for both on and off-chip access.
//
void EMIF_Init (void)
{
EMI0CF = 0x09; // muxed mode; split mode
// with bank select
EMI0TC = EMIF_TIMING; // This constant may be modified
// according to SYSCLK to meet the
// timing requirements for the CP2200
EMI0CN = BASE_ADDRESS; // Page of XRAM accessed by EMIF
}
//-----------------------------------------------------------------------------
// SYSCLK_Init
//-----------------------------------------------------------------------------
//
// This routine initializes the system clock.
//
void SYSCLK_Init (void)
{
int i;
OSCICN |= 0x03; // Configure internal oscillator for
// its maximum frequency
CLKMUL = 0x00; // Reset Clock Multiplier and select
// internal oscillator as input source
CLKMUL |= 0x80; // Enable the Clock Multiplier
for(i = 0; i < 256; i++); // Delay at least 5us
CLKMUL |= 0xC0; // Initialize the Clock Multiplier
while(!(CLKMUL & 0x20)); // Wait for MULRDY => 1
RSTSRC = 0x06; // Enable missing clock detector
// and VDD monitor
FLSCL |= 0x10; // Set Flash Scale for 48MHz
CLKSEL |= 0x03; // Select output of clock multiplier
// as the system clock.
}
//-----------------------------------------------------------------------------
// ether_reset_low
//-----------------------------------------------------------------------------
//
// This routine drives the reset pin of the ethernet controller low.
//
void ether_reset_low()
{
P0 &= ~0x40; // Pull reset low
}
//-----------------------------------------------------------------------------
// ether_reset_high
//-----------------------------------------------------------------------------
//
// This routine places the reset pin in High-Z allowing it to be pulled up
// using the external pull-up resistor.
//
// Additionally, this routine waits for the reset pin to read high before
// exiting.
//
void ether_reset_high (void)
{
P0 |= 0x40; // Allow /RST to rise
while(!(P0 & 0x40)); // Wait for /RST to go high
}
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