ch8_matrix.hier_info

用fpga+usb显现的4通道800K的数据采集方案。

|CH8_Matrix
PS10 <= gating_pulse:inst.PS10
PC0 => my_DFF:inst10.D
PC0 => led1.DATAIN
CLK_40M => div_mult:inst8.clk
flagb => gating_pulse:inst.FlagB
flagb => inst6.IN0
TB_DDS <= gating_pulse:inst.TB
TB_MIX <= gating_pulse:inst.TB
TP_DDS <= gating_pulse:inst.TP
TP_232 <= inst118.DB_MAX_OUTPUT_PORT_TYPE
Update1 <= gating_pulse:inst.Update
SLWR <= gating_pulse:inst.SLWR
AD_CLK <= gating_pulse:inst.AD_CLK
led3 <= inst6.DB_MAX_OUTPUT_PORT_TYPE
led1 <= PC0.DB_MAX_OUTPUT_PORT_TYPE
RDY0 <= <VCC>
led2 <= gating_pulse:inst.SLWR
PDWN8 <= <GND>
D_sin[0] <= lpm_dff0:inst2.q[0]
D_sin[1] <= lpm_dff0:inst2.q[1]
D_sin[2] <= lpm_dff0:inst2.q[2]
D_sin[3] <= lpm_dff0:inst2.q[3]
D_sin[4] <= lpm_dff0:inst2.q[4]
D_sin[5] <= lpm_dff0:inst2.q[5]
D_sin[6] <= lpm_dff0:inst2.q[6]
D_sin[7] <= lpm_dff0:inst2.q[7]
D_sin[8] <= lpm_dff0:inst2.q[8]
D_sin[9] <= lpm_dff0:inst2.q[9]
D_sin[10] <= lpm_dff0:inst2.q[10]
D_sin[11] <= lpm_dff0:inst2.q[11]
D_sin[12] <= lpm_dff0:inst2.q[12]
D_sin[13] <= lpm_dff0:inst2.q[13]
D_sin[14] <= lpm_dff0:inst2.q[14]
D_sin[15] <= lpm_dff0:inst2.q[15]
AD_in[0] => AD_2Compl:inst3.AD_in[0]
AD_in[1] => AD_2Compl:inst3.AD_in[1]
AD_in[2] => AD_2Compl:inst3.AD_in[2]
AD_in[3] => AD_2Compl:inst3.AD_in[3]
AD_in[4] => AD_2Compl:inst3.AD_in[4]
AD_in[5] => AD_2Compl:inst3.AD_in[5]
AD_in[6] => AD_2Compl:inst3.AD_in[6]
AD_in[7] => AD_2Compl:inst3.AD_in[7]
AD_in[8] => AD_2Compl:inst3.AD_in[8]
AD_in[9] => AD_2Compl:inst3.AD_in[9]
AD_in[10] => AD_2Compl:inst3.AD_in[10]
AD_in[11] => AD_2Compl:inst3.AD_in[11]
AD_in[12] => AD_2Compl:inst3.AD_in[12]
AD_in[13] => AD_2Compl:inst3.AD_in[13]


|CH8_Matrix|gating_pulse:inst
PS_flag => counter_big~38.OUTPUTSELECT
PS_flag => counter_big~39.OUTPUTSELECT
PS_flag => counter_big~40.OUTPUTSELECT
PS_flag => counter_big~41.OUTPUTSELECT
PS_flag => counter_big~42.OUTPUTSELECT
PS_flag => counter_big~43.OUTPUTSELECT
PS_flag => counter_big~44.OUTPUTSELECT
PS_flag => counter_big~45.OUTPUTSELECT
PS_flag => counter_big~46.OUTPUTSELECT
PS_flag => counter_big~47.OUTPUTSELECT
PS_flag => counter_big~48.OUTPUTSELECT
PS_flag => counter_big~49.OUTPUTSELECT
PS_flag => counter_big~50.OUTPUTSELECT
PS_flag => counter_big~51.OUTPUTSELECT
PS_flag => counter_big~52.OUTPUTSELECT
PS_flag => counter_big~53.OUTPUTSELECT
PS_flag => counter_big~54.OUTPUTSELECT
PS_flag => counter_big~55.OUTPUTSELECT
PS_flag => counter_big~56.OUTPUTSELECT
PS_flag => AD_Flag.OUTPUTSELECT
PS_flag => Get_Flag.OUTPUTSELECT
PS_flag => SLWR_Flag.OUTPUTSELECT
PS_flag => always4~0.IN0
PS_flag => always5~0.IN0
PS_flag => always6~0.IN0
PS_flag => temp_Update.OUTPUTSELECT
PS_flag => temp_FM.OUTPUTSELECT
PS_flag => temp_TP.OUTPUTSELECT
PS_flag => temp_TB.OUTPUTSELECT
PS_flag => temp_AD_CLK.OUTPUTSELECT
PS_flag => temp_Get_CLK.OUTPUTSELECT
PS_flag => temp_SLWR.OUTPUTSELECT
FlagB => always0~0.IN0
CLK => counter_big[17].CLK
CLK => counter_big[16].CLK
CLK => counter_big[15].CLK
CLK => counter_big[14].CLK
CLK => counter_big[13].CLK
CLK => counter_big[12].CLK
CLK => counter_big[11].CLK
CLK => counter_big[10].CLK
CLK => counter_big[9].CLK
CLK => counter_big[8].CLK
CLK => counter_big[7].CLK
CLK => counter_big[6].CLK
CLK => counter_big[5].CLK
CLK => counter_big[4].CLK
CLK => counter_big[3].CLK
CLK => counter_big[2].CLK
CLK => counter_big[1].CLK
CLK => counter_big[0].CLK
CLK => counter_small_AD[4].CLK
CLK => counter_small_AD[3].CLK
CLK => counter_small_AD[2].CLK
CLK => counter_small_AD[1].CLK
CLK => counter_small_AD[0].CLK
CLK => counter_small_Get[4].CLK
CLK => counter_small_Get[3].CLK
CLK => counter_small_Get[2].CLK
CLK => counter_small_Get[1].CLK
CLK => counter_small_Get[0].CLK
CLK => counter_small_SLWR[4].CLK
CLK => counter_small_SLWR[3].CLK
CLK => counter_small_SLWR[2].CLK
CLK => counter_small_SLWR[1].CLK
CLK => counter_small_SLWR[0].CLK
CLK => PS10~reg0.CLK
CLK => PS20~reg0.CLK
CLK => TB~reg0.CLK
CLK => TP~reg0.CLK
CLK => Update~reg0.CLK
CLK => AD_CLK~reg0.CLK
CLK => Get_CLK~reg0.CLK
CLK => SLWR~reg0.CLK
CLK => counter_big[18].CLK
Update <= Update~reg0.DB_MAX_OUTPUT_PORT_TYPE
TP <= TP~reg0.DB_MAX_OUTPUT_PORT_TYPE
TB <= TB~reg0.DB_MAX_OUTPUT_PORT_TYPE
PS10 <= PS10~reg0.DB_MAX_OUTPUT_PORT_TYPE
PS20 <= PS20~reg0.DB_MAX_OUTPUT_PORT_TYPE
AD_CLK <= AD_CLK~reg0.DB_MAX_OUTPUT_PORT_TYPE
Get_CLK <= Get_CLK~reg0.DB_MAX_OUTPUT_PORT_TYPE
SLWR <= SLWR~reg0.DB_MAX_OUTPUT_PORT_TYPE


|CH8_Matrix|my_DFF:inst13
D => Q~reg0.DATAIN
clk => Q~reg0.CLK
Q <= Q~reg0.DB_MAX_OUTPUT_PORT_TYPE


|CH8_Matrix|my_DFF:inst10
D => Q~reg0.DATAIN
clk => Q~reg0.CLK
Q <= Q~reg0.DB_MAX_OUTPUT_PORT_TYPE


|CH8_Matrix|div5:inst19
clk => state[1].CLK
clk => state[0].CLK
clk => state[2].CLK
clk => clk1.CLK
clk_out <= clk_out~0.DB_MAX_OUTPUT_PORT_TYPE


|CH8_Matrix|div5:inst20
clk => state[1].CLK
clk => state[0].CLK
clk => state[2].CLK
clk => clk1.CLK
clk_out <= clk_out~0.DB_MAX_OUTPUT_PORT_TYPE


|CH8_Matrix|div_mult:inst23
clk => counter[7].CLK
clk => counter[6].CLK
clk => counter[5].CLK
clk => counter[4].CLK
clk => counter[3].CLK
clk => counter[2].CLK
clk => counter[1].CLK
clk => counter[0].CLK
clk => counter[8].CLK
div512 <= counter[8].DB_MAX_OUTPUT_PORT_TYPE
div256 <= counter[7].DB_MAX_OUTPUT_PORT_TYPE
div128 <= counter[6].DB_MAX_OUTPUT_PORT_TYPE
div64 <= counter[5].DB_MAX_OUTPUT_PORT_TYPE
div32 <= counter[4].DB_MAX_OUTPUT_PORT_TYPE
div16 <= counter[3].DB_MAX_OUTPUT_PORT_TYPE
div8 <= counter[2].DB_MAX_OUTPUT_PORT_TYPE
div4 <= counter[1].DB_MAX_OUTPUT_PORT_TYPE
div2 <= counter[0].DB_MAX_OUTPUT_PORT_TYPE


|CH8_Matrix|div_mult:inst16
clk => counter[7].CLK
clk => counter[6].CLK
clk => counter[5].CLK
clk => counter[4].CLK
clk => counter[3].CLK
clk => counter[2].CLK
clk => counter[1].CLK
clk => counter[0].CLK
clk => counter[8].CLK
div512 <= counter[8].DB_MAX_OUTPUT_PORT_TYPE
div256 <= counter[7].DB_MAX_OUTPUT_PORT_TYPE
div128 <= counter[6].DB_MAX_OUTPUT_PORT_TYPE
div64 <= counter[5].DB_MAX_OUTPUT_PORT_TYPE
div32 <= counter[4].DB_MAX_OUTPUT_PORT_TYPE
div16 <= counter[3].DB_MAX_OUTPUT_PORT_TYPE
div8 <= counter[2].DB_MAX_OUTPUT_PORT_TYPE
div4 <= counter[1].DB_MAX_OUTPUT_PORT_TYPE
div2 <= counter[0].DB_MAX_OUTPUT_PORT_TYPE


|CH8_Matrix|div_mult:inst8
clk => counter[7].CLK
clk => counter[6].CLK
clk => counter[5].CLK
clk => counter[4].CLK
clk => counter[3].CLK
clk => counter[2].CLK
clk => counter[1].CLK
clk => counter[0].CLK
clk => counter[8].CLK
div512 <= counter[8].DB_MAX_OUTPUT_PORT_TYPE
div256 <= counter[7].DB_MAX_OUTPUT_PORT_TYPE
div128 <= counter[6].DB_MAX_OUTPUT_PORT_TYPE
div64 <= counter[5].DB_MAX_OUTPUT_PORT_TYPE
div32 <= counter[4].DB_MAX_OUTPUT_PORT_TYPE
div16 <= counter[3].DB_MAX_OUTPUT_PORT_TYPE
div8 <= counter[2].DB_MAX_OUTPUT_PORT_TYPE
div4 <= counter[1].DB_MAX_OUTPUT_PORT_TYPE
div2 <= counter[0].DB_MAX_OUTPUT_PORT_TYPE


|CH8_Matrix|lpm_dff0:inst2
clock => clock~0.IN1
data[0] => data[0]~15.IN1
data[1] => data[1]~14.IN1
data[2] => data[2]~13.IN1
data[3] => data[3]~12.IN1
data[4] => data[4]~11.IN1
data[5] => data[5]~10.IN1
data[6] => data[6]~9.IN1
data[7] => data[7]~8.IN1
data[8] => data[8]~7.IN1
data[9] => data[9]~6.IN1
data[10] => data[10]~5.IN1
data[11] => data[11]~4.IN1
data[12] => data[12]~3.IN1
data[13] => data[13]~2.IN1
data[14] => data[14]~1.IN1
data[15] => data[15]~0.IN1
q[0] <= lpm_ff:lpm_ff_component.q
q[1] <= lpm_ff:lpm_ff_component.q
q[2] <= lpm_ff:lpm_ff_component.q
q[3] <= lpm_ff:lpm_ff_component.q
q[4] <= lpm_ff:lpm_ff_component.q
q[5] <= lpm_ff:lpm_ff_component.q
q[6] <= lpm_ff:lpm_ff_component.q
q[7] <= lpm_ff:lpm_ff_component.q
q[8] <= lpm_ff:lpm_ff_component.q
q[9] <= lpm_ff:lpm_ff_component.q
q[10] <= lpm_ff:lpm_ff_component.q
q[11] <= lpm_ff:lpm_ff_component.q
q[12] <= lpm_ff:lpm_ff_component.q
q[13] <= lpm_ff:lpm_ff_component.q
q[14] <= lpm_ff:lpm_ff_component.q
q[15] <= lpm_ff:lpm_ff_component.q


|CH8_Matrix|lpm_dff0:inst2|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
data[1] => dffs[1].DATAIN
data[2] => dffs[2].DATAIN
data[3] => dffs[3].DATAIN
data[4] => dffs[4].DATAIN
data[5] => dffs[5].DATAIN
data[6] => dffs[6].DATAIN
data[7] => dffs[7].DATAIN
data[8] => dffs[8].DATAIN
data[9] => dffs[9].DATAIN
data[10] => dffs[10].DATAIN
data[11] => dffs[11].DATAIN
data[12] => dffs[12].DATAIN
data[13] => dffs[13].DATAIN
data[14] => dffs[14].DATAIN
data[15] => dffs[15].DATAIN
clock => dffs[15].CLK
clock => dffs[14].CLK
clock => dffs[13].CLK
clock => dffs[12].CLK
clock => dffs[11].CLK
clock => dffs[10].CLK
clock => dffs[9].CLK
clock => dffs[8].CLK
clock => dffs[7].CLK
clock => dffs[6].CLK
clock => dffs[5].CLK
clock => dffs[4].CLK
clock => dffs[3].CLK
clock => dffs[2].CLK
clock => dffs[1].CLK
clock => dffs[0].CLK
enable => dffs[15].ENA
enable => dffs[14].ENA
enable => dffs[13].ENA
enable => dffs[12].ENA
enable => dffs[11].ENA
enable => dffs[10].ENA
enable => dffs[9].ENA
enable => dffs[8].ENA
enable => dffs[7].ENA
enable => dffs[6].ENA
enable => dffs[5].ENA
enable => dffs[4].ENA
enable => dffs[3].ENA
enable => dffs[2].ENA
enable => dffs[1].ENA
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= dffs[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= dffs[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= dffs[3].DB_MAX_OUTPUT_PORT_TYPE
q[4] <= dffs[4].DB_MAX_OUTPUT_PORT_TYPE
q[5] <= dffs[5].DB_MAX_OUTPUT_PORT_TYPE
q[6] <= dffs[6].DB_MAX_OUTPUT_PORT_TYPE
q[7] <= dffs[7].DB_MAX_OUTPUT_PORT_TYPE
q[8] <= dffs[8].DB_MAX_OUTPUT_PORT_TYPE
q[9] <= dffs[9].DB_MAX_OUTPUT_PORT_TYPE
q[10] <= dffs[10].DB_MAX_OUTPUT_PORT_TYPE
q[11] <= dffs[11].DB_MAX_OUTPUT_PORT_TYPE
q[12] <= dffs[12].DB_MAX_OUTPUT_PORT_TYPE
q[13] <= dffs[13].DB_MAX_OUTPUT_PORT_TYPE
q[14] <= dffs[14].DB_MAX_OUTPUT_PORT_TYPE
q[15] <= dffs[15].DB_MAX_OUTPUT_PORT_TYPE


|CH8_Matrix|widen_bit:inst7
D_in[0] => D_out[0].DATAIN
D_in[1] => D_out[1].DATAIN
D_in[2] => D_out[2].DATAIN
D_in[3] => D_out[3].DATAIN
D_in[4] => D_out[4].DATAIN
D_in[5] => D_out[5].DATAIN
D_in[6] => D_out[6].DATAIN
D_in[7] => D_out[7].DATAIN
D_in[8] => D_out[8].DATAIN
D_in[9] => D_out[9].DATAIN
D_in[10] => D_out[10].DATAIN
D_in[11] => D_out[11].DATAIN
D_in[12] => D_out[12].DATAIN
D_in[13] => D_out[13].DATAIN
D_in[13] => D_out[15].DATAIN
D_in[13] => D_out[14].DATAIN
D_out[0] <= D_in[0].DB_MAX_OUTPUT_PORT_TYPE
D_out[1] <= D_in[1].DB_MAX_OUTPUT_PORT_TYPE
D_out[2] <= D_in[2].DB_MAX_OUTPUT_PORT_TYPE
D_out[3] <= D_in[3].DB_MAX_OUTPUT_PORT_TYPE
D_out[4] <= D_in[4].DB_MAX_OUTPUT_PORT_TYPE
D_out[5] <= D_in[5].DB_MAX_OUTPUT_PORT_TYPE
D_out[6] <= D_in[6].DB_MAX_OUTPUT_PORT_TYPE
D_out[7] <= D_in[7].DB_MAX_OUTPUT_PORT_TYPE
D_out[8] <= D_in[8].DB_MAX_OUTPUT_PORT_TYPE
D_out[9] <= D_in[9].DB_MAX_OUTPUT_PORT_TYPE
D_out[10] <= D_in[10].DB_MAX_OUTPUT_PORT_TYPE
D_out[11] <= D_in[11].DB_MAX_OUTPUT_PORT_TYPE
D_out[12] <= D_in[12].DB_MAX_OUTPUT_PORT_TYPE
D_out[13] <= D_in[13].DB_MAX_OUTPUT_PORT_TYPE
D_out[14] <= D_in[13].DB_MAX_OUTPUT_PORT_TYPE
D_out[15] <= D_in[13].DB_MAX_OUTPUT_PORT_TYPE


|CH8_Matrix|AD_2Compl:inst3
AD_in[0] => AD_2C[0].DATAIN
AD_in[1] => AD_2C[1].DATAIN
AD_in[2] => AD_2C[2].DATAIN
AD_in[3] => AD_2C[3].DATAIN
AD_in[4] => AD_2C[4].DATAIN
AD_in[5] => AD_2C[5].DATAIN
AD_in[6] => AD_2C[6].DATAIN
AD_in[7] => AD_2C[7].DATAIN
AD_in[8] => AD_2C[8].DATAIN
AD_in[9] => AD_2C[9].DATAIN
AD_in[10] => AD_2C[10].DATAIN
AD_in[11] => AD_2C[11].DATAIN
AD_in[12] => AD_2C[12].DATAIN
AD_in[13] => AD_2C[13].DATAIN
AD_2C[0] <= AD_in[0].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[1] <= AD_in[1].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[2] <= AD_in[2].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[3] <= AD_in[3].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[4] <= AD_in[4].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[5] <= AD_in[5].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[6] <= AD_in[6].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[7] <= AD_in[7].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[8] <= AD_in[8].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[9] <= AD_in[9].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[10] <= AD_in[10].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[11] <= AD_in[11].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[12] <= AD_in[12].DB_MAX_OUTPUT_PORT_TYPE
AD_2C[13] <= AD_in[13].DB_MAX_OUTPUT_PORT_TYPE